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1. 发明申请

US20050273577A1 Microprocessor with integrated high speed memory 有权
标题翻译：具有集成高速存储器的微处理器
公开(公告)号：US20050273577A1
公开(公告)日：2005-12-08
申请号：US10857979
申请日：2004-06-02
申请人： Sophie Wilson , John Redford
发明人： Sophie Wilson , John Redford
IPC分类号： G06F9/345 , G06F9/38 , G06F9/40
CPC分类号： G06F9/30036 , G06F9/30043 , G06F9/3455
摘要： The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load/store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load/store unit contains a high speed memory directly interfacing said load/store unit to the cache. The present invention improves the of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load/store data transactions per cycle. By including a cache memory inside the load/store unit, the processor is directly interfaced from its load/store units to the caches. Thus, the present invention accelerates data accesses and transactions from and to the load/store units of the processor and the data cache memory.
摘要翻译：本发明涉及（微）计算机设计和架构领域，特别涉及与（微）处理器和存储器组件之间移动数据值相关联的微体系结构。特别地，本发明涉及一种具有处理器结构的计算机系统，其中通过一个具有至少一个用于加载和存储数据对象的加载/存储单元的中央处理单元控制的多于一个执行通道生成寄存器地址，并且至少与处理器相关联的一个缓存存储器，其保存由处理器访问的数据对象，其中所述处理器的加载/存储单元包含将所述加载/存储单元直接连接到高速缓存的高速存储器。本发明改进了具有双端口微处理器实现的架构，其包括能够在每个周期进行两次加载/存储数据事务的两条执行管线。通过在加载/存储单元内部包括高速缓冲存储器，处理器从其加载/存储单元直接连接到高速缓存。因此，本发明加速了来自处理器和数据高速缓冲存储器的加载/存储单元的数据访问和事务。

2. 发明授权

US06931518B1 Branching around conditional processing if states of all single instruction multiple datapaths are disabled and the computer program is non-deterministic 失效
标题翻译：如果禁用所有单个指令多个数据路径的状态，并且计算机程序是非确定性的，则分支进行条件处理
公开(公告)号：US06931518B1
公开(公告)日：2005-08-16
申请号：US09724196
申请日：2000-11-28
申请人： John Redford
发明人： John Redford
IPC分类号： G06F9/44 , G06F15/00
CPC分类号： G06F8/45
摘要： A method of determining whether datapaths executing in a computer program should execute conditional processing block includes determining whether processor enable (PE) states of all of the datapaths are disabled, and branching around the conditional processing if the PE states of all of the datapaths are disabled. Branching is not performed, even if the PE states of all of the datapaths are disabled, if the program is determined to be deterministic. That determination is made by evaluating the state of a deterministic bit. Instructions are also provided for carrying out the determining and branching operations. The instructions may also be combined with operations that maintain the PE states during conditional processing.
摘要翻译：确定在计算机程序中执行的数据通路是否应执行条件处理块的方法包括确定是否禁用所有数据路径的处理器使能（PE）状态，以及如果所有数据路径的PE状态被禁用，则在条件处理之前分支。即使所有数据路径的PE状态被禁用，如果程序被确定为确定性，则不执行分支。该确定是通过评估确定性位的状态来进行的。还提供了执行确定和分支操作的说明。指令还可以与在条件处理期间维持PE状态的操作相结合。

3. 发明授权

US06211864B1 Method and apparatus for optimizing storage of compressed images in memory 有权
标题翻译：用于优化存储器中压缩图像的存储的方法和装置
公开(公告)号：US06211864B1
公开(公告)日：2001-04-03
申请号：US09505111
申请日：2000-02-16
申请人： John Redford
发明人： John Redford
IPC分类号： G09G500
CPC分类号： H04N19/182 , H04N19/115 , H04N19/137 , H04N19/146 , H04N19/15 , H04N19/176 , H04N19/60
摘要： A method and apparatus for optimizing the storage of compressed images includes serially storing pixel block data in memory. Fixed memory utilization can be improved for images having pixel blocks of varying information content. A cumulative memory allocation is updated during processing of each pixel block and compared with the current memory requirement. Memory not utilized for earlier processed pixel blocks having low information content can be used to store later processed high information content pixel blocks.
摘要翻译：用于优化压缩图像的存储的方法和装置包括将像素块数据串行存储在存储器中。对于具有不同信息内容的像素块的图像，可以改进固定的存储器利用率。在每个像素块的处理期间更新累积存储器分配并与当前存储器需求进行比较。不能用于具有低信息内容的较早处理的像素块的存储器可用于存储稍后处理的高信息内容像素块。

4. 发明授权

US08640116B2 Loader module, and method for loading program code into a memory 失效
标题翻译：装载器模块，以及将程序代码加载到存储器中的方法
公开(公告)号：US08640116B2
公开(公告)日：2014-01-28
申请号：US10896053
申请日：2004-07-22
申请人： John Redford
发明人： John Redford
IPC分类号： G06F9/44 , G06F11/00 , G11C29/00
CPC分类号： G06F9/44521
摘要： A loader module for loading program code into a memory is described, whereby the memory may be partially defective, with non-defective parts of the memory being indicated by diagnostic information. The loader module is adapted for loading program code, in accordance with the diagnostic information, into non-defective parts of the memory, and for relinking the program code in accordance with the memory locations it has been loaded to. Furthermore, a method for loading program code into a memory is described. The method comprises the following steps which may be carried out in arbitrary order: loading program code, in accordance with diagnostic information, into non-defective parts of the memory, and relinking the program code in accordance with the memory locations it has been loaded to.
摘要翻译：描述用于将程序代码加载到存储器中的加载器模块，由此存储器可能是部分缺陷的，存储器的非缺陷部分由诊断信息指示。加载器模块适于将根据诊断信息的程序代码加载到存储器的无缺陷部分中，以及根据其加载到的存储器位置重新连接程序代码。此外，描述了将程序代码加载到存储器中的方法。该方法包括可以按任意顺序执行的以下步骤：根据诊断信息将程序代码加载到存储器的无缺陷部分，并根据其加载的存储器位置重新链接程序代码。

5. 发明授权

US08326682B2 Applications of cluster analysis for cellular operators 有权
标题翻译：聚类分析应用于蜂窝运营商
公开(公告)号：US08326682B2
公开(公告)日：2012-12-04
申请号：US11968008
申请日：2007-12-31
申请人： John Redford , Claudio Taglienti , Michael Irizarry , Narothum Saxena
发明人： John Redford , Claudio Taglienti , Michael Irizarry , Narothum Saxena
IPC分类号： G06Q40/00
CPC分类号： G06Q30/02 , G06Q30/0204
摘要： Subscriber travel behavior is defined using cellular call location data. The defined travel behavior is used to segment the customer population. In a further aspect of the disclosed principles, a method to consolidate numerous of price plans is disclosed wherein price plans are grouped using cluster analysis. In the context of this disclosure, the term “cluster analysis” encompasses a number of different algorithms and methods for grouping objects of similar kind into respective categories to thus organize observed data into meaningful structures. In this context, cluster analysis is a data analysis process for sorting different objects into groups in a way that the degree of association between two objects is maximal if they belong to the same group and minimal otherwise.
摘要翻译：使用蜂窝呼叫位置数据定义用户行为行为。定义的旅行行为用于分割客户群体。在所公开的原理的另一方面，公开了一种巩固众多价格计划的方法，其中使用聚类分析对价格计划进行分组。在本公开的上下文中，术语聚类分析包含许多不同的算法和方法，用于将类似类型的对象分组成各自的类别，从而将观察到的数据组织成有意义的结构。在这种情况下，集群分析是一种数据分析过程，用于将不同对象分组成组，如果两个对象之间的关联程度属于同一组，则最小化，否则为最小。

6. 发明申请

US20050289436A1 Data integrity checking 失效
标题翻译：数据完整性检查
公开(公告)号：US20050289436A1
公开(公告)日：2005-12-29
申请号：US10928961
申请日：2004-08-30
申请人： John Redford
发明人： John Redford
IPC分类号： G06F11/00 , G11C29/00 , G11C29/56 , H03M13/00
CPC分类号： G11C29/56
摘要： A tester unit for evaluating data integrity of a block of data is described. The tester unit comprises a checksum determination facility adapted for deriving a checksum value from a block of data stored in a memory, and a checksum evaluation facility adapted for comparing the derived checksum value with a predetermined checksum value, and for initiating a reload of the block in case the derived checksum value differs from the predetermined checksum value.
摘要翻译：描述用于评估数据块的数据完整性的测试器单元。测试器单元包括校验和确定设备，其适于从存储在存储器中的数据块导出校验和值，以及校验和评估设备，其适于将导出的校验和值与预定校验和值进行比较，并用于启动块的重新加载在导出的校验和值与预定校验和值不同的情况下。

7. 发明授权

US06857394B2 Window seat perch and protector for domestic birds 有权
标题翻译：窗户座椅和家禽保护器
公开(公告)号：US06857394B2
公开(公告)日：2005-02-22
申请号：US10389144
申请日：2003-03-14
申请人： John Redford
发明人： John Redford
IPC分类号： A01K31/12
CPC分类号： A01K31/12
摘要： An article for a domestic bird is provided with a perch rod surrounded by protective base, window wall, and side walls for mounting inwardly of a window of a building. A domestic bird free-flying in the building, or a clipped bird climbing a ladder or braided rope, can alight on the perch rod in the article and enjoy the light of the window while being prevented from pecking and damaging the wood and other structure of the window. The window wall and side walls of the article extend well above or beyond the perch rod a distance greater than the maximum reach of the bird's beak while the bird is standing on the perch rod. A portion of the article also comprises a base below the perch rod, for catching droppings and spatters of the bird. The article is mounted to the window glass by suction cups, and can be further supported by cushions on the base of the article which engage a horizontal surface of the window structure, as a sill of the window structure or the top of a lower sash. The article is preferably molded in one piece, with the base and window sides rounding smoothly into one another and into side walls.
摘要翻译：家用鸟类的物品上设有一个由保护底座，窗户墙壁和侧壁包围的行星杆，用于安装在建筑物的窗户内部。在建筑物内自由飞行的国内鸟类，或爬上梯子或编织绳的剪影鸟，可以在物品的鲈鱼杆上下车，享受窗户的光线，同时防止啄食和损坏木材和其他结构窗户。该物品的窗口壁和侧壁远远超过栖息杆的一个距离，该距离大于鸟的喙的最大距离，同时鸟站在鲈鱼杆上。制品的一部分还包括在导管杆下方的底座，用于捕捉鸟的粪便和飞溅物。物品通过吸盘安装到窗玻璃上，并且可以进一步由制品的基座上的垫子支撑，该基座与窗户结构的水平表面接合，作为窗户结构的门槛或下窗扇的顶部。该制品优选地模制成一体，其中基部和窗口侧面彼此平滑地成圆形并且进入侧壁。

8. 发明授权

US06732253B1 Loop handling for single instruction multiple datapath processor architectures 失效
公开(公告)号：US06732253B1
公开(公告)日：2004-05-04
申请号：US09711556
申请日：2000-11-13
申请人： John Redford
发明人： John Redford
IPC分类号： G06F1580
CPC分类号： G06F9/3455 , G06F9/325 , G06F9/345 , G06F9/3885 , G06F15/8007
摘要： A method of controlling the enabling of processor datapaths in a SIMD processor during a loop processing operation is described. The information used by the method includes an allocation between the data items and a memory, a size of the array, and a number of remaining parallel passes of the datapaths in the loop processing operation. A computer instruction is also provided, which includes a loop handling instruction that specifies the enabling of one of a plurality of processor datapaths during processing an array of data items. The instruction includes a count field that specifies the number of remaining parallel loop passes to process the array and a count field that specifies the number of serial loop passes to process the array. Different instructions can be used to handle different allocations of passes to parallel datapaths. The instruction also uses information about the total number of datapaths.

9. 发明授权

US6121905A Method and apparatus for decoding JPEG symbols 失效
标题翻译：用于解码JPEG符号的方法和装置
公开(公告)号：US6121905A
公开(公告)日：2000-09-19
申请号：US075580
申请日：1998-05-11
申请人： John Redford
发明人： John Redford
IPC分类号： G06T9/00 , H03M7/42 , H04N7/26 , H04N7/30 , H03M7/40
CPC分类号： H03M7/425 , H04N19/13 , H04N19/60 , H04N19/91
摘要： A method and apparatus for decoding JPEG Huffman symbols is described. A content addressable memory module stores bit patterns representing Huffman symbols that must be decoded in a single decoding cycle. A compare-add module stores bit patterns representing Huffman symbols that can be decoded in following cycles. The content addressable memory module and the compare-add module each compare a Huffman symbol with their stored bit patterns and generate a corresponding bit pattern when a match is found. The method takes advantage of the high speed possible with a content addressable memory and the small size of the compare-add module.
摘要翻译：描述了用于解码JPEG霍夫曼符号的方法和装置。内容可寻址存储器模块存储表示在单个解码周期中必须解码的霍夫曼符号的位模式。比较添加模块存储表示可以在以下循环中解码的霍夫曼符号的位模式。内容可寻址存储器模块和比较加法模块每个都将霍夫曼符号与其存储的位模式进行比较，并在找到匹配时产生相应的位模式。该方法利用内容可寻址存储器和比较添加模块的小尺寸来实现高速度。

10. 发明授权

US6049330A Method and apparatus for optimizing storage of compressed images in memory 失效
标题翻译：用于优化存储器中压缩图像的存储的方法和装置
公开(公告)号：US6049330A
公开(公告)日：2000-04-11
申请号：US919699
申请日：1997-08-28
申请人： John Redford
发明人： John Redford
IPC分类号： H04N7/30 , G09G5/00
CPC分类号： H04N19/182 , H04N19/115 , H04N19/137 , H04N19/15 , H04N19/176 , H04N19/60 , H04N19/146
摘要： A method and apparatus for optimizing the storage of compressed images includes serially storing pixel block data in memory. Fixed memory utilization can be improved for images having pixel blocks of varying information content. A cumulative memory allocation is updated during processing of each pixel block and compared with the current memory requirement. Memory not utilized for earlier processed pixel blocks having low information content can be used to store later processed high information content pixel blocks.
摘要翻译：用于优化压缩图像的存储的方法和装置包括将像素块数据串行存储在存储器中。对于具有不同信息内容的像素块的图像，可以改进固定的存储器利用率。在每个像素块的处理期间更新累积存储器分配并与当前存储器需求进行比较。不能用于具有低信息内容的较早处理的像素块的存储器可用于存储稍后处理的高信息内容像素块。

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