专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20060012603A1 Simulating multiported memories using lower port count memories 有权
标题翻译：使用较低端口数存储器模拟多端口存储器
公开(公告)号：US20060012603A1
公开(公告)日：2006-01-19
申请号：US10889730
申请日：2004-07-13
申请人： John Lindholm , Ming Siu , Simon Moy , Samuel Liu , John Nickolls
发明人： John Lindholm , Ming Siu , Simon Moy , Samuel Liu , John Nickolls
IPC分类号： G06F12/00 , G06F12/02 , G06F12/06
CPC分类号： G06F9/3012 , G06F9/30123 , G06F9/30167 , G06F9/3824 , G06F9/3851 , G06F9/3885
摘要： An apparatus and method for simulating a multiported memory using lower port count memories as banks. A portion of memory is allocated for storing data associated with a thread. The portion of memory allocated to a thread may be stored in a single bank or in multiple banks. A collector unit coupled to each bank gathers source operands needed to process a program instruction as the source operands output from one or more banks. The collector unit outputs the source operands to an execution unit when all of the source operands needed to process the program instruction have been gathered.
摘要翻译：一种使用较低端口计数存储器作为存储体来模拟多端口存储器的装置和方法。分配存储器的一部分用于存储与线程相关联的数据。分配给线程的内存部分可以存储在单个银行或多个银行中。耦合到每个组的收集器单元收集处理程序指令所需的源操作数，作为从一个或多个存储体输出的源操作数。当处理程序指令所需的所有源操作数已经被收集时，收集器单元将源操作数输出到执行单元。

2. 发明申请

US20060101242A1 Multipurpose multiply-add functional unit 有权
标题翻译：多功能乘法功能单元
公开(公告)号：US20060101242A1
公开(公告)日：2006-05-11
申请号：US10985291
申请日：2004-11-10
申请人： Ming Siu , Stuart Oberman
发明人： Ming Siu , Stuart Oberman
IPC分类号： G06F9/44
CPC分类号： G06F9/3885 , G06F7/483 , G06F9/30014 , G06F9/30021 , G06F9/30025 , G06F9/30032 , G06F9/3875
摘要： A multipurpose functional unit is configurable to support a number of operations including multiply-add and comparison testing operations, as well as other integer and/or floating-point arithmetic operations, Boolean operations, and format conversion operations.
摘要翻译：多用途功能单元可配置为支持多种操作，包括乘法和比较测试操作，以及其他整数和/或浮点运算，布尔运算和格式转换操作。

3. 发明授权

US06393554B1 Method and apparatus for performing vector and scalar multiplication and calculating rounded products 有权
标题翻译：执行向量和标量乘法并计算舍入积的方法和装置
公开(公告)号：US06393554B1
公开(公告)日：2002-05-21
申请号：US09487771
申请日：2000-01-19
申请人： Stuart F. Oberman , Ming Siu , Ravi Krishna Cherukuri
发明人： Stuart F. Oberman , Ming Siu , Ravi Krishna Cherukuri
IPC分类号： G06F752
CPC分类号： G06F7/53 , G06F7/4991 , G06F7/49936 , G06F7/49963 , G06F7/49994 , G06F7/5338 , G06F7/5443 , G06F9/30014 , G06F9/30036 , G06F9/3017 , G06F9/3804 , G06F9/3885 , G06F17/16 , G06F2207/3828
摘要： A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated based upon each operand's most significant bit and a control signal. The effective signs may then be used to create and select a number of partial products according to Booth's algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines. The segments may be rounded by adding a rounding constant. Rounding and normalization may be performed in two paths, one assuming an overflow will occur, the other assuming no overflow will occur.
摘要翻译：公开了能够执行有符号和无符号标量和矢量乘法的乘法器。乘法器配置为以标量或压缩向量形式接收带符号或无符号乘数和被乘数操作数。可以基于每个操作数的最高有效位和控制信号来计算乘法器和被乘数操作数的有效符号。然后根据布斯算法，有效符号可用于创建和选择多个部分乘积。一旦创建并选择了部分产品，就可以对它们进行求和并输出结果。结果可能是有符号或无符号的，可能表示向量或标量。当执行向量乘法时，乘法器可以被配置为产生和选择部分乘积，以便有效地隔离每对向量分量的乘法过程。乘法器还可以被配置为对矢量分量的乘积求和以形成向量点积。最终产品可以以分段输出，以便需要更少的总线。可以通过添加舍入常数来对段进行舍入。可以在两个路径中执行舍入和归一化，一个假设将发生溢出，另一个假设不会发生溢出。

4. 发明授权

US06223198B1 Method and apparatus for multi-function arithmetic 有权
公开(公告)号：US06223198B1
公开(公告)日：2001-04-24
申请号：US09134171
申请日：1998-08-14
申请人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
发明人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
IPC分类号： G06F752
CPC分类号： G06F7/53 , G06F7/4991 , G06F7/49936 , G06F7/49963 , G06F7/49994 , G06F7/5338 , G06F7/5443 , G06F9/30036 , G06F9/3017 , G06F9/3804 , G06F9/3885 , G06F17/16 , G06F2207/3828
摘要： A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated and used to create and select a number of partial products according to Booth's algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines. The segments may be rounded by adding a rounding constant. Rounding and normalization may be performed in two paths, one assuming an overflow will occur, the other assuming no overflow will occur. The multiplier may also be configured to perform iterative calculations to evaluate constant powers of an operand. Intermediate products that are formed may be rounded and normalized in two paths and then compressed and stored for use in the next iteration. An adjustment constant may also be added to increase the frequency of exactly rounded results.

5. 发明授权

US06381625B2 Method and apparatus for calculating a power of an operand 有权
标题翻译：用于计算操作数的功率的方法和装置
公开(公告)号：US06381625B2
公开(公告)日：2002-04-30
申请号：US09782474
申请日：2001-02-12
申请人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
发明人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
IPC分类号： G06F7552
CPC分类号： G06F7/53 , G06F7/4991 , G06F7/49936 , G06F7/49963 , G06F7/49994 , G06F7/5338 , G06F7/5443 , G06F9/30036 , G06F9/3017 , G06F9/3804 , G06F9/3885 , G06F17/16 , G06F2207/3828
摘要： A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated and used to create and select a number of partial products according to Booth's algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines. The segments may be rounded by adding a rounding constant. Rounding and normalization may be performed in two paths, one assuming an overflow will occur, the other assuming no overflow will occur. The multiplier may also be configured to perform iterative calculations to evaluate constant powers of an operand. Intermediate products that are formed may be rounded and normalized in two paths and then compressed and stored for use in the next iteration. An adjustment constant may also be added to increase the frequency of exactly rounded results.
摘要翻译：公开了能够执行有符号和无符号标量和矢量乘法的乘法器。乘法器配置为以标量或压缩向量形式接收带符号或无符号乘数和被乘数操作数。可以计算乘数和被乘数操作数的有效符号，并用于根据布斯算法创建和选择多个部分乘积。一旦创建并选择了部分产品，就可以对它们进行求和并输出结果。结果可能是有符号或无符号的，可能表示向量或标量。当执行向量乘法时，乘法器可以被配置为产生和选择部分乘积，以便有效地隔离每对向量分量的乘法过程。乘法器还可以被配置为对矢量分量的乘积求和以形成向量点积。最终产品可以分段输出，以便需要更少的总线。可以通过添加舍入常数来对段进行舍入。可以在两个路径中执行舍入和归一化，一个假设将发生溢出，另一个假设不会发生溢出。乘法器还可以被配置为执行迭代计算以评估操作数的恒定功率。形成的中间产品可以在两个路径中进行圆化和归一化，然后压缩并存储以用于下一次迭代。还可以添加调整常数以增加精确舍入结果的频率。

6. 发明申请

US20060101243A1 Multipurpose functional unit with multiply-add and logical test pipeline 有权
标题翻译：多用途功能单元，具有多重加法和逻辑测试管道
公开(公告)号：US20060101243A1
公开(公告)日：2006-05-11
申请号：US10985695
申请日：2004-11-10
申请人： Ming Siu , Stuart Oberman
发明人： Ming Siu , Stuart Oberman
IPC分类号： G06F9/44
CPC分类号： G06F7/483 , G06F9/30014 , G06F9/30021 , G06F9/30025 , G06F9/30032 , G06F9/3875 , G06F9/3885
摘要： A multipurpose functional unit is configurable to support a number of operations including multiply-add and comparison testing operations, as well as other integer and/or floating-point arithmetic operations, Boolean operations, and format conversion operations.
摘要翻译：多用途功能单元可配置为支持多种操作，包括乘法和比较测试操作，以及其他整数和/或浮点运算，布尔运算和格式转换操作。

7. 发明授权

US06397238B2 Method and apparatus for rounding in a multiplier 有权
标题翻译：在乘法器中舍入的方法和装置
公开(公告)号：US06397238B2
公开(公告)日：2002-05-28
申请号：US09782475
申请日：2001-02-12
申请人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
发明人： Stuart Oberman , Norbert Juffa , Ming Siu , Frederick D Weber , Ravikrishna Cherukuri
IPC分类号： G06F752
CPC分类号： G06F7/53 , G06F7/4991 , G06F7/49936 , G06F7/49963 , G06F7/49994 , G06F7/5338 , G06F7/5443 , G06F9/30036 , G06F9/3017 , G06F9/3804 , G06F9/3885 , G06F17/16 , G06F2207/3828
摘要： A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated and used to create and select a number of partial products according to Booth's algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines. The segments may be rounded by adding a rounding constant. Rounding and normalization may be performed in two paths, one assuming an overflow will occur, the other assuming no overflow will occur. The multiplier may also be configured to perform iterative calculations to evaluate constant powers of an operand. Intermediate products that are formed may be rounded and normalized in two paths and then compressed and stored for use in the next iteration. An adjustment constant may also be added to increase the frequency of exactly rounded results.
摘要翻译：公开了能够执行有符号和无符号标量和矢量乘法的乘法器。乘法器配置为以标量或压缩向量形式接收带符号或无符号乘数和被乘数操作数。可以计算乘数和被乘数操作数的有效符号，并用于根据布斯算法创建和选择多个部分乘积。一旦创建并选择了部分产品，就可以对它们进行求和并输出结果。结果可能是有符号或无符号的，可能表示向量或标量。当执行向量乘法时，乘法器可以被配置为产生和选择部分乘积，以便有效地隔离每对向量分量的乘法过程。乘法器还可以被配置为对矢量分量的乘积求和以形成向量点积。最终产品可以分段输出，以便需要更少的总线。可以通过添加舍入常数来对段进行舍入。可以在两个路径中执行舍入和归一化，一个假设将发生溢出，另一个假设不会发生溢出。乘法器还可以被配置为执行迭代计算以评估操作数的恒定功率。形成的中间产品可以在两个路径中进行圆化和归一化，然后压缩并存储以用于下一次迭代。还可以添加调整常数以增加精确舍入结果的频率。

8. 发明授权

US6038583A Method and apparatus for simultaneously multiplying two or more independent pairs of operands and calculating a rounded products 失效
标题翻译：用于同时乘以两个或更多个独立的操作数对并计算舍入乘积的方法和装置
公开(公告)号：US6038583A
公开(公告)日：2000-03-14
申请号：US49854
申请日：1998-03-27
申请人： Stuart Oberman , Ming Siu
发明人： Stuart Oberman , Ming Siu
IPC分类号： G06F7/52 , G06F7/533 , G06F7/544 , G06F9/30 , G06F9/302 , G06F9/318 , G06F9/38 , G06F17/16 , G06F7/38
CPC分类号： G06F7/53 , G06F17/16 , G06F7/5443 , G06F9/30014 , G06F9/30021 , G06F9/30036 , G06F9/3017 , G06F9/3804 , G06F9/3885 , G06F2207/3828 , G06F7/4991 , G06F7/49936 , G06F7/49963 , G06F7/49994 , G06F7/5338
摘要： A multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier is configured to receive signed or unsigned multiplier and multiplicand operands in scalar or packed vector form. An effective sign for the multiplier and multiplicand operands may be calculated based upon each operand's most significant bit and a control signal. The effective signs may then be used to create and select a number of partial products according to Booth's algorithm. Once the partial products have been created and selected, they may be summed and the results may be output. The results may be signed or unsigned, and may represent vector or scalar quantities. When a vector multiplication is performed, the multiplier may be configured to generate and select partial products so as to effectively isolate the multiplication process for each pair of vector components. The multiplier may also be configured to sum the products of the vector components to form the vector dot product. The final product may be output in segments so as to require fewer bus lines. The segments may be rounded by adding a rounding constant. Rounding and normalization may be performed in two paths, one assuming an overflow will occur, the other assuming no overflow will occur.
摘要翻译：公开了能够执行有符号和无符号标量和矢量乘法的乘法器。乘法器配置为以标量或压缩向量形式接收带符号或无符号乘数和被乘数操作数。可以基于每个操作数的最高有效位和控制信号来计算乘法器和被乘数操作数的有效符号。然后根据布斯算法，有效符号可用于创建和选择多个部分乘积。一旦创建并选择了部分产品，就可以对它们进行求和并输出结果。结果可能是有符号或无符号的，可能表示向量或标量。当执行向量乘法时，乘法器可以被配置为产生和选择部分乘积，以便有效地隔离每对向量分量的乘法过程。乘法器还可以被配置为对矢量分量的乘积求和以形成向量点积。最终产品可以分段输出，以便需要更少的总线。可以通过添加舍入常数来对段进行舍入。可以在两个路径中执行舍入和归一化，一个假设将发生溢出，另一个假设不会发生溢出。

9. 发明申请

US20060149803A1 Multipurpose functional unit with multiply-add and format conversion pipeline 有权
标题翻译：具有多重加法和格式转换管道的多用途功能单元
公开(公告)号：US20060149803A1
公开(公告)日：2006-07-06
申请号：US10985674
申请日：2004-11-10
申请人： Ming Siu , Stuart Oberman
发明人： Ming Siu , Stuart Oberman
IPC分类号： G06F9/44
CPC分类号： G06F9/30014 , G06F9/3885
摘要： A multipurpose functional unit is configurable to support a number of operations including multiply-add and format conversion operations, as well as other integer and/or floating-point arithmetic operations, Boolean operations, and logical test operations.
摘要翻译：多用途功能单元可配置为支持多种操作，包括乘法加法和格式转换操作，以及其他整数和/或浮点算术运算，布尔运算和逻辑运算。

10. 发明申请

US20060101244A1 Multipurpose functional unit with combined integer and floating-point multiply-add pipeline 审中-公开
标题翻译：具有组合整数和浮点乘法管道的多用途功能单元
公开(公告)号：US20060101244A1
公开(公告)日：2006-05-11
申请号：US10986531
申请日：2004-11-10
申请人： Ming Siu , Stuart Oberman
发明人： Ming Siu , Stuart Oberman
IPC分类号： G06F9/44
CPC分类号： G06F9/3885 , G06F7/483 , G06F9/30014 , G06F9/30021 , G06F9/30025 , G06F9/30032 , G06F9/3875
摘要： A multipurpose functional unit is configurable to support a number of operations including floating-point and integer multiply-add, operations as well as other integer and/or floating-point arithmetic operations, Boolean operations, comparison testing operations, and format conversion operations.
摘要翻译：多用途功能单元可配置为支持多种操作，包括浮点和整数乘法运算，以及其他整数和/或浮点运算，布尔运算，比较测试运算和格式转换运算。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式