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    • 5. 发明授权
    • Modulator with baseband to phase converter
    • 具有基带到相位转换器的调制器
    • US5881112A
    • 1999-03-09
    • US551970
    • 1995-11-02
    • David L. MuriCharles A. Backof, Jr.
    • David L. MuriCharles A. Backof, Jr.
    • H04L27/233H04L27/22
    • H04L27/2332
    • A phase demodulator (101) is used for sensing the phase.sub.-- angle of a phasor represented by the I and Q signals by first producing the analog I and Q signals in a direct conversion receiver (104). A phase generator (106) is used to approximate the angle of the phasor as represented by the I and Q signals by scaling and comparing the magnitudes of the I and Q signals and making decisions based on their relative magnitudes. The scaling includes successive alteration of the magnitude of the I and Q signals.sub.-- depending on their relative magnitudes. A DSP (108) is used to receive this bit stream representation (302) of the phasor and recover the information signal.
    • 相位解调器(101)用于通过在直接转换接收器(104)中首先产生模拟I和Q信号来感测由I和Q信号表示的相量的相位角。 相位发生器(106)用于通过缩放和比较I和Q信号的幅度并根据它们的相对幅度做出决定来近似由I和Q信号表示的相量的角度。 缩放包括I和Q信号的幅度的连续变化 - 取决于它们的相对幅度。 DSP(108)用于接收相量的该比特流表示(302)并恢复信息信号。
    • 7. 发明授权
    • Delta modulated digital signal detector
    • Delta调制数字信号检测器
    • US4174502A
    • 1979-11-13
    • US951895
    • 1978-10-16
    • Alan L. WilsonCharles A. Backof, Jr.
    • Alan L. WilsonCharles A. Backof, Jr.
    • H04L1/00H04B14/06H04L1/20H03K9/00
    • H04B14/062H04L1/20
    • A detector for delta modulated digital signals is disclosed that provides a signal quality voltage having a magnitude that is indicative of the degree of quality of the detected delta modulated digital signal. The detector totalizes the number of bit transitions occurring in successive N bit intervals. If successive totalized numbers of bit transitions are outside of a predetermined range centered about one-half of N, the detector provides a detect indication signal indicating that the delta modulated digital signal is present. Otherwise, a random or pseudorandom signal such as noise or error bursts may be present. Digital circuitry provides the detect indication signal with a logical high state when successive totalized numbers of bit transitions are outside of the predetermined range, and a logical low state when succesive totalized numbers of bit transitions are within the predetermined range. The detect indication signal may be further integrated and amplified to provide a signal quality voltage which has a magnitude indicative of the quality or signal to noise ratio of the detected delta modulated digital signal. The signal quality voltage may be advantageously utilized in a receiver voting system having a plurality of receivers for selecting the receiver having the highest quality signal.
    • 公开了一种用于增量调制数字信号的检测器,其提供具有指示检测到的增量调制数字信号的质量程度的幅度的信号质量电压。 检测器累加在连续的N位间隔中发生的位转换的数量。 如果位转换的连续累计数量在以N的大约一半为中心的预定范围之外,则检测器提供指示增量调制数字信号存在的检测指示信号。 否则,可能存在诸如噪声或错误突发的随机或伪随机信号。 数字电路在连续的总位数转换超出预定范围时提供具有逻辑高状态的检测指示信号,而当连续的总计数位数转换在预定范围内时,逻辑低电平状态。 检测指示信号可以进一步积分和放大,以提供信号质量电压,其具有指示所检测的增量调制数字信号的质量或信噪比的幅度。 信号质量电压可以有利地用于具有用于选择具有最高质量信号的接收机的多个接收机的接收机投票系统中。
    • 9. 发明授权
    • Digital signal detector
    • 数字信号检测器
    • US4197502A
    • 1980-04-08
    • US951896
    • 1978-10-16
    • Terence E. SumnerCharles A. Backof, Jr.
    • Terence E. SumnerCharles A. Backof, Jr.
    • H04L25/40G01R23/15H04L1/20H04L7/033H04L25/02H04Q1/448H04B1/10
    • H04Q1/4485G01R23/155H04L1/20
    • A digital signal detector is disclosed that detects a serial bit stream transmitted at a predetermined bit frequency. Bit transitions are totallized in a counter over a predetermined time interval. Bit transitions occurring during a good window interval increment the totallized count by one. Bit transitions occurring during a bad window interval decrement the totallized count by one. Bit transitions occurring during a marginal window interval, situated between the good and bad window intervals, do not affect the totallized count. If the counter reaches a predetermined count during the time interval, a detect signal is provided indicating that the digital signal has been detected. The counter can be further loaded with a threshold count for tailoring the digital signal detector for operation at a particular signal-to-noise ratio. Periodic signals that have frequencies that are submultiples of the bit frequency are detected by correlating the digital signal between two predetermined stages of a shift register. The digital signal detector may provide a detector output signal when both the digital signal is detected and periodic signals having submultiple frequencies are not present.
    • 公开了一种数字信号检测器,其检测以预定位频率发送的串行比特流。 位转换在预定时间间隔内在计数器中进行总和。 在良好的窗口间隔期间发生的位转换将总计数增加1。 在错误窗口间隔期间发生的位转换将总计数减1。 在边缘窗口间隔期间发生的位转换位于良好和不良窗口间隔之间,不影响总计数。 如果在时间间隔期间计数器达到预定的计数,则提供指示已经检测到数字信号的检测信号。 该计数器可以进一步加载阈值计数,用于定制数字信号检测器以在特定信噪比下操作。 通过将移位寄存器的两个预定级之间的数字信号相关联来检测具有位频率的次数的频率的周期性信号。 当检测到数字信号并且不存在具有多个频率的周期信号时,数字信号检测器可以提供检测器输出信号。