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    • 1. 发明申请
    • SIMULATION OF DIGITAL CIRCUITS
    • 数字电路仿真
    • US20090265154A1
    • 2009-10-22
    • US12103770
    • 2008-04-16
    • John Joseph Bergkvist, JR.Serafino BuetiFrancis A. KampfDouglas Thomas Massey
    • John Joseph Bergkvist, JR.Serafino BuetiFrancis A. KampfDouglas Thomas Massey
    • G06F9/455
    • G06F17/5022
    • A method for simulating a circuit. The method includes, in response to a first mode change triggering event at a first time point and in response to a first data transfer triggering event at a second time point after the first time point, generating a random value of at least a first random value and a second random value. In response to the generated random value being the first random value, a first input value of an input of the circuit is assigned to an output of the circuit. In response to the generated random value being the second random value, an output value of the output of the circuit is maintained. In response to a second data transfer triggering event at a third time point after the second time point, a second input value of the input of the circuit is assigned to the output of the circuit.
    • 一种模拟电路的方法。 该方法包括响应于在第一时间点的第一模式改变触发事件和响应于在第一时间点之后的第二时间点的第一数据传输触发事件,生成至少第一随机值的随机值 和第二随机值。 响应于产生的随机值是第一随机值,将电路的输入的第一输入值分配给电路的输出。 响应于产生的随机值是第二随机值,维持电路的输出的输出值。 响应于在第二时间点之后的第三时间点的第二数据传输触发事件,将电路的输入的第二输入值分配给电路的输出。
    • 2. 发明授权
    • Simulation of digital circuits
    • 数字电路仿真
    • US08234104B2
    • 2012-07-31
    • US12103770
    • 2008-04-16
    • John Joseph Bergkvist, Jr.Serafino BuetiFrancis A. KampfDouglas Thomas Massey
    • John Joseph Bergkvist, Jr.Serafino BuetiFrancis A. KampfDouglas Thomas Massey
    • G06F17/50
    • G06F17/5022
    • A method for simulating a circuit. The method includes, in response to a first mode change triggering event at a first time point and in response to a first data transfer triggering event at a second time point after the first time point, generating a random value of at least a first random value and a second random value. In response to the generated random value being the first random value, a first input value of an input of the circuit is assigned to an output of the circuit. In response to the generated random value being the second random value, an output value of the output of the circuit is maintained. In response to a second data transfer triggering event at a third time point after the second time point, a second input value of the input of the circuit is assigned to the output of the circuit.
    • 一种模拟电路的方法。 该方法包括响应于在第一时间点的第一模式改变触发事件和响应于在第一时间点之后的第二时间点的第一数据传输触发事件,生成至少第一随机值的随机值 和第二随机值。 响应于产生的随机值是第一随机值,将电路的输入的第一输入值分配给电路的输出。 响应于产生的随机值是第二随机值,维持电路的输出的输出值。 响应于在第二时间点之后的第三时间点的第二数据传输触发事件,电路的输入的第二输入值被分配给电路的输出。
    • 3. 发明授权
    • Circuit design verification
    • 电路设计验证
    • US07480607B2
    • 2009-01-20
    • US11383299
    • 2006-05-15
    • Francis A. KampfDouglas Thomas Massey
    • Francis A. KampfDouglas Thomas Massey
    • G06F17/50
    • G06F17/5022
    • A digital circuit simulation method. The method starts with a digital circuit design which includes: a first source latch, a destination latch, a logic cone, a first WAM circuit electrically coupling an output of the first source latch to a first input of the logic cone, and a WAGG circuit electrically coupling an output of the logic cone and an input of the first source latch. Then, a zero-delay simulation is performed in which if a first situation of (a) the first WAM circuit entering an uncertainty state in which the first WAM circuit generates a random value of 1 or 0 at the first input of the logic cone, (b) the logic cone being vulnerable to a positive glitch, and (c) the output of the logic cone being at logic 0, the WAGG circuit generates a random value of 0 or 1 at the input of the destination latch.
    • 数字电路仿真方法。 该方法从数字电路设计开始,其包括:第一源锁存器,目的地锁存器,逻辑锥,将第一源锁存器的输出电耦合到逻辑锥的第一输入端的第一WAM电路,以及WAGG电路 电耦合逻辑锥的输出和第一源锁存器的输入。 然后,执行零延迟模拟,其中如果(a)第一WAM电路进入不确定状态的第一情况,其中第一WAM电路在逻辑锥的第一输入处产生1或0的随机值, (b)逻辑锥体容易受到正的毛刺影响,并且(c)逻辑锥体的输出为逻辑0,WAGG电路在目的地锁存器的输入处产生0或1的随机值。
    • 6. 发明授权
    • Optimistic transmission flow control including receiver data discards upon inadequate buffering condition
    • 包括接收机数据的乐观传输流量控制在缓冲条件不足时丢弃
    • US06480897B1
    • 2002-11-12
    • US08998965
    • 1997-12-29
    • Christine M. DesnoyersDouglas J. JosephFrancis A. KampfAlan F. Benner
    • Christine M. DesnoyersDouglas J. JosephFrancis A. KampfAlan F. Benner
    • G06F1516
    • G06F15/17368
    • A program product for a message processing system in which messages are transmitted from source nodes to destination nodes. A transmission flow control technique is disclosed in which the source node optimistically sends control information and a data portion of a message, and wherein a destination node discards the data portion of the message if it is unable to accommodate it. The destination node, however, retains enough of the control information to identify the message to the source node, and when the destination node is subsequently able to accommodate the data portion, the destination node issues a request to the source node to retransmit the data portion of the message. Discarding of one message is followed by discards of sequential messages, until the destination node is able to accommodate the data portions of messages. The flow control technique disclosed herein is used, for example, in an environment where buffers are posted to accommodate messages at the destination node, and is particularly suited for conditions arising in multi-tasking systems where the destination node is generally assumed to be prepared to accommodate data, however, if not prepared, is likely not prepared for long periods of time.
    • 用于消息处理系统的程序产品,其中消息从源节点传送到目的地节点。 公开了一种传输流控制技术,其中源节点乐观地发送消息的控制信息和数据部分,并且其中目的地节点丢弃该消息的数据部分,如果它不能容纳该消息。 然而,目的地节点保留足够的控制信息以识别到源节点的消息,并且当目的地节点随后能够容纳数据部分时,目的地节点向源节点发出请求以重新发送数据部分 的消息。 丢弃一个消息之后是顺序消息的丢弃,直到目标节点能够容纳消息的数据部分。 本文公开的流控制技术例如在缓冲器被张贴以适应目的地节点处的消息的环境中使用,并且特别适用于通常假定目的地节点准备准备的多任务系统中出现的条件 容纳数据,但如果没有准备,很可能没有准备好长时间。
    • 7. 发明授权
    • Method and apparatus for reducing data expansion during data compression
    • 用于在数据压缩期间减少数据扩展的方法和装置
    • US06281816B1
    • 2001-08-28
    • US09379864
    • 1999-08-24
    • Francis A. Kampf
    • Francis A. Kampf
    • H03M700
    • H03M7/30G06T9/005H03M7/3086
    • A method and apparatus for reducing data expansion during data compression are provided that allow the coding scheme used to compress data to be swapped between two or more coding schemes. Specifically, a coding window is provided that holds data to be compressed, and the compression potential of data entering or exiting the coding window is calculated. When a first threshold compression potential sum of data entering the window is reached, the coding scheme used to compress the data within the coding window is swapped from one coding scheme to another. A new compression potential sum is set based upon the compression potential of data exiting the window. The compression potential sum comprises a running total of the compression potential of data entering the coding window; and the coding scheme used to compress data within the coding window is swapped from one coding scheme to another when the compression potential sum reaches a first predetermined value. Preferably the first predetermined value is programmable and is related to the bit cost required to swap back and forth between coding schemes. The two preferred coding schemes are ALDC Lempel-Ziv 1 coding and a pass-through coding scheme wherein raw data is passed unencoded. A coding window circuit also is provided that allows analysis of the compression potential of data in accordance with the above method.
    • 提供一种用于在数据压缩期间减少数据扩展的方法和装置,其允许用于压缩在两个或多个编码方案之间交换的数据的编码方案。 具体地说,提供一个保存要压缩的数据的编码窗口,并且计算进入或退出编码窗口的数据的压缩电位。 当达到进入窗口的数据的第一阈值压缩潜力和时,用于压缩编码窗口内的数据的编码方案从一个编码方案交换到另一编码方案。 基于离开窗口的数据的压缩电位设置新的压缩电位和。 压缩电位和包括进入编码窗口的数据的压缩电位的运行总和; 并且当压缩电位和达到第一预定值时,用于压缩编码窗口内的数据的编码方案从一个编码方案交换到另一编码方案。 优选地,第一预定值是可编程的,并且与编码方案之间来回切换所需的位成本相关。 两个优选的编码方案是ALDC Lempel-Ziv 1编码和其中原始数据未经编码的传递编码方案。 还提供一种编码窗口电路,其允许根据上述方法分析数据的压缩电位。
    • 9. 发明授权
    • Automated simulation testbench generation for serializer/deserializer datapath systems
    • 串行器/解串器数据路径系统的自动仿真测试平台生成
    • US07444258B2
    • 2008-10-28
    • US11275035
    • 2005-12-05
    • Francis A. KampfJeanne Trinko-MechlerDavid R. Stauffer
    • Francis A. KampfJeanne Trinko-MechlerDavid R. Stauffer
    • G01R31/00G06F19/00
    • G06F17/5022G01R31/318314
    • Embodiments herein present a method for automated simulation testbench generation for serializer/deserializer datapath systems. The method provides a database of transactors for generating and checking data within the datapath system, wherein the transactors are adaptable to arbitrary configurations of the datapath system. The database is provided with a single set of transactors per core. Next, the method automatically selects one set of transactors from the database for inclusion into the simulation testbenches. Following this, the method maps the first datapath and the second datapath through the datapath system by interconnecting the selected set of the transactors with the datapath system. The method further comprises setting control pins on the cores to facilitate propagation of the data through the cores of the datapath system. Subsequently, the control pins are traced to input ports and control registers.
    • 本文的实施例提供了一种用于串行器/解串器数据路径系统的自动化仿真测试台生成的方法。 该方法提供用于生成和检查数据路径系统内的数据的事务处理器的数据库,其中事务处理器适用于数据通路系统的任意配置。 数据库提供了每个核心单个事务处理器集合。 接下来,该方法自动从数据库中选择一组事务处理器,以便包含在仿真测试台中。 接下来,该方法通过将所选择的一组事务处理器与数据路径系统相互连接,通过数据路径系统映射第一个数据路径和第二个数据路径。 该方法还包括设置核上的控制引脚以便于数据通过数据路径系统的核心的传播。 随后,控制引脚被跟踪到输入端口和控制寄存器。