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1. 发明申请

US20050154546A1 Hardware implementation of the pseudo-spectral time-domain method 有权
标题翻译：伪光谱时域方法的硬件实现
公开(公告)号：US20050154546A1
公开(公告)日：2005-07-14
申请号：US10517224
申请日：2003-06-24
申请人： John Humphrey , James Durbano , Dennis Prather
发明人： John Humphrey , James Durbano , Dennis Prather
IPC分类号： G01R23/16 , G06F17/13
CPC分类号： G06F17/13
摘要： A computer hardware configuration for performing the pseudo-spectral time-domain (PSTD) method on data. The hardware configuration includes a forward fast Fourier transform (FFT) unit that calculates a forward fast Fourier transform (FFT) from the data, and a complex multiplication unit that receives the FFT-processed data and calculates a spatial derivative in the frequency domain from the FFT-processed data. The hardware configuration further includes an inverse fast Fourier transform (IFFT) unit that converts the spatial derivative in the frequency domain from the complex multiplication unit into the time domain, and a computation engine that solves a PSTD equation based upon the spatial derivative in the time domain received from the IFFT unit.
摘要翻译：一种用于对数据执行伪频谱时域（PSTD）方法的计算机硬件配置。硬件配置包括从数据计算正向快速傅里叶变换（FFT）的前向快速傅里叶变换（FFT）单元，以及接收经FFT处理的数据并从频域计算空间导数的复数乘法单元 FFT处理数据。硬件配置还包括将频域中的空间导数从复数乘法转换为时域的逆快速傅里叶变换（IFFT）单元，以及基于时间上的空间导数求解PSTD方程的计算引擎从IFFT单位收到的域。

2. 发明申请

US20050120178A1 Organization of cache memory for hardware acceleration of the finite-difference time-domain method 有权
标题翻译：组织高速缓存用于硬件加速的有限差分时域方法
公开(公告)号：US20050120178A1
公开(公告)日：2005-06-02
申请号：US10808895
申请日：2004-03-24
申请人： John Humphrey , James Durbano , Fernando Ortiz , Dennis Prather
发明人： John Humphrey , James Durbano , Fernando Ortiz , Dennis Prather
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0893
摘要： Disclosed herein is an organization of cache memory for hardware acceleration of the FDTD method. The organization of cache memory for hardware acceleration of the FDTD method provides a substantial speedup to the finite-difference time-domain (FDTD) algorithm when implemented in a piece of digital hardware. The organization of cache memory for hardware acceleration of the FDTD method utilizes a very high bandwidth dual-port on-chip memory in a particular way. By creating many small banks of internal memory and arranging them carefully, all data dependencies can be statically wired. This allows for a many-fold speedup over SRAM-based solutions and removes the burden of data dependence calculation that streaming SDRAM-based solutions must perform.
摘要翻译：这里公开了用于FDTD方法的硬件加速的高速缓冲存储器的组织。 FDTD方法的硬件加速缓冲存储器的组织在一片数字硬件中实现时，对有限差分时域（FDTD）算法提供了显着的加速。用于FDTD方法的硬件加速的高速缓冲存储器的组织以特定的方式利用非常高带宽的双端口片上存储器。通过创建许多小内存并小心排列，所有数据依赖都可以静态连接。这允许对基于SRAM的解决方案进行多重加速，并消除基于SDRAM的解决方案必须执行的数据依赖性计算的负担。

3. 发明申请

US20050273479A1 Reformulation of the finite-difference time-domain algorithm for hardware-based accelerators 有权
标题翻译：重构基于硬件的加速器的有限差分时域算法
公开(公告)号：US20050273479A1
公开(公告)日：2005-12-08
申请号：US11100861
申请日：2005-04-07
申请人： James Durbano , John Humphrey , Fernando Ortiz , Dennis Prather , Mark Mirotznik
发明人： James Durbano , John Humphrey , Fernando Ortiz , Dennis Prather , Mark Mirotznik
IPC分类号： G06F7/00 , G06F17/50
CPC分类号： G06F17/5018
摘要： A hardware-based acceleration platform for computational electromagnetic algorithms, specifically the finite-difference time-domain (“FDTD”) method, comprises reformulating the FDTD algorithm in order to make it more hardware friendly. This reformulation makes use of split fields at every node in the mesh, and combines total- and scattered-field formulations into a single, hybrid formulation. By precomputing coefficients for the nodes in the mesh, it is possible for a single set of equations to support plane waves, point sources, PML ABCs, and PEC walls. In the method sources are determined by means of a lookup table, rather than through direct hardware computations. All of these modifications enable the hardware designer to much more easily develop an FDTD accelerator.
摘要翻译：用于计算电磁算法的硬件加速平台，特别是有限差分时域（“FDTD”）方法，包括重新配置FDTD算法，使其更加硬件友好。这种重新设计利用网格中每个节点的分割场，并将总场分布和散射场拟合组合成单个混合公式。通过预先计算网格中节点的系数，单个方程组可以支持平面波，点源，PML ABC和PEC墙。在方法中，源通过查找表而不是通过直接硬件计算来确定。所有这些修改使得硬件设计人员能够更容易地开发FDTD加速器。

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