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1. 发明授权

US5434997A Method and apparatus for testing and debugging a tightly coupled mirrored processing system 失效
标题翻译：用于测试和调试紧耦合镜像处理系统的方法和装置
公开(公告)号：US5434997A
公开(公告)日：1995-07-18
申请号：US955980
申请日：1992-10-02
申请人： John A. Landry , Jeff W. Wolford , Walter G. Fry , Roger E. Tipley
发明人： John A. Landry , Jeff W. Wolford , Walter G. Fry , Roger E. Tipley
IPC分类号： G06F11/16 , G06F11/00 , G06F17/30
CPC分类号： G06F11/1637 , G06F11/1679
摘要： A method and apparatus for operating tightly coupled mirrored processors in a computer system. A plurality of CPU boards are coupled to a processor/memory bus, commonly called a host bus. Each CPU board includes a processor as well as various ports, timers, and interrupt controller logic local to the respective processor. The processors on one or more CPU boards are designated as master processors, with the processors on the remaining CPU boards being designated as mirroring or slave processors. A master processor has full access to the host bus and a second, multiplexed bus for read and write cycles, whereas the slave processors are prevented from writing to any bus. The slave processors compare write data and various control signals with that generated by its respective master processor for disparities. The system includes interrupt controller synchronization logic to synchronize interrupt requests as well as timer synchronization logic to synchronize the timers in each of the master and slave CPUs to guarantee that the master and slave CPUs operate in lockstep.
摘要翻译：一种用于在计算机系统中操作紧耦合的镜像处理器的方法和装置。多个CPU板耦合到通常称为主机总线的处理器/存储器总线。每个CPU板包括一个处理器以及各个处理器本地的各种端口，定时器和中断控制器逻辑。一个或多个CPU板上的处理器被指定为主处理器，其余CPU板上的处理器被指定为镜像或从属处理器。主处理器具有对主机总线的完全访问和用于读和写周期的第二复用总线，而从处理器被阻止写入任何总线。从处理器将写入数据和各种控制信号与其相应的主处理器产生的差异进行比较。该系统包括中断控制器同步逻辑，以同步中断请求以及定时器同步逻辑，以同步每个主CPU和从CPU的定时器，以保证主CPU和从CPU处于锁定状态。

2. 发明授权

US06732301B1 Serial bus diagnostic port of a digital system 有权
标题翻译：数字系统的串行总线诊断端口
公开(公告)号：US06732301B1
公开(公告)日：2004-05-04
申请号：US09519443
申请日：2000-03-06
申请人： John A. Landry , William W. Diehl
发明人： John A. Landry , William W. Diehl
IPC分类号： H02H305
CPC分类号： G06F11/267
摘要： A digital system provides a serial bus diagnostic port such as, for example, a universal serial bus (USB) diagnostic port. The USB diagnostic port can include a USB slave device operable to interface to a universal serial bus, a flash memory controller interface coupled to the USB slave device and operable to interface to a flash memory controller, and a test access port controller coupled to the USB slave device and operable to interface to a test access port. The diagnostic port can further include a system interface coupled to the USB slave device and operable to interface to an integrated controller independently of an operating system. Via the diagnostic port, a USB testing tool with testing software can access and debug internal logic of the digital system. As an alternative to a USB diagnostic port, the serial bus diagnostic port can be implemented in a variety of wired or wireless implementations such as, for example, an I.E.E.E. 1394 diagnostic port, an Ethernet diagnostic port, or a wireless Internet diagnostic port. Further, the serial bus diagnostic port can, for example, be used for software development, in-factory testing or in-field diagnostics of the digital system.
摘要翻译：数字系统提供串行总线诊断端口，例如通用串行总线（USB）诊断端口。 USB诊断端口可以包括可操作以连接到通用串行总线的USB从设备，耦合到USB从设备并且可操作以连接到闪存控制器的闪存控制器接口以及耦合到USB的测试访问端口控制器从设备并且可操作以连接到测试接入端口。诊断端口还可以包括耦合到USB从设备的系统接口，并且可操作以独立于操作系统与集成控制器接口。通过诊断端口，具有测试软件的USB测试工具可以访问和调试数字系统的内部逻辑。作为USB诊断端口的替代方案，串行总线诊断端口可以在各种有线或无线实现中实现，例如，I.E.E.E.E。 1394诊断端口，以太网诊断端口或无线Internet诊断端口。此外，串行总线诊断端口可以例如用于数字系统的软件开发，工厂内测试或现场诊断。

3. 发明授权

US09262418B2 Method and system for performing system maintenance in a computing device 有权
标题翻译：在计算设备中执行系统维护的方法和系统
公开(公告)号：US09262418B2
公开(公告)日：2016-02-16
申请号：US13825591
申请日：2010-09-22
申请人： John A. Landry
发明人： John A. Landry
IPC分类号： G06F9/00 , G06F9/24 , G06F15/177 , G06F17/30 , G06F9/44
CPC分类号： G06F17/30011 , G06F9/4401
摘要： The present disclosure provides a computer-implemented method of performing system maintenance in a computing device. The method includes launching a maintenance application in a pre-operating system environment of a computing device (204). The maintenance application performs at least one hardware maintenance operation on the hardware of the computing device during device down time. The method also includes generating a log file based on the results of the at least one hardware maintenance operation (206). The method also includes terminating the maintenance application, launching the operating system of the computing device (208), and accessing the log file (210).
摘要翻译：本公开提供了一种在计算设备中执行系统维护的计算机实现的方法。该方法包括在计算设备（204）的预操作系统环境内启动维护应用。维护应用程序在设备停机时间内对计算设备的硬件执行至少一次硬件维护操作。该方法还包括基于至少一个硬件维护操作的结果来生成日志文件（206）。该方法还包括终止维护应用，启动计算设备（208）的操作系统以及访问日志文件（210）。

4. 发明授权

US6154804A Multiprocessor communication using reduced addressing lines 失效
标题翻译：使用减少寻址行的多处理器通信
公开(公告)号：US6154804A
公开(公告)日：2000-11-28
申请号：US250232
申请日：1999-02-15
申请人： Javier F. Izquierdo , John A. Landry
发明人： Javier F. Izquierdo , John A. Landry
IPC分类号： G06F12/02 , G06F12/08 , G06F15/17 , G06F13/00
CPC分类号： G06F15/17 , G06F12/0284 , G06F12/0806
摘要： A method for communication between multiple processors using registers that are accessed by four register select lines which are translated from the original system address. The address translation is performed off of the main processor board to reduce loading effects on the local bus and reduces the pin count of processor board. A signal representing which of the processors is currently active is used as a pseudo address line for the purpose of the translation. The original addresses of the I/O registers may be either input/output or memory mapped.
摘要翻译：一种使用由原始系统地址翻译的四个寄存器选择线访问的寄存器的多个处理器之间进行通信的方法。地址转换是从主处理器板执行的，以减少对本地总线的负载影响，并减少处理器板的引脚数。代表处理器当前处于活动状态的信号被用作用于转换目的的伪地址线。 I / O寄存器的原始地址可以是输入/输出或存储器映射。

5. 发明授权

US5367689A Apparatus for strictly ordered input/output operations for interrupt system integrity 失效
标题翻译：用于中断系统完整性的严格排序输入/输出操作的设备
公开(公告)号：US5367689A
公开(公告)日：1994-11-22
申请号：US955508
申请日：1992-10-02
申请人： Dale J. Mayer , John A. Landry , Paul R. Culley
发明人： Dale J. Mayer , John A. Landry , Paul R. Culley
IPC分类号： G06F13/24 , G06F9/00
CPC分类号： G06F13/24
摘要： A method and apparatus which maintains strict ordering of processor cycles to guarantee that a processor write, such as an EOI instruction, is not executed to the interrupt controller prior to the interrupt request from a requesting device being cleared at the interrupt controller, thus maintaining system integrity. Interrupt controller logic is included on each respective CPU board. The processor can access the interrupt controller over a local bus without having to access the host bus or the expansion bus and thus an interrupt controller access could be completed before a previously generated I/O cycle has completed. Therefore, the apparatus which tracks expansion bus cycles and interrupt controller accesses and maintains strict ordering of these cycles to guarantee that an interrupt request is cleared at the interrupt controller prior to execution of write operation to the interrupt controller.
摘要翻译：一种保持处理器周期的严格排序以保证在来自请求设备在中断控制器处被清除的中断请求之前不向中断控制器执行诸如EOI指令之类的处理器写入的方法和装置，因此维护系统诚信中断控制器逻辑包含在每个相应的CPU板上。处理器可以通过本地总线访问中断控制器，而无需访问主机总线或扩展总线，因此在先前生成的I / O周期完成之前可以完成中断控制器访问。因此，跟踪扩展总线周期和中断控制器的设备访问并维护这些周期的严格排序，以保证在执行到中断控制器的写操作之前在中断控制器处清除中断请求。

6. 发明授权

US5341494A Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals 失效
标题翻译：存储器访问系统，具有使用写保护和选通信号的接口和存储器选择单元
公开(公告)号：US5341494A
公开(公告)日：1994-08-23
申请号：US165514
申请日：1993-12-10
申请人： John S. Thayer , Dale J. Mayer , Javier F. Izquierdo , Paul R. Culley , John A. Landry
发明人： John S. Thayer , Dale J. Mayer , Javier F. Izquierdo , Paul R. Culley , John A. Landry
IPC分类号： G06F12/06
CPC分类号： G06F12/0653
摘要： A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module connected to a memory system. A RAM is addressed by the system address lines defining 128 kbyte blocks, with the output data providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module. Various other parameters such as write protect status and memory location are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided.
摘要翻译：存储器映射和模块使能电路，用于允许为连接到存储器系统的任何模块中的任何位置定义逻辑128K字节的存储器块。 RAM由定义128千字节块的系统地址线寻址，输出数据为特定存储器模块提供行地址选通使能信号，以及将128K字节块放置在模块内所需的地址值。各种其他参数，如写保护状态和存储器位置也由RAM提供。提供了用于编程和读取RAM的电路和技术。

7. 发明授权

US5201055A Multiprocessing system includes interprocessor encoding and decoding logic used for communication between two cards through reduced addressing lines 失效
标题翻译：多协议系统包括用于通过减少寻址线路的两个卡之间进行通信的交织器编码和解码逻辑
公开(公告)号：US5201055A
公开(公告)日：1993-04-06
申请号：US431659
申请日：1989-11-03
申请人： Javier F. Izquierdo , John A. Landry
发明人： Javier F. Izquierdo , John A. Landry
IPC分类号： G06F12/02 , G06F12/08 , G06F15/17
CPC分类号： G06F15/17 , G06F12/0284 , G06F12/0806
摘要： A method for communication between multiple processors using registers that are accessed by four register select lines which are translated from the original system address. The address translation is performed off of the main processor board to reduce loading effects on the local bus and reduces the pin count of processor board. A signal representing which of the processors is currently active is used as a pseudo address line for the purpose of the translation. The original addresses of the I/O registers may be either input/output or memory mapped.

8. 发明申请

US20140231504A1 DECISION DEVICE AND METHOD THEREOF 有权
标题翻译：决策设备及其方法
公开(公告)号：US20140231504A1
公开(公告)日：2014-08-21
申请号：US14240391
申请日：2011-09-30
申请人： Stephen M. DeRoos , Miles K. Thorland , Stephen M. Brethauer , Craig M. Blackwood , John A. Landry
发明人： Stephen M. DeRoos , Miles K. Thorland , Stephen M. Brethauer , Craig M. Blackwood , John A. Landry
IPC分类号： G06F17/30
CPC分类号： G06F17/30879 , G06F17/30528 , G06F17/30554 , G06K19/06046 , G06Q10/06
摘要： Decision devices, systems, and methods to provide a product resource are provided herein. The decision devices include an analysis engine. The analysis engine receives an information resource and at least one product parameter. The analysis engine searches the information resource to identify at least one search result and dynamically analyzes the at least one search result to provide the product resource.
摘要翻译：本文提供了提供产品资源的决策设备，系统和方法。决策设备包括分析引擎。分析引擎接收信息资源和至少一个产品参数。分析引擎搜索信息资源以识别至少一个搜索结果，并动态分析至少一个搜索结果以提供产品资源。

9. 发明申请

US20130185299A1 METHOD AND SYSTEM FOR PERFORMING SYSTEM MAINTENANCE IN A COMPUTING DEVICE 有权
标题翻译：用于在计算机设备中执行系统维护的方法和系统
公开(公告)号：US20130185299A1
公开(公告)日：2013-07-18
申请号：US13825591
申请日：2010-09-22
申请人： John A. Landry
发明人： John A. Landry
IPC分类号： G06F17/30
CPC分类号： G06F17/30011 , G06F9/4401
摘要： The present disclosure provides a computer-implemented method of performing system maintenance in a computing device. The method includes launching a maintenance application in a pre-operating system environment of a computing device (204). The maintenance application performs at least one hardware maintenance operation on the hardware of the computing device during device down time. The method also includes generating a log the based on the results of the at least one hardware maintenance operation (206). The method also includes terminating the maintenance application, launching the operating system of the computing device (208), and accessing the log the (210).
摘要翻译：本公开提供了一种在计算设备中执行系统维护的计算机实现的方法。该方法包括在计算设备（204）的预操作系统环境内启动维护应用。维护应用程序在设备停机时间内对计算设备的硬件执行至少一次硬件维护操作。该方法还包括基于至少一个硬件维护操作的结果生成日志（206）。该方法还包括终止维护应用，启动计算设备（208）的操作系统，以及访问日志（210）。

10. 发明授权

US08230006B2 Remote client management 有权
标题翻译：远程客户端管理
公开(公告)号：US08230006B2
公开(公告)日：2012-07-24
申请号：US12639109
申请日：2009-12-16
申请人： John A. Landry , Eric Gagneraud , Daniel Robert Oswalt , Cesar Augusto Rosa
发明人： John A. Landry , Eric Gagneraud , Daniel Robert Oswalt , Cesar Augusto Rosa
IPC分类号： G06F15/16
CPC分类号： H04L41/0816 , H04L41/0213
摘要： A method for managing remote clients includes retrieving a client version identifier for an application program running on a client. The client version identifier is compared with a master version identifier for a master configuration file on a server. An active configuration of the application program on the client is altered while the application program is running.
摘要翻译：用于管理远程客户端的方法包括检索在客户端上运行的应用程序的客户端版本标识符。将客户端版本标识符与服务器上的主配置文件的主版本标识符进行比较。客户端上的应用程序的活动配置在应用程序运行时被更改。

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