专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130056855A1 METHOD OF MANUFACTURING IC COMPRISING A BIPOLAR TRANSISTOR AND IC 有权
标题翻译：制造包含双极晶体管和IC的IC的方法
公开(公告)号：US20130056855A1
公开(公告)日：2013-03-07
申请号：US13599389
申请日：2012-08-30
申请人： Johannes Josephus Theodorus Marinus DONKERS , Petrus Hubertus Cornelis MAGNEE , Blandine DURIEZ , Evelyne GRIDELET , Hans MERTENS , Tony VANHOUCKE
发明人： Johannes Josephus Theodorus Marinus DONKERS , Petrus Hubertus Cornelis MAGNEE , Blandine DURIEZ , Evelyne GRIDELET , Hans MERTENS , Tony VANHOUCKE
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L21/8249 , H01L27/0623 , H01L29/1004 , H01L29/161 , H01L29/165 , H01L29/456 , H01L29/66242
摘要： Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.
摘要翻译：公开了一种集成电路和制造包括双极晶体管的集成电路的方法，所述方法包括提供包括由包括集电极的有源区域分离的一对隔离区域的衬底; 在所述衬底上形成基层堆叠; 形成具有第一迁移温度和蚀刻停止层的迁移层; 形成具有第二迁移温度的基底接触层; 蚀刻基底接触层中的发射器窗口，从而形成从发射器窗口延伸的空腔; 并在氢气氛中将所得结构暴露于第一迁移温度，由此用迁移层材料填充空腔。

2. 发明申请

US20130087799A1 BIPOLAR TRANSISTOR MANUFACTURING METHOD, BIPOLAR TRANSISTOR AND INTEGRATED CIRCUIT 有权
标题翻译：双极晶体管制造方法，双极晶体管和集成电路
公开(公告)号：US20130087799A1
公开(公告)日：2013-04-11
申请号：US13616400
申请日：2012-09-14
申请人： Evelyne GRIDELET , Johannes Josephus Theodorus Marinus DONKERS , Tony VANHOUCKE , Petrus Hubertus Cornelis MAGNEE , Hans MERTENS , Blandine DURIEZ
发明人： Evelyne GRIDELET , Johannes Josephus Theodorus Marinus DONKERS , Tony VANHOUCKE , Petrus Hubertus Cornelis MAGNEE , Hans MERTENS , Blandine DURIEZ
IPC分类号： H01L29/739 , H01L21/331
CPC分类号： H01L29/732 , H01L29/66242 , H01L29/7378
摘要： Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.
摘要翻译：公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10）在所述衬底上形成层堆叠，所述层堆叠包括在所述基底层上方的基底层（14,14'），硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基底接触层（40）盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

3. 发明申请

US20110121364A1 HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：异相双极晶体管
公开(公告)号：US20110121364A1
公开(公告)日：2011-05-26
申请号：US12912030
申请日：2010-10-26
申请人： Johannes Josephus Theodorus Marinus DONKERS , Tony VANHOUCKE , Hans MERTENS
发明人： Johannes Josephus Theodorus Marinus DONKERS , Tony VANHOUCKE , Hans MERTENS
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L21/8249 , H01L29/66242
摘要： According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter.
摘要翻译：根据示例性实施例，异质结双极晶体管HBT包括浅沟槽隔离，STI，与埋藏式集电极接触的掩埋集电极漂移区周围的结构。沉积并蚀刻包括栅极氧化物和栅极的栅极堆叠，以在掩埋集电极漂移区域上限定基极窗并与STI结构重叠。继续蚀刻处理以选择性地蚀刻STI结构之间的掩埋的集电极漂移区域以形成基底阱。可选择性沉积SiGeC，以在基底阱中形成外延硅 - 锗，以与基底阱和基底窗的侧壁上的掩埋集电极漂移区和多晶硅 - 锗接触。然后形成间隔物以及发射体。

4. 发明申请

US20110198591A1 METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：制备双功能双极晶体管和异质双极晶体管的方法
公开(公告)号：US20110198591A1
公开(公告)日：2011-08-18
申请号：US13005435
申请日：2011-01-12
申请人： Philippe MEUNIER-BEILLARD , Johannes Josephus Theodorus Marinus DONKERS , Hans MERTENS , Tony VANHOUCKE
发明人： Philippe MEUNIER-BEILLARD , Johannes Josephus Theodorus Marinus DONKERS , Hans MERTENS , Tony VANHOUCKE
IPC分类号： H01L29/04 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： Disclosed is a method of forming a heterojunction bipolar transistor (HBT), comprising depositing a first stack comprising an polysilicon layer (16) and a sacrificial layer (18) on a mono-crystalline silicon substrate surface (10); patterning the first stack to form a trench (22) extending to the substrate; depositing a silicon layer (24) over the resultant structure; depositing a silicon-germanium-carbon layer (26) over the resultant structure; selectively removing the silicon-germanium-carbon layer (26) from the sidewalls of the trench (22); depositing a boron-doped silicon-germanium-carbon layer (28) over the resultant structure; depositing a further silicon-germanium-carbon layer (30) over the resultant structure; depositing a boron-doped further silicon layer (32) over the resultant structure; forming dielectric spacers (34) on the sidewalls of the trench (22); filling the trench (22) with an emitter material (36); exposing polysilicon regions (16) outside the side walls of the trench by selectively removing the sacrificial layer (18) of the first stack; implanting boron impurities into the exposed polysilicon regions (16) to define base implants; and exposing the resultant structure to a thermal budget for annealing the boron impurities. A HBT formed by this method is also disclosed.
摘要翻译：公开了一种形成异质结双极晶体管（HBT）的方法，包括在单晶硅衬底表面（10）上沉积包括多晶硅层（16）和牺牲层（18）的第一堆叠; 图案化第一堆叠以形成延伸到衬底的沟槽（22）; 在所得结构上沉积硅层（24）; 在所得结构上沉积硅 - 锗 - 碳层（26）; 从所述沟槽（22）的侧壁选择性地去除所述硅 - 锗 - 碳层（26）。在所得结构上沉积硼掺杂的硅 - 锗 - 碳层（28）; 在所得结构上沉积另外的硅 - 锗 - 碳层（30）; 在所得结构上沉积硼掺杂的另外的硅层（32）; 在所述沟槽（22）的侧壁上形成介电间隔物（34）; 用发射体材料（36）填充沟槽（22）; 通过选择性地去除第一堆叠的牺牲层（18），在沟槽的侧壁外露出多晶硅区域（16）; 将硼杂质注入暴露的多晶硅区域（16）中以限定基底植入物; 并将所得结构暴露于用于退火硼杂质的热预算。还公开了通过该方法形成的HBT。

5. 发明申请

US20130178037A1 METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：制备双功能双极晶体管和异质双极晶体管的方法
公开(公告)号：US20130178037A1
公开(公告)日：2013-07-11
申请号：US13547067
申请日：2012-07-12
申请人： Philippe MEUNIER-BEILLARD , Johannes Josephus Theodorus Marinus DONKERS , Hans MERTENS , Tony VANHOUCKE
发明人： Philippe MEUNIER-BEILLARD , Johannes Josephus Theodorus Marinus DONKERS , Hans MERTENS , Tony VANHOUCKE
IPC分类号： H01L29/66
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： A method of forming a heterojunction bipolar transistor by depositing a first stack comprising an polysilicon layer and a sacrificial layer on a mono-crystalline silicon substrate surface; patterning that stack to form a trench extending to the substrate; depositing a silicon layer over the resultant structure; depositing a silicon-germanium-carbon layer over the resultant structure; selectively removing the silicon-germanium-carbon layer from the sidewalls of the trench; depositing a boron-doped silicon-germanium-carbon layer over the resultant structure; depositing a further silicon-germanium-carbon layer over the resultant structure;depositing a boron-doped further silicon layer over the resultant structure; forming dielectric spacers on the trench sidewalls; filling the trench with emitter material; exposing polysilicon regions outside the trench side walls by selectively removing the sacrificial layer; implanting boron impurities into the exposed polysilicon regions to define base implants; and exposing the resultant structure to a thermal budget for annealing the boron impurities.
摘要翻译：一种通过在单晶硅衬底表面上沉积包括多晶硅层和牺牲层的第一堆叠来形成异质结双极晶体管的方法; 图案化该叠层以形成延伸到衬底的沟槽; 在所得结构上沉积硅层; 在所得结构上沉积硅 - 锗 - 碳层; 从沟槽的侧壁选择性地去除硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的硅 - 锗 - 碳层; 在所得结构上沉积另外的硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的另外的硅层; 在沟槽侧壁上形成电介质间隔物; 用发射体材料填充沟槽; 通过选择性地去除牺牲层来暴露沟槽侧壁外的多晶硅区域; 将硼杂质注入暴露的多晶硅区域以限定基底植入物; 并将所得结构暴露于用于退火硼杂质的热预算。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式