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1. 发明授权

US07660372B2 Efficient header acquisition 失效
标题翻译：高效头部采集
公开(公告)号：US07660372B2
公开(公告)日：2010-02-09
申请号：US11054652
申请日：2005-02-09
申请人： Jind-Yeh Lee , Tommy Yu , Alan Kwentus
发明人： Jind-Yeh Lee , Tommy Yu , Alan Kwentus
IPC分类号： H03D3/24
CPC分类号： H04L7/042
摘要： In an integrated satellite receiver, improved header acquisition techniques are described for quickly locating a header symbol sequence in a data stream substantially implemented on a single CMOS integrated circuit. To identify the location of a header symbol sequence in a data stream, a selected header acquisition technique employs a real time correlator followed by an accumulator. Once accumulation over a predetermined number of frames is finished, the largest or maximum value among the accumulated correlator values is identified. If the maximum value exceeds a threshold, it will be declared as a peak and the address associated is the peak timing.
摘要翻译：在集成卫星接收机中，描述了改进的报头获取技术，用于将标题符号序列快速定位在基本上在单个CMOS集成电路上实现的数据流中。为了识别数据流中标题符号序列的位置，所选择的报头获取技术采用实时相关器，后跟累加器。一旦累积超过预定数量的帧，则识别所累积的相关器值中的最大值或最大值。如果最大值超过阈值，它将被声明为峰值，并且相关的地址是峰值时序。

2. 发明申请

US20060176984A1 Efficient header acquisition 失效
标题翻译：高效的头采集
公开(公告)号：US20060176984A1
公开(公告)日：2006-08-10
申请号：US11054652
申请日：2005-02-09
申请人： Jind-Yeh Lee , Tommy Yu , Alan Kwentus
发明人： Jind-Yeh Lee , Tommy Yu , Alan Kwentus
IPC分类号： H04B1/69
CPC分类号： H04L7/042
摘要： In an integrated satellite receiver, improved header acquisition techniques are described for quickly locating a header symbol sequence in a data stream substantially implemented on a single CMOS integrated circuit. To identify the location of a header symbol sequence in a data stream, a selected header acquisition technique employs a real time correlator followed by an accumulator. In accordance with an alternative embodiment which reduces the cost very efficiently, a real time correlator is followed by a comparator to pick out and store the top N correlator values from NS symbols in a frame. The timing addresses associated with the stored correlator values are used during an accumulation mode of operation whereby a cumulative memory is used to accumulate the correlator value of each stored timing address. Once accumulation over a predetermined number of frames is finished, the largest or maximum value among the accumulated correlator values is identified. If the maximum value exceeds a threshold, it will be declared as a peak and the address associated is the peak timing.
摘要翻译：在集成卫星接收机中，描述了改进的报头获取技术，用于将标题符号序列快速定位在基本上在单个CMOS集成电路上实现的数据流中。为了识别数据流中标题符号序列的位置，所选择的报头获取技术采用实时相关器，后跟累加器。根据可以非常有效地降低成本的替代实施例，实时相关器之后是比较器，以从帧中的NS符号中挑选出并存储前N个相关器值。与存储的相关器值相关联的定时地址在累加操作模式期间使用，由此累积存储器用于累积每个存储的定时地址的相关器值。一旦累积超过预定数量的帧，则识别所累积的相关器值中的最大值或最大值。如果最大值超过阈值，它将被声明为峰值，并且相关的地址是峰值时序。

3. 发明申请

US20050249307A1 Integrated burst FSK receiver 失效
标题翻译：集成突发FSK接收机
公开(公告)号：US20050249307A1
公开(公告)日：2005-11-10
申请号：US10952171
申请日：2004-09-29
申请人： Tommy Yu , Steve Krafft , Steven Jaffe , Alan Kwentus
发明人： Tommy Yu , Steve Krafft , Steven Jaffe , Alan Kwentus
IPC分类号： H03D3/00 , H03D7/16 , H04L27/00 , H04L27/10 , H04L27/233
CPC分类号： H04L27/2334 , H03D3/004 , H03D3/007 , H03D7/165
摘要： An integrated burst FSK receiver is provided to receive and interpret an RF signal using FSK modulation. The integrated burst FSK receiver uses a programmable RF local oscillator to mix a received signal down to an IF range or baseband, where it is filtered and sampled for subsequent digital processing. Digital filtering and detection are employed to improve overall bit error rate performance and receiver sensitivity. A programmable digital low-pass or band-pass filter can also be used to suppress interference. A matched filter correlator can be used for detection and symbol timing adjustment in one mode, while an adaptive frequency comparator can be used in another mode. Circuits are provided that estimate carrier offset, frequency deviation and signal strength. These measurements can then be used to optimize the receiver performance. A method for receiving and interpreting an RF signal using FSK modulation is also provided.
摘要翻译：提供集成突发FSK接收机，以使用FSK调制来接收和解释RF信号。集成突发FSK接收机使用可编程RF本地振荡器将接收到的信号混合到IF范围或基带，在其中对其进行滤波和采样以用于随后的数字处理。采用数字滤波和检测来提高总体误码率性能和接收机灵敏度。也可以使用可编程数字低通滤波器或带通滤波器来抑制干扰。匹配滤波器相关器可用于一种模式下的检测和符号定时调整，而自适应频率比较器可用于另一种模式。提供了估计载波偏移，频率偏差和信号强度的电路。然后可以使用这些测量来优化接收机性能。还提供了一种使用FSK调制来接收和解释RF信号的方法。

4. 发明授权

US07903764B2 Integrated burst FSK receiver 失效
标题翻译：集成突发FSK接收机
公开(公告)号：US07903764B2
公开(公告)日：2011-03-08
申请号：US10952171
申请日：2004-09-29
申请人： Tommy Yu , Steve Krafft , Steven Jaffe , Alan Kwentus
发明人： Tommy Yu , Steve Krafft , Steven Jaffe , Alan Kwentus
IPC分类号： H03K9/06 , H04L27/14
CPC分类号： H04L27/2334 , H03D3/004 , H03D3/007 , H03D7/165
摘要： An integrated burst FSK receiver is provided to receive and interpret an RF signal using FSK modulation. The integrated burst FSK receiver uses a programmable RF local oscillator to mix a received signal down to an IF range or baseband, where it is filtered and sampled for subsequent digital processing. Digital filtering and detection are employed to improve overall bit error rate performance and receiver sensitivity. A programmable digital low-pass or band-pass filter can also be used to suppress interference. A matched filter correlator can be used for detection and symbol timing adjustment in one mode, while an adaptive frequency comparator can be used in another mode. Circuits are provided that estimate carrier offset, frequency deviation and signal strength. These measurements can then be used to optimize the receiver performance. A method for receiving and interpreting an RF signal using FSK modulation is also provided.
摘要翻译：提供集成突发FSK接收机，以使用FSK调制来接收和解释RF信号。集成突发FSK接收机使用可编程RF本地振荡器将接收到的信号混合到IF范围或基带，在其中对其进行滤波和采样以用于随后的数字处理。采用数字滤波和检测来提高总体误码率性能和接收机灵敏度。也可以使用可编程数字低通滤波器或带通滤波器来抑制干扰。匹配滤波器相关器可用于一种模式下的检测和符号定时调整，而自适应频率比较器可用于另一种模式。提供了估计载波偏移，频率偏差和信号强度的电路。然后可以使用这些测量来优化接收机性能。还提供了一种使用FSK调制来接收和解释RF信号的方法。

5. 发明授权

US08817860B2 Systems and methods for performing phase tracking within an ADC-based tuner 有权
标题翻译：用于在基于ADC的调谐器内执行相位跟踪的系统和方法
公开(公告)号：US08817860B2
公开(公告)日：2014-08-26
申请号：US13609060
申请日：2012-09-10
申请人： Tommy Yu
发明人： Tommy Yu
IPC分类号： H04B3/46
CPC分类号： H04B17/345 , H03L7/085 , H03L2207/50 , H04L27/0014 , H04L2027/0026 , H04L2027/0063 , H04L2027/0067
摘要： Systems and methods for performing phase tracking scheme for an Analog to Digital converter based tuner. In many embodiments, a phase tracking scheme is used that includes a phase locked loop that corrects the phase of the output signals and an amplitude modulation compensator that modulates the amplitude of the output digital signals to compensate for phase noise based upon the received output digital signals.
摘要翻译：用于执行基于模数转换器的调谐器的相位跟踪方案的系统和方法。在许多实施例中，使用相位跟踪方案，其包括校正输出信号的相位的锁相环路和调制输出数字信号的幅度以根据所接收的输出数字信号补偿相位噪声的幅度调制补偿器。

6. 发明申请

US20120281788A1 Scalable Architecture for Satellite Channel Switch 有权
标题翻译：卫星通道交换机的可扩展架构
公开(公告)号：US20120281788A1
公开(公告)日：2012-11-08
申请号：US13550484
申请日：2012-07-16
申请人： Ramon GOMEZ , Tommy Yu
发明人： Ramon GOMEZ , Tommy Yu
IPC分类号： H04L27/00
CPC分类号： H04B1/18
摘要： A frequency translation module for a broadband multi-channel communication system may include an analog signal converter, a digital channel selection device, and a digital-to-analog (D/A) converter. The analog signal converter is configured to receive a plurality of analog signals, to select analog signals residing in a predefined frequency band, and to convert each of the selected analog signals into a digital signal. The digital channel selection device is configured to process digital signals corresponding to the selected analog signals and to generate a composite output of digital signals representative of the selected analog signals. The D/A converter is configured to translate the composite output to an analog signal output decodable by a receiver. Further, the frequency translation module may include a mixer configured to upconvert the analog signal output to a frequency decodable by the receiver.
摘要翻译：用于宽带多通道通信系统的频率转换模块可以包括模拟信号转换器，数字通道选择装置和数模（D / A）转换器。模拟信号转换器被配置为接收多个模拟信号，以选择驻留在预定频带中的模拟信号，并将所选择的模拟信号中的每一个转换为数字信号。数字通道选择装置被配置为处理对应于所选择的模拟信号的数字信号，并产生表示所选模拟信号的数字信号的复合输出。 D / A转换器被配置为将复合输出转换成可由接收器解码的模拟信号输出。此外，频率转换模块可以包括配置成将模拟信号输出上变频到由接收机解码的频率的混频器。

7. 发明授权

US08259852B2 Method and system for satellite communication 有权
标题翻译：卫星通信方法与系统
公开(公告)号：US08259852B2
公开(公告)日：2012-09-04
申请号：US11692702
申请日：2007-03-28
申请人： Tommy Yu
发明人： Tommy Yu
IPC分类号： H03K9/00
CPC分类号： H04H40/90 , H03M13/1165 , H04B7/18523 , H04L5/0048 , H04L27/2613 , H04N7/20 , Y02D70/168 , Y02D70/446
摘要： Certain aspects of a method and system for satellite communication are disclosed. Aspects of one method may include a receiver that handles digital video broadcasting. The receiver may be enabled to dynamically vary spacing between one or more pilots within at least one frame based on a determined symbol rate. The size of each of a plurality of received programs may be determined and the spacing between one or more pilots may be dynamically varied based on the determined size of each of the plurality of received programs.
摘要翻译：公开了用于卫星通信的方法和系统的某些方面。一种方法的方面可以包括处理数字视频广播的接收机。可以使接收机能够基于所确定的符号速率动态地改变至少一个帧内的一个或多个导频之间的间隔。可以确定多个接收节目中的每一个的大小，并且可以基于所确定的多个接收节目中的每一个的大小来动态地改变一个或多个导频之间的间隔。

8. 发明授权

US07715472B2 Equalizer architecture for data communication 有权
标题翻译：用于数据通信的均衡器架构
公开(公告)号：US07715472B2
公开(公告)日：2010-05-11
申请号：US11583713
申请日：2006-10-20
申请人： Tommy Yu , Amy Gayle Hundhausen
发明人： Tommy Yu , Amy Gayle Hundhausen
IPC分类号： H03H7/30 , H03K5/159
CPC分类号： H04L25/03038 , H04L2025/03477 , H04L2025/03617 , H04L2027/0024 , H04L2027/0055
摘要： An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.
摘要翻译：一种使用相位校正符号的通信系统中均衡器系数的更新算法。代替使用传统的所有符号限幅器更新算法，均衡器在相位校正符号期间更新，以在低信噪比条件下实现最佳性能。在较低的信噪比条件下，当解调的数据流包含由快速动态失真导致的未知相位偏移时，均衡器使用相位校正电路来补偿由通信信道引起的失真。更具体地，相位校正电路使用相位校正信号来校正在较低信噪比条件下的解调数据流中的未知相位偏移。然后，均衡器基于相位校正的解调数据流校正由通信信道引起的失真。

9. 发明授权

US07596189B2 Quadrature receiver sampling architecture 有权
标题翻译：正交接收机采样架构
公开(公告)号：US07596189B2
公开(公告)日：2009-09-29
申请号：US11593273
申请日：2006-11-06
申请人： Tommy Yu , Steven T. Jaffe , Stephen Edward Krafft
发明人： Tommy Yu , Steven T. Jaffe , Stephen Edward Krafft
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04L27/00
摘要： Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.
摘要翻译：正交接收机采样架构。信号ADC为I和Q流执行模数转换。模拟MUX在适当的时间选择适当的I和Q基带模拟输入流输入ADC。还可以采用数字滤波器来补偿在I和Q信道的样本之间的任何引入的延迟，当寻求恢复已被发送到使用该正交接收器架构和/或信号处理的通信接收机的符号时。在一个实施例中，如果ADC以基本上是I和Q通道的采样率的两倍的速率被计时，则在ADC的输出处的数字I和数字Q数据之间将存在二分之一采样时钟延迟。然后在解调器处理输入信号之前去除该延迟以恢复发送的符号。

10. 发明申请

US20070098117A1 Phase tracking in communications systems 有权
标题翻译：通信系统中的相位跟踪
公开(公告)号：US20070098117A1
公开(公告)日：2007-05-03
申请号：US11586668
申请日：2006-10-26
申请人： Tommy Yu , Amy Hundhausen
发明人： Tommy Yu , Amy Hundhausen
IPC分类号： H04L27/06
CPC分类号： H04L7/0016 , H04L27/0014 , H04L2027/003 , H04L2027/0046 , H04L2027/0067
摘要： The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.
摘要翻译：本发明包括一种确定具有导频符号的输入信号的相位估计的方法。该方法包括：接收多个导频符号，然后将两个或多个导频符号时隙乘以相应的相关器系数，以校正输入信号的相位估计。

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