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1. 发明授权

US06436820B1 Method for the CVD deposition of a low residual halogen content multi-layered titanium nitride film having a combined thickness greater than 1000 Å 失效
标题翻译：用于沉积具有大于1000的组合厚度的低残留卤素含量多层氮化钛膜的CVD沉积的方法
公开(公告)号：US06436820B1
公开(公告)日：2002-08-20
申请号：US09497787
申请日：2000-02-03
申请人： Jianhua Hu , Yin Lin , Fufa Chen , Yehuda Demayo , Ming Xi
发明人： Jianhua Hu , Yin Lin , Fufa Chen , Yehuda Demayo , Ming Xi
IPC分类号： H01L21324
CPC分类号： H01L21/28568 , C23C16/34 , C23C16/56
摘要： The present disclosure pertains to the discovery that TiN films having a thickness of greater than about 400 Å and, particularly greater than 1000 Å, and a resistivity of less than about 175 &mgr;&OHgr;cm, can be produced by a CVD technique in which a series of TiN layers are deposited to form a desired TiN film thickness. Each layer is deposited employing a CVD deposition/treatment step. During a treatment step, residual halogen (typically chlorine) was removed from the CVD deposited film. Specifically, a TiN film having a thickness of greater than about 400 Å was prepared by a multi deposition/treatment step process where individual TiN layers having a thickness of less than 400 Å were produced in series to provide a finished TiN layer having a combined desired thickness. Each individual TiN layer was CVD deposited and then treated by exposing the TiN surface to ammonia in an annealing step carried out in an ammonia ambient. The TiN film formed in this manner not only had a resistivity of less than about 175 &mgr;&OHgr;cm, but was substantially free of micro cracks as well, including films having a thickness greater than 1,000 Å.
摘要翻译：本公开涉及通过CVD技术产生厚度大于约400埃，特别是大于1000埃，电阻率小于约175微米/厘米3的TiN膜的发现，其中一系列TiN 沉积层以形成期望的TiN膜厚度。使用CVD沉积/处理步骤沉积各层。在处理步骤中，从CVD沉积膜去除残留的卤素（通常为氯）。具体地，通过多次沉积/处理步骤工艺制备具有大于约400埃厚度的TiN膜，其中制备具有小于400的厚度的单独TiN层以提供具有组合所需的成品TiN层厚度。每个单独的TiN层被CVD沉积，然后通过在氨环境中进行的退火步骤中将TiN表面暴露于氨进行处理。以这种方式形成的TiN膜不仅具有小于约175μOMEGA·cm的电阻率，而且基本上没有微裂纹，包括厚度大于的的膜。

2. 发明授权

US06221174B1 Method of performing titanium/titanium nitride integration 失效
标题翻译：执行钛/氮化钛整合的方法
公开(公告)号：US06221174B1
公开(公告)日：2001-04-24
申请号：US09248869
申请日：1999-02-11
申请人： Fufa Chen , Yin Lin , Jianhua Hu , Frederick Wu , Ming Xi , Li Wu
发明人： Fufa Chen , Yin Lin , Jianhua Hu , Frederick Wu , Ming Xi , Li Wu
IPC分类号： C23C824
CPC分类号： C23C16/0281 , H01L21/28568
摘要： The present invention is a method of wafer processing which improves the reliability of an integrated titanium (Ti)/titanium nitride (TiN) CVD film formed from a reaction of titanium tetrachloride (TiCi4) and ammonia (NH3). A Ti film is subject to a treatment of NH3 gas to render the Ti film unreactive towards attack by chlorine and hydrogen chloride. A thin seed layer of TiN film is deposited upon the treated Ti film using a thermal TiCl4/NH3 reaction. Subsequent TiN film deposition upon the seed layer results in a successful integration of a Ti/TiN film stack for a Ti film thickness up to about 300 Å.
摘要翻译：本发明是提高由四氯化钛（TiCi4）和氨（NH3）的反应形成的钛（Ti）/氮化钛（TiN）CVD膜的一体化的可靠性的晶片处理方法。对Ti膜进行NH 3气处理，使Ti膜不受氯和氯化氢侵蚀。使用热TiCl 4 / NH 3反应将TiN膜的薄晶种层沉积在处理的Ti膜上。随后在种子层上的TiN膜沉积导致Ti / TiN膜叠层的成功整合，使Ti膜厚度达到约300。

3. 发明申请

US20060105501A1 Electronic device with high lead density 审中-公开
标题翻译：具有高铅密度的电子器件
公开(公告)号：US20060105501A1
公开(公告)日：2006-05-18
申请号：US11320934
申请日：2005-12-29
申请人： Teng Kuah , Zhi Zhang , Shuai Lee , Chun Li , Yin Lin
发明人： Teng Kuah , Zhi Zhang , Shuai Lee , Chun Li , Yin Lin
IPC分类号： H01L21/50
CPC分类号： H01L21/4828 , H01L23/49541 , H01L24/48 , H01L2224/48247 , H01L2224/97 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic device moldable to form a leadless electronic package and a method of forming the electronic device are provided. The electronic device comprises a die pad adapted for attachment of a die and a frame surrounding the die pad. A plurality of leads extend from the frame towards the die pad such that each lead has a bonding site on a top surface thereof configured for attachment of a bonding wire. The said leads include a first set of leads having bonding sites located substantially on a first plane and a second set of leads having bonding sites located substantially on a second plane that is parallel to but spaced from the first plane.
摘要翻译：提供了一种可模塑以形成无引线电子封装的电子器件和一种形成该电子器件的方法。电子设备包括适于连接管芯和围绕管芯焊盘的框架的管芯焊盘。多个引线从框架朝向管芯焊盘延伸，使得每个引线在其顶表面上具有用于连接接合线的接合位置。所述引线包括具有基本上位于第一平面上的接合位置的第一组引线和具有基本上位于平行于第一平面但与第一平面间隔开的第二平面上的接合位置的第二组引线。

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