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    • 1. 发明授权
    • Clock signal amplifying method and driving stage for LCD driving circuit
    • LCD驱动电路的时钟信号放大方法和驱动级
    • US07292216B2
    • 2007-11-06
    • US10708178
    • 2004-02-13
    • Jian-Shen YuShih-Chian Liu
    • Jian-Shen YuShih-Chian Liu
    • G09G3/36
    • G09G3/2096G09G3/3688G09G2310/0289G09G2330/021
    • A clock signal amplifying method and driving stage for LCD driving circuit is provided. The driving stage includes a clock input, a level shifter, and an output buffer. Firstly, the clock input receives a cock signal oscillating between a high original level and a low original level. Thereafter, a level shifter is biased at a high target level and a low target level, and amplifies the clock signal to a relay signal, which oscillates between a high relay level and a low relay level. Lastly, the output buffer is biased at the high relay level and the low relay level for amplifying the relay signal to a target signal, which oscillates between the high target level and the low target level.
    • 提供了用于LCD驱动电路的时钟信号放大方法和驱动级。 驱动级包括时钟输入,电平移位器和输出缓冲器。 首先,时钟输入接收在高原始电平和低原始电平之间振荡的旋转信号。 此后,电平移位器被偏置在高目标电平和低目标电平,并且将时钟信号放大到在高继电器电平和低继电器电平之间振荡的继电器信号。 最后,输出缓冲器被偏置在高继电器电平和低继电器电平,用于将继电器信号放大到目标信号,该目标信号在高目标电平和低目标电平之间振荡。
    • 2. 发明申请
    • [CLOCK SIGNAL AMPLIFYING METHOD AND DRIVING STAGE FOR LCD DRIVING CIRCUIT ]
    • [LCD驱动电路的时钟信号放大方法和驱动阶段]
    • US20050088397A1
    • 2005-04-28
    • US10708178
    • 2004-02-13
    • Jian-Shen YuShih-Chian Liu
    • Jian-Shen YuShih-Chian Liu
    • G09G3/20G09G3/36
    • G09G3/2096G09G3/3688G09G2310/0289G09G2330/021
    • A clock signal amplifying method and driving stage for LCD driving circuit is provided. The driving stage includes a clock input, a level shifter, and an output buffer. Firstly, the clock input receives a cock signal oscillating between a high original level and a low original level. Thereafter, a level shifter is biased at a high target level and a low target level, and amplifies the clock signal to a relay signal, which oscillates between a high relay level and a low relay level. Lastly, the output buffer is biased at the high relay level and the low relay level for amplifying the relay signal to a target signal, which oscillates between the high target level and the low target level.
    • 提供了用于LCD驱动电路的时钟信号放大方法和驱动级。 驱动级包括时钟输入,电平移位器和输出缓冲器。 首先,时钟输入接收在高原始电平和低原始电平之间振荡的旋转信号。 此后,电平移位器被偏置在高目标电平和低目标电平,并且将时钟信号放大到在高继电器电平和低继电器电平之间振荡的继电器信号。 最后,输出缓冲器被偏置在高继电器电平和低继电器电平,用于将继电器信号放大到目标信号,该目标信号在高目标电平和低目标电平之间振荡。