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1. 发明授权

US08222657B2 Light emitting apparatus 失效
标题翻译：发光装置
公开(公告)号：US08222657B2
公开(公告)日：2012-07-17
申请号：US12708104
申请日：2010-02-18
申请人： Jian Xu , Somasundaram Ashok
发明人： Jian Xu , Somasundaram Ashok
IPC分类号： H01L33/00
CPC分类号： H01L33/0041 , H01L33/34 , H01S5/3009 , H01S5/3031 , Y10S438/933
摘要： A light emitting apparatus may include a gate metal positioned between a p-type contact and an n-type contact, a gate oxide or other dielectric stack positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the gate dielectric stack, a buffer, and a silicon substrate positioned below and attached to the buffer. The light emitting apparatus may alternatively include a gate metal positioned between a p-type contact and an n-type contact, a wide bandgap semiconductor positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the wide bandgap semiconductor, a buffer, and a silicon substrate positioned below and attached to the buffer. Embodiments of the light emitting apparatus may be configured for use in current-injected on-chip lasers, light emitting diodes or other light emitting devices.
摘要翻译：发光装置可以包括位于p型接触和n型接触之间的栅极金属，位于栅极金属下方并连接到栅极金属的栅极氧化物或其它电介质堆叠，位于下方并连接的Ge或Si1-zGez通道到位于缓冲器下方并附着于栅极电介质叠层的缓冲器和硅衬底。发光装置可以替代地包括位于p型接触和n型接触之间的栅极金属，位于栅极金属下方并连接到栅极金属的宽带隙半导体，位于下方并连接到栅极金属的Ge或Si1-zGez通道宽带隙半导体，缓冲器和位于缓冲器下方并附着于其上的硅衬底。发光装置的实施例可以被配置为用于电流注入的片上激光器，发光二极管或其他发光器件。

2. 发明授权

US08569834B2 Accumulation field effect microelectronic device and process for the formation thereof 有权
公开(公告)号：US08569834B2
公开(公告)日：2013-10-29
申请号：US12102398
申请日：2008-04-14
申请人： Stephen J. Fonash , Yinghui Shan , Somasundaram Ashok
发明人： Stephen J. Fonash , Yinghui Shan , Somasundaram Ashok
IPC分类号： H01L29/786
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0673 , H01L29/78603 , H01L29/78618 , H01L29/78672 , H01L29/78681 , H01L29/78684 , H01L29/7869 , H01L29/78696
摘要： A gated microelectronic device is provided that has a source with a source ohmic contact with the source characterized by a source dopant type and concentration. A drain with a drain ohmic contact with the drain characterized by a drain dopant type and concentration. An intermediate channel portion characterized by a channel portion dopant type and concentration. An insulative dielectric is in contact with the channel portion and overlaid in turn by a gate. A gate contact applies a gate voltage bias to control charge carrier accumulation and depletion in the underlying channel portion. This channel portion has a dimension normal to the gate which is fully depleted in the off-state. The dopant type is the same across the source, drain and the channel portion of the device. The device on-state current is determined by the doping and, unlike a MOSFET, is not directly proportional to device capacitance.

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