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1. 发明授权

US08355090B2 Liquid crystal display having reduced kickback effect 有权
标题翻译：具有降低回扣效果的液晶显示器
公开(公告)号：US08355090B2
公开(公告)日：2013-01-15
申请号：US12507764
申请日：2009-07-22
申请人： Ji-Hyun Kwon , Hye-Seok Na , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Yoon Lee , Ju-Hee Lee , Gwang-Bum Ko
发明人： Ji-Hyun Kwon , Hye-Seok Na , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Yoon Lee , Ju-Hee Lee , Gwang-Bum Ko
IPC分类号： G02F1/1343 , G02F1/136
CPC分类号： G02F1/136286 , G02F1/134363 , G02F2001/134345 , G09G2300/0426 , G09G2300/0439 , G09G2320/0209
摘要： A liquid crystal display (LCD), according to an exemplary embodiment of the present invention, includes a first pixel formed between the first and second gate lines, the first and the second data lines, a first subpixel configured to have applied thereto a first data voltage and a second subpixel configured to have applied thereto a second data voltage lower than the first data voltage, a second pixel formed between the second and third gate lines, the first and second data lines, and having a third subpixel configured to have applied thereto a third data voltage and a fourth subpixel configured to have applied thereto a fourth data voltage lower than the third data voltage. The first subpixel and the third subpixel are connected to a first thin film transistor and a third thin film transistor respectively, the first thin film transistor and the third thin film transistor have source electrodes connected to the first data line and the second data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and wherein an open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the third thin film transistor.
摘要翻译：根据本发明的示例性实施例的液晶显示器（LCD）包括形成在第一和第二栅极线之间的第一像素，第一和第二数据线，第一子像素，其被配置为向其施加第一数据电压和第二子像素，其被配置为向其施加低于第一数据电压的第二数据电压;第二像素，形成在第二和第三栅极线之间，第一和第二数据线，并且具有被配置为施加到其的第三子像素第三数据电压和第四子像素，被配置为向其施加低于第三数据电压的第四数据电压。第一子像素和第三子像素分别连接到第一薄膜晶体管和第三薄膜晶体管，第一薄膜晶体管和第三薄膜晶体管分别具有连接到第一数据线和第二数据线的源电极，并且每个源极电极具有围绕漏电极的一部分的开口部分，并且其中第一薄膜晶体管的源极电极的开放方向与第三薄膜晶体管的源电极的开路方向相反。

2. 发明授权

US08456409B2 Gate drive circuit and display apparatus having the same 有权
标题翻译：栅极驱动电路和具有该栅极驱动电路的显示装置
公开(公告)号：US08456409B2
公开(公告)日：2013-06-04
申请号：US12533821
申请日：2009-07-31
申请人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
发明人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0224 , G09G2310/0286 , G09G2310/08 , G09G2320/0223 , G09G2320/0247 , G09G2330/06
摘要： Gate drive circuit includes a plurality of stages connected one after another to each other. An m-th stage includes a pull-up section outputting a first clock signal as a gate signal of the m-th stage to an output terminal, a pull-down section applying a low voltage to the output terminal, a carry section outputting the first clock signal as a carry signal of the m-th stage in response to the high voltage of the first node signal, a first carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to the high voltage of the first clock signal and a second carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to a high voltage of the second clock signal.
摘要翻译：栅极驱动电路包括彼此相继连接的多个级。第m级包括将作为第m级的门信号的第一时钟信号输出到输出端的上拉部分，向输出端子施加低电压的下拉部分，输出第一时钟信号作为响应于第一节点信号的高电压的第m级的进位信号，第一进位保持部分响应于高电压而将第m级的进位信号保持在低电压以及第二进位保持部，其响应于所述第二时钟信号的高电压而将所述第m级的进位信号保持在所述低电压。

3. 发明申请

US20100201668A1 Gate Drive Circuit and Display Apparatus Having the Same 有权
标题翻译：栅极驱动电路和显示装置具有相同的功能
公开(公告)号：US20100201668A1
公开(公告)日：2010-08-12
申请号：US12533821
申请日：2009-07-31
申请人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
发明人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
IPC分类号： G09G5/00 , G09G3/20
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0224 , G09G2310/0286 , G09G2310/08 , G09G2320/0223 , G09G2320/0247 , G09G2330/06
摘要： Gate drive circuit includes a plurality of stages connected one after another to each other. An m-th stage includes a pull-up section outputting a first clock signal as a gate signal of the m-th stage to an output terminal, a pull-down section applying a low voltage to the output terminal, a carry section outputting the first clock signal as a carry signal of the m-th stage in response to the high voltage of the first node signal, a first carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to the high voltage of the first clock signal and a second carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to a high voltage of the second clock signal.
摘要翻译：栅极驱动电路包括彼此相继连接的多个级。第m级包括将作为第m级的门信号的第一时钟信号输出到输出端的上拉部分，向输出端子施加低电压的下拉部分，输出第一时钟信号作为响应于第一节点信号的高电压的第m级的进位信号，第一进位保持部分响应于高电压而将第m级的进位信号保持在低电压以及第二进位保持部，其响应于所述第二时钟信号的高电压而将所述第m级的进位信号保持在所述低电压。

4. 发明授权

US08144299B2 Thin film transistor for driving gate line and liquid crystal display having the same 有权
标题翻译：用于驱动栅线的薄膜晶体管和具有相同的液晶显示器
公开(公告)号：US08144299B2
公开(公告)日：2012-03-27
申请号：US12172579
申请日：2008-07-14
申请人： Gwang-Bum Ko , Ho-Kyoon Kwon , Byoung-Sun Na
发明人： Gwang-Bum Ko , Ho-Kyoon Kwon , Byoung-Sun Na
IPC分类号： G02F1/1345 , G09G3/36
CPC分类号： H01L27/124 , G02F1/13454 , G02F2001/13606 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G11C19/184 , H01L27/1255
摘要： A thin film transistor for driving a gate line and a liquid crystal display having the same are provided. The thin film transistor for driving a gate line includes a gate electrode, a semiconductor layer formed on the gate electrode, a drain electrode formed on the semiconductor layer, a source electrode formed on the semiconductor layer and separated from the drain electrode and being coupled to the gate line, and a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.
摘要翻译：提供了用于驱动栅极线的薄膜晶体管和具有该栅极线的液晶显示器。用于驱动栅极线的薄膜晶体管包括栅电极，形成在栅电极上的半导体层，形成在半导体层上的漏电极，形成在半导体层上并与漏电极分离并耦合到栅极线，以及形成在漏电极上的至少与漏电极的一部分重叠的波纹防止电极。

5. 发明申请

US20090122213A1 THIN FILM TRANSISTOR FOR DRIVING GATE LINE AND LIQUID CRYSTAL DISPLAY HAVING THE SAME 有权
标题翻译：用于驱动栅极线的薄膜晶体管和具有该栅极线的液晶显示器
公开(公告)号：US20090122213A1
公开(公告)日：2009-05-14
申请号：US12172579
申请日：2008-07-14
申请人： Gwang-Bum Ko , Ho-Kyoon Kwon , Byoung-Sun Na
发明人： Gwang-Bum Ko , Ho-Kyoon Kwon , Byoung-Sun Na
IPC分类号： G02F1/1368 , H01L29/423
CPC分类号： H01L27/124 , G02F1/13454 , G02F2001/13606 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G11C19/184 , H01L27/1255
摘要： A thin film transistor for driving a gate line and a liquid crystal display having the same are provided. The thin film transistor for driving a gate line includes a gate electrode, a semiconductor layer formed on the gate electrode, a drain electrode formed on the semiconductor layer, a source electrode formed on the semiconductor layer and separated from the drain electrode and being coupled to the gate line, and a ripple-prevention electrode formed on the drain electrode which overlaps at least a part of the drain electrode.
摘要翻译：提供了用于驱动栅极线的薄膜晶体管和具有该栅极线的液晶显示器。用于驱动栅极线的薄膜晶体管包括栅电极，形成在栅电极上的半导体层，形成在半导体层上的漏电极，形成在半导体层上并与漏电极分离并耦合到栅极线，以及形成在漏电极上的至少与漏电极的一部分重叠的波纹防止电极。

6. 发明申请

US20090189835A1 Display Device 审中-公开
标题翻译：显示设备
公开(公告)号：US20090189835A1
公开(公告)日：2009-07-30
申请号：US12336421
申请日：2008-12-16
申请人： Dong-Gyu KIM , Byoung-Sun Na , Gwang-Bum Ko
发明人： Dong-Gyu KIM , Byoung-Sun Na , Gwang-Bum Ko
IPC分类号： G09G3/30
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2300/0443
摘要： A display device according to one or more embodiments includes a display panel, a source driver part and a gate driver part. The display panel includes a first substrate and a second substrate. According to an embodiment, the first substrate includes a first side extending in a substantially straight line and having a first end and a second end, and a second side extending in a substantially round shape from the first end of the first side to the second end of the first side. A plurality of gate lines is substantially parallel with the first side. The second substrate has a shape corresponding to the first substrate. The source driver part is disposed at the first side, and the gate driver part is disposed at the second side. Thus, a display panel having various shapes besides a rectangular shape may be manufactured according to one or more embodiments.
摘要翻译：根据一个或多个实施例的显示装置包括显示面板，源极驱动器部分和栅极驱动器部分。显示面板包括第一基板和第二基板。根据一个实施例，第一基板包括以大致直线延伸并且具有第一端和第二端的第一侧和从第一侧的第一端延伸到第二端的基本圆形的第二侧的第一边。多条栅极线与第一侧基本平行。第二基板具有对应于第一基板的形状。源极驱动器部分设置在第一侧，并且栅极驱动器部分设置在第二侧。因此，根据一个或多个实施例，可以制造除矩形外的各种形状的显示面板。

7. 发明授权

US08723844B2 Display panel 有权
标题翻译：显示面板
公开(公告)号：US08723844B2
公开(公告)日：2014-05-13
申请号：US12958180
申请日：2010-12-01
申请人： Gwang-Bum Ko
发明人： Gwang-Bum Ko
IPC分类号： G06F3/041
CPC分类号： G09G3/3677 , G09G2310/0286 , G09G2330/06 , G11C19/184 , G11C19/28
摘要： Noise is reduced at a so-called Q-node and a so-called A-node of shift registers in a gate lines driving block of a scan driven display system so that the display system can be safely operated even at elevated temperatures. A variety of techniques may be used to reduce the noise. A first of the techniques applies charging pulses to the A-node at a rate faster than just once every 2H durations, where 1H is the duration of a single row drive. More specifically, a plurality of so-called inverter circuits, rather than just one are included in each shift register stage and the inverters are operated in synchronism with out of phase clock signals so as to thereby increase the rate at which the A-node is pulsed to a high voltage level. A second technique charges up the Q-node in multiple steps. A third technique pulls down the carry line at times when it does not need to go high. A fourth technique combines one or more of the first through third techniques.
摘要翻译：扫描驱动显示系统的栅极线驱动块中的所谓的Q节点和所谓的移位寄存器的A节点的噪声减小，使得显示系统即使在升高的温度下也能够安全地运行。可以使用各种技术来降低噪音。第一种技术以比2H持续时间快一倍的速率向A节点施加充电脉冲，其中1H是单行驱动的持续时间。更具体地，在每个移位寄存器级中包括多个所谓的反相器电路，而不仅仅是一个，并且逆变器与异相时钟信号同步地操作，从而增加了A节点的速率脉冲到高电平。第二种技术在多个步骤中对Q-节点进行充电。在不需要高的时候，第三种技术可以拉下携带线。第四种技术结合了一种或多种第一技术。

8. 发明申请

US20090303405A1 Display Substrate, Method of Manufacturing the Display Substrate and Display Device Having the Display Substrate 有权
标题翻译：显示基板，显示基板的制造方法和具有显示基板的显示装置
公开(公告)号：US20090303405A1
公开(公告)日：2009-12-10
申请号：US12368719
申请日：2009-02-10
申请人： Sung-Jae Moon , Dong-Gyu Kim , Yoon-Jang Kim , Gwang-Bum Ko
发明人： Sung-Jae Moon , Dong-Gyu Kim , Yoon-Jang Kim , Gwang-Bum Ko
IPC分类号： G02F1/133 , G02F1/1368 , G02F1/13
CPC分类号： G02F1/13624 , G02F1/136213 , G02F1/1368
摘要： A display substrate includes a gate line, a data line, a pixel electrode, a storage line, a dual transistor, a connection transistor, a voltage-decreasing electrode, a first contact electrode and a second contact electrode. The voltage-decreasing electrode is disposed on the storage line. The voltage-decreasing electrode is connected to a connection drain electrode of the connection transistor. The first contact electrode overlaps with the first pixel part and is electrically connected to the first pixel part. The first contact electrode is connected to a first drain electrode of the dual transistor and a connection source electrode of the connection transistor. The second contact electrode overlaps with the second pixel part and is electrically connected to the second pixel part. The second contact electrode is connected to a second drain electrode of the dual transistor. Therefore, the aperture ratio of the display device may be increased.
摘要翻译：显示基板包括栅极线，数据线，像素电极，存储线，双晶体管，连接晶体管，降压电极，第一接触电极和第二接触电极。降压电极设置在存储线上。降压电极连接到连接晶体管的连接漏电极。第一接触电极与第一像素部重叠，并与第一像素部电连接。第一接触电极连接到双晶体管的第一漏电极和连接晶体管的连接源电极。第二接触电极与第二像素部重叠，并与第二像素部电连接。第二接触电极连接到双晶体管的第二漏电极。因此，可以增加显示装置的开口率。

9. 发明授权

US08035767B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US08035767B2
公开(公告)日：2011-10-11
申请号：US12500714
申请日：2009-07-10
申请人： Dong-Gyu Kim , Gwang-Bum Ko
发明人： Dong-Gyu Kim , Gwang-Bum Ko
IPC分类号： G02F1/136
CPC分类号： G02F1/13624 , G02F1/136213 , G02F1/136286 , G02F2001/136295
摘要： A liquid crystal display includes a plurality of pixels arranged in a matrix, the pixels including a plurality of pixel electrodes each including a first subpixel electrode and a second subpixel electrode; a plurality of first thin film transistors electrically connected to the first subpixel electrodes; a plurality of second thin film transistors electrically connected to the second subpixel electrodes; a plurality of third thin film transistors electrically connected to the second subpixel electrodes; a plurality of first gate lines electrically connected to the first and second thin film transistors; a plurality of data lines electrically connected to the first and second thin film transistors; a plurality of the second gate lines electrically connected to the third thin film transistors; and a plurality of capacitance electrode lines overlapping the first and second gate lines and disposed in a same layer as a layer of the pixel electrodes, wherein drain electrodes of the third thin film transistors overlap the capacitance electrode lines.
摘要翻译：液晶显示器包括排列成矩阵的多个像素，所述像素包括多个像素电极，每个像素电极包括第一子像素电极和第二子像素电极; 电连接到第一子像素电极的多个第一薄膜晶体管; 电连接到第二子像素电极的多个第二薄膜晶体管; 电连接到第二子像素电极的多个第三薄膜晶体管; 电连接到第一和第二薄膜晶体管的多个第一栅极线; 电连接到第一和第二薄膜晶体管的多条数据线; 电连接到第三薄膜晶体管的多个第二栅极线; 以及多个电容电极线，与第一和第二栅极线重叠并且与像素电极层相同地设置，其中第三薄膜晶体管的漏电极与电容电极线重叠。

10. 发明授权

US08575617B2 Thin film transistor array having improved connectivity between shorting bar and data lines 有权
标题翻译：具有改善短路棒和数据线之间连接性的薄膜晶体管阵列
公开(公告)号：US08575617B2
公开(公告)日：2013-11-05
申请号：US13465855
申请日：2012-05-07
申请人： Gwang-Bum Ko , Sang Jin Jeon
发明人： Gwang-Bum Ko , Sang Jin Jeon
IPC分类号： H01L29/04 , H01L29/15 , H01L31/036 , H01L29/10 , H01L31/0376 , H01L31/20
CPC分类号： H01L27/124 , H01L22/14 , H01L22/34
摘要： A thin film transistor array panel and a manufacturing method therefor. A shorting bar for connecting a thin film transistor with data lines is formed separate from the data lines, and then the data lines and the shorting bar are connected through a connecting member. As a result, all the data lines are floated during manufacture, so that variation in etching speed between data lines does not occur. Since variation in etching speed between the data lines can be prevented, performance deterioration of the transistor caused by a thickness difference in the lower layer of the data line can be prevented, as can resulting deterioration in display quality. Also, the influence of static electricity can be reduced or eliminated. Furthermore, since the data lines and the shorting bar are connected to each other, the generation of static electricity can be prevented or reduced, and quality testing is more readily performed.
摘要翻译：一种薄膜晶体管阵列面板及其制造方法。与数据线连接薄膜晶体管的短路棒与数据线分开形成，然后通过连接部件连接数据线和短路棒。结果，在制造期间所有的数据线都浮起来，从而不会发生数据线之间蚀刻速度的变化。由于可以防止数据线之间的蚀刻速度的变化，可以防止由数据线的下层的厚度差导致的晶体管的性能劣化，这可能导致显示质量的劣化。此外，可以减少或消除静电的影响。此外，由于数据线和短路棒彼此连接，所以可以防止或减少静电的产生，并且更易于进行质量测试。

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