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1. 发明授权

US07990305B2 Current mode double-integration conversion apparatus 有权
标题翻译：电流模式双积分转换装置
公开(公告)号：US07990305B2
公开(公告)日：2011-08-02
申请号：US12514066
申请日：2007-11-13
申请人： Ji Man Park , Young Soo Park , Sung Ik Jun , Jong Soo Jang , Sung Won Sohn
发明人： Ji Man Park , Young Soo Park , Sung Ik Jun , Jong Soo Jang , Sung Won Sohn
IPC分类号： H03M1/82
CPC分类号： H03M1/52 , G04F10/105
摘要： A double-integration signal processing apparatus for pulse width amplification and A/D conversion is provided. The current mode double-integration conversion apparatus includes: a current mode double-integration unit which integrates an input current in a predetermined time interval and outputs an integration voltage; a comparison unit which compares the integration voltage output from the current mode double-integration unit with a predetermined comparison voltage V k and outputs an comparison pulse signal; and a gate logic unit which performs a logic operation by using the comparison pulse signal of the comparison unit and an internal signal and outputs an logic operation pulse signal. Accordingly, the current mode double-integration conversion apparatus can be applied to various sensors.
摘要翻译：提供了用于脉冲宽度放大和A / D转换的双积分信号处理装置。电流模式双积分转换装置包括：电流模式双积分单元，其以预定时间间隔积分输入电流并输出积分电压; 比较单元，其将来自当前模式双积分单元的积分电压输出与预定比较电压V k进行比较，并输出比较脉冲信号; 以及门逻辑单元，其通过使用比较单元的比较脉冲信号和内部信号来执行逻辑运算，并输出逻辑运算脉冲信号。因此，电流模式双重积分转换装置可以应用于各种传感器。

2. 发明授权

US08086864B2 Low power HMAC encryption apparatus 失效
标题翻译：低功率HMAC加密装置
公开(公告)号：US08086864B2
公开(公告)日：2011-12-27
申请号：US12103559
申请日：2008-04-15
申请人： Moo Seop Kim , Young Sae Kim , Young Soo Park , Ji Man Park , Sung Ik Jun , Jong Soo Jang
发明人： Moo Seop Kim , Young Sae Kim , Young Soo Park , Ji Man Park , Sung Ik Jun , Jong Soo Jang
IPC分类号： H04L9/32 , H04K1/00 , H04L9/00 , H04L9/28
CPC分类号： H04L63/164 , G06F21/602 , H04L63/0485 , H04L63/123
摘要： There are provided a low power SHA-1 hash algorithm apparatus having a low power structure and optimized to a trusted platform module (TPM) applied to a mobile trusted computing environment and a low power keyed-hash message authentication code (HMAC) encryption apparatus using the low power SHA-1 hash algorithm apparatus, the HMAC encryption apparatus including: a key padder padding key data for HMAC algorithm; an XOR operator XOR operating the padded key data and a padding constant; a data connector connecting a text to be encrypted, to data obtained by the XOR operating; a data padder padding the connected data; an SHA-1 hash algorithm part performing an SHA-1 hash algorithm on the padded data; a data selector selecting and applying one of a result of the SHA-1 hash algorithm and the text to be encrypted, to the data connector; and a controller controlling operations of the key padder, data connector, and data padder, a sequence of performing a hash algorithm of the SHA-1 hash algorithm part, and storing an operation result to read data required for performing an encryption operation and store data with memory.
摘要翻译：提供了一种具有低功率结构并针对应用于移动可信计算环境的可信平台模块（TPM）进行了优化的低功率SHA-1散列算法装置，以及使用低功率密钥散列消息认证码（HMAC）加密装置所述低功率SHA-1哈希算法装置，所述HMAC加密装置包括：用于HMAC算法的密钥填充密钥数据; XOR运算符XOR操作填充的密钥数据和填充常数; 将要加密的文本连接到通过XOR操作获得的数据的数据连接器; 数据填充器填充所连接的数据; 在填充数据上执行SHA-1散列算法的SHA-1散列算法部分; 数据选择器，选择并应用SHA-1哈希算法的结果和待加密的文本之一到数据连接器; 以及控制所述关键焊盘，数据连接器和数据焊盘的操作的控制器，执行所述SHA-1散列算法部分的散列算法的序列，并且存储操作结果以读取执行加密操作所需的数据并存储数据与记忆

3. 发明申请

US20100031052A1 LOW POWER HMAC ENCRYPTION APPARATUS 失效
标题翻译：低功率HMAC加密设备
公开(公告)号：US20100031052A1
公开(公告)日：2010-02-04
申请号：US12103559
申请日：2008-04-15
申请人： Moo Seop Kim , Young Sae Kim , Young Soo Park , Ji Man Park , Sung Ik Jun , Jong Soo Jang
发明人： Moo Seop Kim , Young Sae Kim , Young Soo Park , Ji Man Park , Sung Ik Jun , Jong Soo Jang
IPC分类号： H04L9/32 , H04L9/28
CPC分类号： H04L63/164 , G06F21/602 , H04L63/0485 , H04L63/123
摘要： There are provided a low power SHA-1 hash algorithm apparatus having a low power structure and optimized to a trusted platform module (TPM) applied to a mobile trusted computing environment and a low power keyed-hash message authentication code (HMAC) encryption apparatus using the low power SHA-1 hash algorithm apparatus, the HMAC encryption apparatus including: a key padder padding key data for HMAC algorithm; an XOR operator XOR operating the padded key data and a padding constant; a data connector connecting a text to be encrypted, to data obtained by the XOR operating; a data padder padding the connected data; an SHA-1 hash algorithm part performing an SHA-1 hash algorithm on the padded data; a data selector selecting and applying one of a result of the SHA-1 hash algorithm and the text to be encrypted, to the data connector; and a controller controlling operations of the key padder, data connector, and data padder, a sequence of performing a hash algorithm of the SHA-1 hash algorithm part, and storing an operation result to read data required for performing an encryption operation and store data with memory.
摘要翻译：提供了一种具有低功率结构并针对应用于移动可信计算环境的可信平台模块（TPM）进行了优化的低功率SHA-1散列算法装置，以及使用低功率密钥散列消息认证码（HMAC）加密装置所述低功率SHA-1哈希算法装置，所述HMAC加密装置包括：用于HMAC算法的密钥填充密钥数据; XOR运算符XOR操作填充的密钥数据和填充常数; 将要加密的文本连接到通过XOR操作获得的数据的数据连接器; 数据填充器填充所连接的数据; 在填充数据上执行SHA-1散列算法的SHA-1散列算法部分; 数据选择器，选择并应用SHA-1哈希算法的结果和待加密的文本之一到数据连接器; 以及控制所述关键焊盘，数据连接器和数据焊盘的操作的控制器，执行所述SHA-1散列算法部分的散列算法的序列，并且存储操作结果以读取执行加密操作所需的数据并存储数据与记忆

4. 发明申请

US20100315194A1 SENSOR SIGNAL PROCESSOR APPARATUS 有权
标题翻译：传感器信号处理器装置
公开(公告)号：US20100315194A1
公开(公告)日：2010-12-16
申请号：US12445785
申请日：2007-10-15
申请人： Ji Man Park , Sung Ik Jun , Young Soo Park
发明人： Ji Man Park , Sung Ik Jun , Young Soo Park
IPC分类号： G06F7/04
CPC分类号： G01D5/14 , G01R31/2829 , Y10T307/766
摘要： Provided is a sensor signal processor apparatus having good characteristics and providing an easy and simple interface for various sensors. The sensor signal processor apparatus includes a current source, a sensor, a ramp integrator, a comparator, and a controller. The current source generates a constant current according to a preset value, and the sensor outputs a sensor voltage using the current from the current source. The ramp integrator generates and outputs an integral voltage according to an input command, and the comparator compares the sensor voltage of the sensor with the integral voltage of the ramp integrator and outputting a result of the comparison. The controller controls the generating and outputting of the integral voltage of the ramp integrator according to the comparison result of the comparator.
摘要翻译：提供了具有良好特性并为各种传感器提供简单和简单的接口的传感器信号处理器设备。传感器信号处理器装置包括电流源，传感器，斜坡积分器，比较器和控制器。电流源根据预设值产生恒定电流，传感器使用来自电流源的电流输出传感器电压。斜坡积分器根据输入指令产生并输出积分电压，比较器将传感器的传感器电压与斜坡积分器的积分电压进行比较，并输出比较结果。根据比较器的比较结果，控制器控制斜坡积分器的积分电压的产生和输出。

5. 发明授权

US08098148B2 Sensor signal processor apparatus 有权
标题翻译：传感器信号处理装置
公开(公告)号：US08098148B2
公开(公告)日：2012-01-17
申请号：US12445785
申请日：2007-10-15
申请人： Ji Man Park , Sung Ik Jun , Young Soo Park
发明人： Ji Man Park , Sung Ik Jun , Young Soo Park
IPC分类号： G08B23/00 , G08B29/00
CPC分类号： G01D5/14 , G01R31/2829 , Y10T307/766
摘要： A sensor signal processor apparatus having good characteristics and providing an easy and simple interface for various sensors. The sensor signal processor apparatus includes a current source, a sensor, a ramp integrator, a comparator, and a controller. The current source generates a constant current according to a preset value, and the sensor outputs a sensor voltage using the current from the current source. The ramp integrator generates and outputs an integral voltage according to an input command, and the comparator compares the sensor voltage of the sensor with the integral voltage of the ramp integrator and outputting a result of the comparison. The controller controls the generating and outputting of the integral voltage of the ramp integrator according to the comparison result of the comparator.
摘要翻译：一种具有良好特性并为各种传感器提供简单和简单的界面的传感器信号处理器设备。传感器信号处理器装置包括电流源，传感器，斜坡积分器，比较器和控制器。电流源根据预设值产生恒定电流，传感器使用来自电流源的电流输出传感器电压。斜坡积分器根据输入指令产生并输出积分电压，比较器将传感器的传感器电压与斜坡积分器的积分电压进行比较，并输出比较结果。根据比较器的比较结果，控制器控制斜坡积分器的积分电压的产生和输出。

6. 发明授权

US08275126B2 Apparatus and method for hash cryptography 失效
标题翻译：散列加密的装置和方法
公开(公告)号：US08275126B2
公开(公告)日：2012-09-25
申请号：US12567006
申请日：2009-09-25
申请人： Moo Seop Kim , Young Soo Park , Ji Man Park , Young Sae Kim , Hong Il Ju , Sung Ik Jun
发明人： Moo Seop Kim , Young Soo Park , Ji Man Park , Young Sae Kim , Hong Il Ju , Sung Ik Jun
IPC分类号： H04L9/06 , H04L9/28 , H04K1/00 , G06F12/14
CPC分类号： H04L9/3239 , H04L2209/12 , H04L2209/805
摘要： An apparatus for hash cryptography has a hardware structure that is capable of providing both secure hash algorithm (SHA)-1 hash calculation and SHA-256 hash calculation. The apparatus for hash cryptography generates a plurality of first message data corresponding to a plurality of first rounds when the SHA-1 hash calculation is performed and generates a plurality of second message data corresponding to a plurality of second rounds when the SHA-256 hash calculation is performed by using one memory, one first register, one XOR calculator, and one OR calculator, calculates a message digest by the SHA-1 hash calculation by using the plurality of first message data when the SHA-1 hash calculation is performed, and calculates a message digest by the SHA-256 by using the plurality of second message data when the SHA-256 hash calculation is performed.
摘要翻译：用于散列加密的装置具有能够提供安全散列算法（SHA）-1哈希计算和SHA-256哈希计算的硬件结构。当执行SHA-1散列计算时，用于散列加密的装置产生对应于多个第一轮的多个第一消息数据，并且当SHA-256散列计算时产生与多个第二轮相对应的多个第二消息数据通过使用一个存储器，一个第一寄存器，一个XOR计算器和一个OR计算器，当执行SHA-1哈希计算时，通过使用多个第一消息数据通过SHA-1哈希计算来计算消息摘要，以及当执行SHA-256哈希计算时，通过使用多个第二消息数据，通过SHA-256计算消息摘要。

7. 发明授权

US07688974B2 Rijndael block cipher apparatus and encryption/decryption method thereof 失效
标题翻译： Rijndael块加密装置及其加密/解密方法
公开(公告)号：US07688974B2
公开(公告)日：2010-03-30
申请号：US10560220
申请日：2004-06-01
申请人： Yun Kyung Lee , Young Soo Park , Young Sae Kim , Sang Woo Lee , Sung Ik Jun
发明人： Yun Kyung Lee , Young Soo Park , Young Sae Kim , Sang Woo Lee , Sung Ik Jun
IPC分类号： H04K1/04 , H04K1/06
CPC分类号： H04L9/0631 , H04L2209/122
摘要： A rijndael block cipher apparatus including an operational unit that efficiently performs a round operation for encrypting/decrypting a rijndael block cipher and an encryption/decryption method thereof are disclosed. The rijndael block cipher apparatus is mounted in a mobile terminal such as a cellular phone and a PDA or a smart card, which requires a high-rate and small-sized cipher processor, and can encrypt and decrypt important data that requires security at high speed and perform the round operation with respect to upper 64 bits and lower 64 bits which are divided from 128-bit input data. Thus, the cipher apparatus can reduce the time required for encryption/decryption of the rijndael block cipher and the size of the apparatus.
摘要翻译：公开了一种rijndael块密码装置，其包括有效执行加密/解密rijndael块密码的循环操作的操作单元及其加密/解密方法。 rijndael块密码装置安装在诸如蜂窝电话和PDA或智能卡的移动终端中，其需要高速率和小尺寸的加密处理器，并且可以加密和解密需要高速安全性的重要数据并执行从128位输入数据划分的高64位和低64位的循环运算。因此，加密装置可以减少rijndael块密码的加密/解密所需的时间以及装置的大小。

8. 发明授权

US07376685B2 Apparatus and method for computing SHA-1hash function 失效
标题翻译：用于计算SHA-1hash函数的装置和方法
公开(公告)号：US07376685B2
公开(公告)日：2008-05-20
申请号：US10917685
申请日：2004-08-12
申请人： Yun Kyung Lee , Sung Ik Jun , Young Soo Park , Sang Woo Lee , Young Sae Kim , Kyo Il Chung
发明人： Yun Kyung Lee , Sung Ik Jun , Young Soo Park , Sang Woo Lee , Young Sae Kim , Kyo Il Chung
IPC分类号： G06F7/00
CPC分类号： H04L9/0643
摘要： An apparatus and method for computing a SHA-1 hash function value are provided. The apparatus includes a first register unit including a plurality of registers that store a first bit string of predetermined lengths for generation of a hash function value; a second register unit storing input data in units of second bit strings with predetermined lengths, and sequentially outputting the second bit strings; a third register unit performing an operation on the first bit string of the plurality of registers and the second bit strings output from the second register unit so as to generate and store a third bit string, and updating first-bit string of the plurality of registers based on the third bit string; and an adding unit combining the first bit string stored in the first register unit, the first bit string of the third bit string stored in the third register unit, and the original initial values stored in the first register unit so as to obtain a hash function value. Accordingly, it is possible to reduce the size of the apparatus and stably compute a hash function value at a high speed.
摘要翻译：提供了一种用于计算SHA-1散列函数值的装置和方法。该装置包括：第一寄存器单元，包括多个寄存器，用于存储用于生成散列函数值的预定长度的第一位串; 第二寄存器单元，以预定长度的第二位串为单位存储输入数据，并顺序地输出第二位串; 第三寄存器单元，对所述多个寄存器中的第一位串执行操作，以及从所述第二寄存器单元输出的所述第二位串，以产生和存储第三位串，并且更新所述多个寄存器中的第一位串基于第三位串; 以及添加单元，组合存储在第一寄存器单元中的第一位串，存储在第三寄存器单元中的第三位串的第一位串和存储在第一寄存器单元中的原始初始值，以获得散列函数值。因此，可以减小装置的尺寸并且可以高速稳定地计算散列函数值。

9. 发明申请

US20090013181A1 METHOD AND ATTESTATION SYSTEM FOR PREVENTING ATTESTATION REPLAY ATTACK 审中-公开
标题翻译：防止突击重击攻击的方法与防御系统
公开(公告)号：US20090013181A1
公开(公告)日：2009-01-08
申请号：US12120154
申请日：2008-05-13
申请人： Su Gil Choi , Sung Ik Jun , Jin Hee Han
发明人： Su Gil Choi , Sung Ik Jun , Jin Hee Han
IPC分类号： H04L9/00
CPC分类号： H04L63/123
摘要： Provided are a method and an attestation system for preventing an attestation replay attack. The method for preventing an attestation replay attack in an attestation system including an attestation target system and an attestation request system, the method including: measuring associated components when an event that affects the integrity of the attestation target system occurs; perceiving own identity information and verifying the perceived identity information; extending the measured component and the identity information into a register and logging the measured component and the identity information; generating an attestation response message including values of the log and the register when an attestation request message is received from the attestation request system; and transmitting the generated attestation response message to the attestation request system. Therefore, the method and an attestation system may be useful to provide an additional simple mathematical operation in verifying an attestation message by preventing an attestation replay attack, and thus to minimize performance degradation in the attestation system, compared to the conventional attestation processing mechanisms.
摘要翻译：提供了一种用于防止认证重放攻击的方法和证明系统。一种防止认证重放攻击的方法，包括认证目标系统和证明请求系统，该方法包括：当发生影响认证目标系统完整性的事件时，对相关组件进行测量; 感知自己的身份信息和验证感知的身份信息; 将测量的组件和身份信息扩展到寄存器并记录测量的组件和身份信息; 当从所述认证请求系统接收到认证请求消息时，生成包括所述日志和所述寄存器的值的证明响应消息; 以及将所生成的认证响应消息发送到认证请求系统。因此，与常规认证处理机制相比，该方法和证明系统可能有助于通过防止认证重放攻击来验证证明消息，从而最小化认证系统中的性能下降来提供额外的简单数学运算。

10. 发明申请

US20070136401A1 Apparatus and method for garbage collection 失效
标题翻译：垃圾收集的装置和方法
公开(公告)号：US20070136401A1
公开(公告)日：2007-06-14
申请号：US10578390
申请日：2004-08-03
申请人： Im Young Jung , Sung Ik Jun , Koy-II Chung
发明人： Im Young Jung , Sung Ik Jun , Koy-II Chung
IPC分类号： G06F17/30
CPC分类号： G06F12/0269 , G06F2212/177 , G06F2212/202
摘要： A garbage collection apparatus and a method using the same are disclosed. The garbage collection method comprises: making a list of objects that must be deleted from a memory; calculating a predetermined residual time for responding to an external command; deleting the listed objects from the memory during the residual time; and storing a list of remaining objects that have not been deleted from the memory during the residual time. Accordingly, communication failure due to a response delay or timeout is prevented by distributed processing loads of garbage collection.
摘要翻译：公开了一种垃圾收集装置及其使用方法。垃圾收集方法包括：从存储器中创建必须删除的对象的列表; 计算用于响应外部命令的预定剩余时间; 在剩余时间内从存储器中删除列出的对象; 以及在剩余时间期间存储从存储器中未被删除的剩余对象的列表。因此，通过垃圾收集的分布式处理负载来防止由于响应延迟或超时而引起的通信故障。

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