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1. 发明授权

US5381114A Continuous time common mode feedback amplifier 失效
标题翻译：连续时间共模反馈放大器
公开(公告)号：US5381114A
公开(公告)日：1995-01-10
申请号：US223416
申请日：1994-04-04
申请人： Jesus S. Pena-Finol , Mark J. Chambers , James B. Phillips
发明人： Jesus S. Pena-Finol , Mark J. Chambers , James B. Phillips
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F3/45641
摘要： A continuous time common mode feedback amplifier CTCMFB (300) is suitable for applications requiring fully differential amplifiers in low voltage supply requirements. Two mirror image, low gain CMOS amplifiers (MP0/MP2 and MP3/MP4) in the CTCMFB (300) define and stabilize the common mode output voltage, Vcm, of the main differential amplifier (102). The transient response of the common mode amplifier (300) can be adjusted independently of the transient response of the main differential amplifier (102), allowing fast transient response to the main differential amplifier.
摘要翻译：连续时间共模反馈放大器CTCMFB（300）适用于要求低电压电源要求的全差分放大器的应用。 CTCMFB（300）中的两个镜像，低增益CMOS放大器（MP0 / MP2和MP3 / MP4）定义并稳定主差分放大器（102）的共模输出电压Vcm。可以独立于主差分放大器（102）的瞬态响应来调节共模放大器（300）的瞬态响应，允许对主差分放大器的快速瞬态响应。

2. 发明授权

US06868431B1 Circuit and method for processing data 有权
标题翻译：电路和数据处理方法
公开(公告)号：US06868431B1
公开(公告)日：2005-03-15
申请号：US09426670
申请日：1999-10-25
申请人： Jesus L. Finol , Mark J. Chambers , Albert H. Higashi , James B. Phillips
发明人： Jesus L. Finol , Mark J. Chambers , Albert H. Higashi , James B. Phillips
IPC分类号： H03H17/06 , G06F17/10
CPC分类号： H03H17/06
摘要： A Finite Impulse Response (FIR) filter circuit (60) includes delay elements (63, 64, 66), multipliers (71, 72, 73, 74), a summing device (78), and a digital integrator (69) at the output of the FIR filter circuit (60). A method for processing data using the FIR filter circuit (60) includes differentially encoding data prior to storing or processing of the data. The method provides a technique for compressing data since less memory is needed to store derivative data. The method further includes integrating the derivative data using the digital integrator (69) to decompress the derivative data.
摘要翻译：有限脉冲响应（FIR）滤波器电路（60）包括延迟元件（63,64,66），乘法器（71,72,73,74），求和装置（78）和数字积分器（69）输出FIR滤波器电路（60）。使用FIR滤波器电路（60）处理数据的方法包括在存储或处理数据之前对数据进行差分编码。该方法提供了一种用于压缩数据的技术，因为需要更少的存储器来存储导数数据。该方法还包括使用数字积分器（69）积分导数数据以解压缩导数数据。

3. 发明授权

US5625316A Tuning circuit for an RC filter 失效
标题翻译： RC滤波器的调谐电路
公开(公告)号：US5625316A
公开(公告)日：1997-04-29
申请号：US269509
申请日：1994-07-01
申请人： Mark J. Chambers , Jesus P. Finol , James B. Phillips
发明人： Mark J. Chambers , Jesus P. Finol , James B. Phillips
IPC分类号： H03J3/04 , H03H11/04 , H03J3/18 , G25F3/02 , H03K5/00
CPC分类号： H03H11/04
摘要： A tuning circuit (202) uses a precision current reference (Iref) along with an analog-to-digital converter (218) to produce a digital output (228) to represent variations of internal resistance values. The precision current reference (Iref) is fed to an internal tuning resistor (R210) in order to provide an analog voltage signal to the analog-to-digital converter (218). The analog voltage signal changes in accordance with the variations in the tuning resistor value over process and temperature. The digital output (228) controls programmable capacitor arrays (C220, C222) which are included in the tuning circuit (202) as well as in an active RC filter (208) whose bandwidth is controlled by the programmable capacitor arrays (C220, C222) and internal resistors (R212, R214, R216).
摘要翻译：调谐电路（202）与模拟 - 数字转换器（218）一起使用精密电流基准（Iref）以产生数字输出（228）以表示内部电阻值的变化。精密电流基准（Iref）被馈送到内部调谐电阻器（R210），以向模数转换器（218）提供模拟电压信号。模拟电压信号根据调谐电阻值在过程和温度上的变化而变化。数字输出（228）控制包括在调谐电路（202）中的可编程电容器阵列（C220，C222）以及其带宽由可编程电容器阵列（C220，C222）控制的有源RC滤波器（208）和内部电阻（R212，R214，R216）。

4. 发明授权

US5530399A Transconductance scaling circuit and method responsive to a received digital code word for use with an operational transconductance circuit 失效
标题翻译：跨导缩放电路和方法，响应于接收到的数字码字以与运算跨导电路一起使用
公开(公告)号：US5530399A
公开(公告)日：1996-06-25
申请号：US363786
申请日：1994-12-27
申请人： Mark J. Chambers , James B. Phillips
发明人： Mark J. Chambers , James B. Phillips
IPC分类号： G06J1/00 , G06G7/12
CPC分类号： G06J1/00
摘要： A transconductance scaling circuit (500) includes an operational transconductance amplifier (504) having a tunable voltage, V.sub.tune2. A feedback loop controls the tunable voltage, V.sub.tune2, in response to the digital programming of the transconductance amplifier (504) and provides the tunable voltage as a current scaling output.
摘要翻译：跨导缩放电路（500）包括具有可调谐电压Vtune2的工作跨导放大器（504）。响应于跨导放大器（504）的数字编程，反馈环路控制可调谐电压Vtune2，并将可调谐电压提供为电流缩放输出。

5. 发明授权

US5459427A DC level shifting circuit for analog circuits 失效
标题翻译：用于模拟电路的直流电平移位电路
公开(公告)号：US5459427A
公开(公告)日：1995-10-17
申请号：US239058
申请日：1994-05-06
申请人： Mark J. Chambers , Fatima D. Da Costa Seidel , Jesus P. Finol , James B. Phillips
发明人： Mark J. Chambers , Fatima D. Da Costa Seidel , Jesus P. Finol , James B. Phillips
IPC分类号： H03K5/003 , H03L5/00
CPC分类号： H03K5/003
摘要： A DC translation circuit (200) provides maximum dynamic range in DC level shifting that is temperature and process invariant. The DC translation circuit (200) includes a bandgap reference (202) and current mirror circuit (204) for providing a reference current, Iref. An op-amp circuit (210) receives an AC signal centered about a first DC level, and translates the first DC level into a second DC level using the reference current, a current mirror circuit (208), op-amp circuit (210) and resistor (R2).
摘要翻译： DC转换电路（200）在DC电平转换中提供温度和过程不变量的最大动态范围。 DC转换电路（200）包括用于提供参考电流I ref的带隙基准（202）和电流镜电路（204）。运算放大器电路（210）接收以第一DC电平为中心的AC信号，并且使用参考电流将电流镜电路（208），运算放大电路（210）转换为第二DC电平，和电阻（R2）。

6. 发明申请

US20090237118A1 Zero Input Current-Drain Comparator with High Accuracy Trip Point Above Supply Voltage 有权
标题翻译：具有高精度跳变点以上电源电压的零输入电流 - 漏极比较器
公开(公告)号：US20090237118A1
公开(公告)日：2009-09-24
申请号：US12053250
申请日：2008-03-21
申请人： James B. Phillips , Alan L. Ruff
发明人： James B. Phillips , Alan L. Ruff
IPC分类号： H03K5/22
CPC分类号： H03K5/2481 , H03K5/08
摘要： A comparator circuit (300) has a first field effect transistor (FET) (307) with a supply voltage (301) connection and a diode connected FET (303) connected in series to form the first circuit leg of the comparator (300). A second diode connected FET (309) and a second FET (305) in series form the second circuit leg. The first FET (307) and said second FET (305) are approximately equal sized FETs. Another embodiment is an integrated circuit (401) with two n-channel FETs. A first diode connected FET (303) is connected to the first n-channel FET (307) in series to form the first circuit leg of a comparator (300) and a second diode connected FET (309) is connected to a second n-channel FET (305) in series to form the second circuit leg of the comparator. The two n-channel FETs that form the differential pair are approximately equal in size. The trip point is high with respect to the supply voltage.
摘要翻译：比较器电路（300）具有电源电压（301）连接的第一场效应晶体管（FET）（307）和串联连接的二极管连接的FET（303），以形成比较器（300）的第一电路支路。串联的第二二极管连接的FET（309）和第二FET（305）形成第二电路支路。第一FET（307）和所述第二FET（305）大致相等尺寸的FET。另一个实施例是具有两个n沟道FET的集成电路（401）。第一二极管连接的FET（303）串联连接到第一n沟道FET（307）以形成比较器（300）的第一电路支路，并且第二二极管连接的FET（309）连接到第二n沟道FET 通道FET（305）串联以形成比较器的第二电路支路。形成差分对的两个n沟道FET的大小近似相等。跳闸点相对于电源电压较高。

7. 发明授权

US07898301B2 Zero input current-drain comparator with high accuracy trip point above supply voltage 有权
标题翻译：零输入电流 - 漏极比较器，具有高于电源电压的高精度跳变点
公开(公告)号：US07898301B2
公开(公告)日：2011-03-01
申请号：US12053250
申请日：2008-03-21
申请人： James B. Phillips , Alan L. Ruff
发明人： James B. Phillips , Alan L. Ruff
IPC分类号： H03K5/22
CPC分类号： H03K5/2481 , H03K5/08
摘要： A comparator circuit (300) has a first field effect transistor (FET) (307) with a supply voltage (301) connection and a diode connected FET (303) connected in series to form the first circuit leg of the comparator (300). A second diode connected FET (309) and a second FET (305) in series form the second circuit leg. The first FET (307) and said second FET (305) are approximately equal sized FETs. Another embodiment is an integrated circuit (401) with two n-channel FETs. A first diode connected FET (303) is connected to the first n-channel FET (307) in series to form the first circuit leg of a comparator (300) and a second diode connected FET (309) is connected to a second n-channel FET (305) in series to form the second circuit leg of the comparator. The two n-channel FETs that form the differential pair are approximately equal in size. The trip point is high with respect to the supply voltage.
摘要翻译：比较器电路（300）具有电源电压（301）连接的第一场效应晶体管（FET）（307）和串联连接的二极管连接的FET（303），以形成比较器（300）的第一电路支路。串联的第二二极管连接的FET（309）和第二FET（305）形成第二电路支路。第一FET（307）和所述第二FET（305）大致相等尺寸的FET。另一个实施例是具有两个n沟道FET的集成电路（401）。第一二极管连接的FET（303）串联连接到第一n沟道FET（307）以形成比较器（300）的第一电路支路，并且第二二极管连接的FET（309）连接到第二n沟道FET 通道FET（305）串联以形成比较器的第二电路支路。形成差分对的两个n沟道FET的大小近似相等。跳闸点相对于电源电压较高。

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