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1. 发明授权

US07209727B2 Integrated circuit radio front-end architecture and applications thereof 有权
标题翻译：集成电路无线电前端架构及其应用
公开(公告)号：US07209727B2
公开(公告)日：2007-04-24
申请号：US10459985
申请日：2003-06-12
申请人： Jesus A. Castaneda , Iqbal S. Bhatti , Razieh Roufoogaran , Hung Yu Yang
发明人： Jesus A. Castaneda , Iqbal S. Bhatti , Razieh Roufoogaran , Hung Yu Yang
IPC分类号： H04B1/16
CPC分类号： H03F3/45188 , H03F2203/45386 , H04B1/40 , H04B1/581
摘要： An integrated RF front-end architecture is disclosed. Such an integrated RF front-end architecture includes a multi-tap balun, a low noise amplifier and a power amplifier core. The multi-tap balun includes a single-ended primary winding and a symmetrical multi-tap secondary winding, wherein the single-ended primary winding is operably coupled to an antenna. The low noise amplifier is coupled to a first set of taps of the symmetrical multi-tap secondary winding. The power amplifier core is coupled to a second set of taps of the symmetrical multi-tap secondary winding and can be a two stage amplifier having a driver stage and an output stage. The multi-tap balun, low noise amplifier and power amplifier core can be on-chip components or can be fabricated to be discrete components on a printed circuit board.
摘要翻译：公开了一种集成RF前端架构。这种集成的RF前端架构包括多抽头平衡 - 不平衡转换器，低噪声放大器和功率放大器核心。多分接平衡 - 不平衡变压器包括单端初级绕组和对称多抽头次级绕组，其中单端初级绕组可操作地耦合到天线。低噪声放大器耦合到对称多抽头次级绕组的第一组抽头。功率放大器芯耦合到对称多抽头次级绕组的第二组抽头，并且可以是具有驱动级和输出级的两级放大器。多分针平衡 - 不平衡变压器，低噪声放大器和功率放大器芯可以是片上组件，或者可以制造成印刷电路板上的分立组件。

2. 发明授权

US06707367B2 On-chip multiple tap transformer and inductor 有权
标题翻译：片上多抽头变压器和电感器
公开(公告)号：US06707367B2
公开(公告)日：2004-03-16
申请号：US10200990
申请日：2002-07-23
申请人： Jesus A. Castaneda , Razieh Rogougaran , Iqbal S. Bhatti , Hung Yu Yang
发明人： Jesus A. Castaneda , Razieh Rogougaran , Iqbal S. Bhatti , Hung Yu Yang
IPC分类号： H01F2728
CPC分类号： H01F17/0006 , H01F21/12 , H01F2021/125 , H01L27/08 , H03H7/42
摘要： An on-chip multiple tap transformed balun includes a 1st winding and a 2nd winding having two portions. The 1st winding is on a 1st layer of an integrated circuit and is operably coupled for a single ended signal. The 1st and 2nd portions of the 2nd winding are on a 2nd layer of the integrated circuit. The 1st portion of the 2nd winding includes a 1st node, a 2nd node, and a tap. The 1st node is operably coupled to receive a 1st leg of a 1st differential signal and the 2nd node is coupled to a reference potential. The tap of the 1st portion is operably coupled for a 1st leg of a 2nd differential signal. The 2nd portion of the 2nd winding includes a 1st node, 2nd node, and tap. The 1st node is operably coupled to receive a 2nd leg of the 1st differential signal and the 2nd node is operably coupled to the reference potential. The tap of the 2nd portion is coupled for a 2nd leg of the 2nd differential signal. The 1st and 2nd portions of the 2nd winding are symmetrical with respect to the 1st and 2nd nodes and with respect to the tap nodes.
摘要翻译：片上多抽头变换的平衡 - 不平衡变换器包括具有两个部分的第一绕组和第二绕组。第1绕组在集成电路的第1层上，并且可操作地耦合用于单端信号。第2绕组的第1和第2部分在集成电路的第2层上。第2个绕组的第1个部分包括1个节点，2个节点和一个抽头。第1个节点可操作地耦合以接收第1个差分信号的第1个脚，并且第2个节点耦合到参考电位。第1个部分的抽头可操作地耦合到第2个差分信号的第1条腿。第2个绕组的第2个部分包括第1个节点，第2个节点和抽头。第1个节点可操作地耦合以接收第1个差分信号的第2个支路，并且第2个节点可操作地耦合到参考电位。第2个部分的抽头被耦合到第2个差分信号的第2个支路。第2绕组的第1和第2部分相对于第1和第2个节点和关于抽头节点是对称的。

3. 发明授权

US07088214B2 On-chip multiple tap transformer and inductor 有权
标题翻译：片上多抽头变压器和电感器
公开(公告)号：US07088214B2
公开(公告)日：2006-08-08
申请号：US10727422
申请日：2003-12-04
申请人： Jesus A. Castaneda , Razieh Rogougaran , Iqbal S. Bhatti , Hung Yu Yang
发明人： Jesus A. Castaneda , Razieh Rogougaran , Iqbal S. Bhatti , Hung Yu Yang
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F21/12 , H01F2021/125 , H01L27/08 , H03H7/42
摘要： An on-chip multiple tap transformer balun includes a 1st winding and a 2nd winding having two portions. The 1st winding is on a 1st layer of an integrated circuit and is operably coupled for a single ended signal. The 1st and 2nd portions of the 2nd winding are on a 2nd layer of the integrated circuit. The 1st portion of the 2nd winding includes a 1st node, a 2nd node, and a tap. The 1st node is operably coupled to receive a 1st leg of a 1st differential signal and the 2nd node is coupled to a reference potential. The tap of the 1st portion is operably coupled for a 1st leg of a 2nd differential signal. The 2nd portion of the 2nd winding includes a 1st node, 2nd node, and tap. The 1st node is operably coupled to receive a 2nd leg of the 1st differential signal and the 2nd node is operably coupled to the reference potential. The tap of the 2nd portion is coupled for a 2nd leg of the 2nd differential signal. The 1st and 2nd portions of the 2nd winding are symmetrical with respect to the 1st and 2nd nodes and with respect to the tap nodes.
摘要翻译：片上多抽头变压器平衡 - 不平衡变压器包括具有两部分的1 绕组和2 绕组。 1 绕组在集成电路的第1层上，并且可操作地耦合用于单端信号。第2和第2绕组的第1和第2和第2部分在集成电路的第2层上。第2和第2绕组的第1个部分包括第1个节点，第2个节点和第2个节点点击。 1 节点可操作地耦合以接收第1个<！ - SIPO - >差分信号的第1和第2脚， >节点耦合到参考电位。 1 ^{部分的抽头可操作地耦合到第二差分信号的第一支脚。第2和第2绕组的第2和第2部分包括第一节点，第二节点和第二节点，并且点击。第1节点节点可操作地耦合以接收第1个差分信号和第2个第<！ - SIPO - >差信号的第二支路 >节点可操作地耦合到参考电位。 2＆lt; nd＆lt; / SUP＆gt;部分的抽头被耦合用于第2 nd / sups差分信号的第2和/ 2脚。第二和第二绕组的第一和第二和第二部分相对于第一和第二和第二部分是对称的节点和相对于分接节点。}

4. 发明授权

US07184735B2 Radio frequency integrated circuit having symmetrical differential layout 失效
标题翻译：具有对称差分布局的射频集成电路
公开(公告)号：US07184735B2
公开(公告)日：2007-02-27
申请号：US10645026
申请日：2003-08-21
申请人： Iqbal S. Bhatti , Rozi (Razieh) Roufoogaran
发明人： Iqbal S. Bhatti , Rozi (Razieh) Roufoogaran
IPC分类号： H04B1/18
CPC分类号： H03F3/45188 , H03F3/72 , H03F2200/06 , H04B1/38
摘要： A radio frequency circuit includes a first differential RF path and a second differential path. The first differential RF path includes at least one RF block that includes a first differential section and a second differential section, wherein the first differential section is symmetrical with the second differential section. The second differential RF path includes at least one RF block that includes a first differential section and a second differential section, wherein the first differential section is symmetrical with the second differential section. The first and second half differential sections of the at least one RF block of the first differential RF path are symmetrically placed on at least one layer around the first and second half differential sections of the at least one RF block of the second differential RF path, wherein the first and second half differential sections of the at least one RF block of the second differential RF path are fabricated on the at least one layer.
摘要翻译：射频电路包括第一差分RF路径和第二差分路径。第一差分RF路径包括至少一个RF块，其包括第一差分部分和第二差分部分，其中第一差分部分与第二差分部分对称。第二差分RF路径包括至少一个RF块，其包括第一差分部分和第二差分部分，其中第一差分部分与第二差分部分对称。第一差分RF路径的至少一个RF块的第一和第二半差分部分对称地放置在第二差分RF路径的至少一个RF块的第一和第二半差分部分周围的至少一个层上，其中所述第二差分RF路径的所述至少一个RF块的所述第一和第二半差分部分被制造在所述至少一个层上。

5. 发明授权

US07215932B2 On-chip impedance matching power amplifier 有权
标题翻译：片内阻抗匹配功率放大器
公开(公告)号：US07215932B2
公开(公告)日：2007-05-08
申请号：US11120763
申请日：2005-05-03
申请人： Iqbal S. Bhatti
发明人： Iqbal S. Bhatti
IPC分类号： H04Q11/12 , H04B1/04
CPC分类号： H04B1/0458
摘要： An on-chip impedance matching includes a transistor and a tank circuit. The transistor is operably coupled to receive an input signal. The tank circuit is operably coupled to the transistor, wherein a tap of the tank circuit provides an output of the on-chip impedance matching power amplifier, wherein the tank circuit is tuned with respect to an antenna load of the on-chip impedance matching power amplifier.
摘要翻译：片上阻抗匹配包括晶体管和储能电路。晶体管可操作地耦合以接收输入信号。所述储能电路可操作地耦合到所述晶体管，其中所述储能电路的抽头提供所述片上阻抗匹配功率放大器的输出，其中所述储能电路相对于片上阻抗匹配功率的天线负载被调谐放大器

6. 发明授权

US06907231B2 On-chip impedance matching power amplifier and radio applications thereof 失效
标题翻译：片上阻抗匹配功率放大器及其无线电应用
公开(公告)号：US06907231B2
公开(公告)日：2005-06-14
申请号：US10122458
申请日：2002-04-15
申请人： Iqbal S. Bhatti
发明人： Iqbal S. Bhatti
IPC分类号： H04B1/04 , H04Q11/12
CPC分类号： H04B1/0458
摘要： An on-chip impedance matching includes a transistor, an inductor, and a capacitive divider. The gate of the transistor is operably coupled to receive input signals; the source of the transistor is coupled to a first DC voltage potential; and the drain of the transistor is operably coupled to the inductor. The other end of the inductor is operably coupled to a second DC voltage potential. The capacitive divider includes matched capacitors that, in combination with the inductor, provide for substantially lossless on-chip impedance matching, where a tap of the capacitive divider provides an output of the on-chip impedance matching power amplifier. In addition, the capacitance of the capacitive divider and the inductance of the inductor are tuned to provide a tank circuit for the on-chip impedance matching power amplifier.
摘要翻译：片上阻抗匹配包括晶体管，电感和电容分压器。晶体管的栅极可操作地耦合以接收输入信号; 晶体管的源极耦合到第一直流电压电位; 并且晶体管的漏极可操作地耦合到电感器。电感器的另一端可操作地耦合到第二直流电压电位。电容分压器包括匹配的电容器，其与电感器组合提供基本无损的片上阻抗匹配，其中电容分压器的抽头提供片上阻抗匹配功率放大器的输出。此外，电容分压器的电容和电感的电感被调谐以提供用于片上阻抗匹配功率放大器的振荡电路。

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