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    • 6. 发明申请
    • Laser Measurement Device and Method
    • 激光测量装置及方法
    • US20080210881A1
    • 2008-09-04
    • US11997088
    • 2006-07-28
    • Michael HarrisMartin JohnsonRichard Paul Scullion
    • Michael HarrisMartin JohnsonRichard Paul Scullion
    • G01J1/42
    • G01S17/95G01S2007/4975G01S2007/4977Y02A90/19
    • A measurement device, such as a laser radar, is described that comprises a transmitter portion for transmitting radiation to a remote probe volume, a receiver portion for detecting radiation returned from the remote probe volume and a processor for analysing the detected return radiation. The device is suitable for transmitting and receiving radiation through a window portion having associated window cleaning apparatus (e.g. wiper 62) for cleaning said window portion in response to a cleaning activation signal. The processor is arranged to generate a cleaning activation signal for activating window cleaning apparatus when the properties of said detected return radiation are indicative of a reduction in transmission through at least part of said window portion. In one embodiment, a conically scanned lidar is described that generates a cleaning activation signal when the power of detected return radiation varies as a function of the angle of transmission of radiation from the device.
    • 描述了诸如激光雷达的测量装置,其包括用于将辐射传输到远程探针体积的发射器部分,用于检测从远程探针体积返回的辐射的接收器部分和用于分析检测到的返回辐射的处理器。 该装置适于通过具有相关联的窗户清洁装置(例如擦拭器62)的窗口部分来发射和接收辐射,用于响应于清洁激活信号来清洁所述窗口部分。 当所述检测到的返回辐射的特性表示通过所述窗口部分的至少一部分的透射率减小时,处理器被布置成产生用于启动窗户清洁设备的清洁激活信号。 在一个实施例中,描述了锥形扫描的激光雷达,当检测到的返回辐射的功率随着来自设备的辐射的透射角度而变化时,产生清洁激活信号。
    • 10. 发明授权
    • Digital processor for simulating operation of a parallel processing array
    • 用于模拟并行处理阵列操作的数字处理器
    • US5845123A
    • 1998-12-01
    • US969177
    • 1993-02-12
    • Martin JohnsonRobin JonesDavid S. Broomhead
    • Martin JohnsonRobin JonesDavid S. Broomhead
    • G06F15/16G06F15/177G06F15/80G06F15/82G06F13/00
    • G06F15/8046
    • A digital processor for simulating operation of a parallel processing array incorporates digital processing units (P.sub.1 to P.sub.8) communicating data to one another via addresses in memories (M.sub.0 to M.sub.8) and registers (R.sub.11 to R.sub.41). Each processing unit (e.g. P.sub.1) is programmed to input data and execute a computation involving updating of a stored coefficient followed by data output. Each computation involves use of a respective set of data addresses for data input and output, and each processing unit (e.g. P.sub.1) is programmed with a list of such sets employed in succession by that unit. On reaching the end of its list, the processing unit (e.g. P.sub.1) repeats it. Each address set is associated with a conceptual internal cell location in the simulated array (10), and each list is associated with a respective sub-array of the simulated array (10). Data is input cyclically to the processor (40) via input/output ports (I/O.sub.5 to I/O.sub.8) of some of the processing units (P.sub.5 to P.sub.8). Each processing unit (e.g. P.sub.1) executes its list of address sets within a cycle at a rate of one address set per subcycle. At the end of its list, each of the processing units (P.sub.1 to P.sub.8) has executed the functions associated with a conceptual respective sub-array of simulated cells (12), and the processor (40) as a whole has simulated operation of one cycle of a systolic array (10). Repeating the address set lists with further processor input provides successive simulated array cycles.
    • PCT No.PCT / GB91 / 01390 Sec。 371日期:1993年2月12日 102(e)日期1993年2月12日PCT 1991年8月15日PCT PCT。 出版物WO92 / 03802 日期1992年3月5日用于模拟并行处理阵列的操作的数字处理器包括通过存储器(M0至M8)和寄存器(R11至R41)中的地址将数据彼此通信的数字处理单元(P1至P8)。 每个处理单元(例如P1)被编程为输入数据并且执行涉及随后数据输出的存储系数的更新的计算。 每个计算涉及使用用于数据输入和输出的相应数据地址集合,并且每个处理单元(例如,P1)用该单元连续采用的这种集合的列表进行编程。 在到达其列表的末尾时,处理单元(例如P1)重复它。 每个地址集与模拟阵列(10)中的概念内部小区位置相关联,并且每个列表与模拟阵列(10)的相应子阵列相关联。 数据通过一些处理单元(P5至P8)的输入/输出端口(I / O5至I / O8)循环输入到处理器(40)。 每个处理单元(例如P1)以每个子周期的一个地址集合的速率在一个周期内执行其地址集列表。 在其列表的末尾,每个处理单元(P1至P8)执行与仿真单元(12)的概念相应的子阵列相关联的功能,并且处理器(40)作为整体具有模拟操作 收缩阵列周期(10)。 使用进一步的处理器输入重复地址集列表可提供连续的模拟阵列周期。