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1. 发明授权

US08524583B2 Method for growing semipolar nitride 失效
标题翻译：生长半极性氮化物的方法
公开(公告)号：US08524583B2
公开(公告)日：2013-09-03
申请号：US13177330
申请日：2011-07-06
申请人： Jen-Inn Chyi , Hsueh-Hsing Liu , Hsien Yu Lin
发明人： Jen-Inn Chyi , Hsueh-Hsing Liu , Hsien Yu Lin
IPC分类号： H01L21/205
CPC分类号： H01L21/02639 , C30B23/025 , C30B23/04 , C30B25/04 , C30B25/186 , C30B29/403 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/02458 , H01L21/0254 , H01L21/02647 , H01L33/007 , H01L33/16 , H01L33/20
摘要： A method for growing a semipolar nitride comprises steps: forming a plurality of parallel discrete trenches on a silicon substrate, each discrete trenches having a first wall and a second wall, wherein a tilt angle is formed between the surface of the silicon substrate and the first wall; forming a buffer layer on the silicon substrate and the trenches, wherein the buffer layer on the first wall has a plurality of growing zones and a plurality of non-growing zones among the growing zones and complementary to the growing zones; forming a cover layer on the buffer layer and revealing the growing zones; and growing a semipolar nitride from the growing zones of the buffer layer and covering the cover layer. Thereby cracks caused by thermal stress between the silicon substrate and semipolar nitride are decreased and the quality of the semipolar nitride film is improved.
摘要翻译：用于生长半极性氮化物的方法包括以下步骤：在硅衬底上形成多个平行的离散沟槽，每个离散的沟槽具有第一壁和第二壁，其中在硅衬底的表面和第一壁之间形成倾斜角壁; 在所述硅衬底和所述沟槽上形成缓冲层，其中所述第一壁上的所述缓冲层在所述生长区中具有多个生长区和多个非生长区，并与所述生长区互补; 在缓冲层上形成覆盖层并露出生长区; 以及从缓冲层的生长区域生长半极性氮化物并覆盖覆盖层。由此，硅衬底和半极性氮化物之间的热应力引起的裂纹减少，并且提高了半极性氮化物膜的质量。

2. 发明申请

US20120276722A1 METHOD FOR GROWING SEMIPOLAR NITRIDE 失效
标题翻译：生长二氧化碳的方法
公开(公告)号：US20120276722A1
公开(公告)日：2012-11-01
申请号：US13177330
申请日：2011-07-06
申请人： Jen-Inn CHYI , Hsueh-Hsing Liu , Hsien Yu Lin
发明人： Jen-Inn CHYI , Hsueh-Hsing Liu , Hsien Yu Lin
IPC分类号： H01L21/205
CPC分类号： H01L21/02639 , C30B23/025 , C30B23/04 , C30B25/04 , C30B25/186 , C30B29/403 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/02458 , H01L21/0254 , H01L21/02647 , H01L33/007 , H01L33/16 , H01L33/20
摘要： A method for growing a semipolar nitride comprises steps: forming a plurality of parallel discrete trenches on a silicon substrate , each discrete trenches having a first wall and a second wall, wherein a tilt angle is formed between the surface of the silicon substrate and the first wall; forming a buffer layer on the silicon substrate and the trenches, wherein the buffer layer on the first wall has a plurality of growing zones and a plurality of non-growing zones among the growing zones and complementary to the growing zones; forming a cover layer on the buffer layer and revealing the growing zones; and growing a semipolar nitride from the growing zones of the buffer layer and covering the cover layer. Thereby cracks caused by thermal stress between the silicon substrate and semipolar nitride are decreased and the quality of the semipolar nitride film is improved.
摘要翻译：用于生长半极性氮化物的方法包括以下步骤：在硅衬底上形成多个平行的离散沟槽，每个离散的沟槽具有第一壁和第二壁，其中在硅衬底的表面和第一壁之间形成倾斜角壁; 在所述硅衬底和所述沟槽上形成缓冲层，其中所述第一壁上的所述缓冲层在所述生长区中具有多个生长区和多个非生长区，并与所述生长区互补; 在缓冲层上形成覆盖层并露出生长区; 以及从缓冲层的生长区域生长半极性氮化物并覆盖覆盖层。由此，硅衬底和半极性氮化物之间的热应力引起的裂纹减少，并且提高了半极性氮化物膜的质量。

3. 发明授权

US08237174B2 LED structure 有权
标题翻译： LED结构
公开(公告)号：US08237174B2
公开(公告)日：2012-08-07
申请号：US12776834
申请日：2010-05-10
申请人： Peng-Ren Chen , Hsueh-Hsing Liu , Jen-Inn Chyi
发明人： Peng-Ren Chen , Hsueh-Hsing Liu , Jen-Inn Chyi
IPC分类号： H01L27/15 , H01L31/12 , H01L33/00
CPC分类号： H01L33/14 , H01L33/04
摘要： The present invention discloses an LED structure, wherein an N-type current spreading layer is interposed between N-type semiconductor layers to uniformly distribute current flowing through the N-type semiconductor layer. The N-type current spreading layer includes at least three sub-layers stacked in a sequence of from a lower band gap to a higher band gap, wherein the sub-layer having the lower band gap is near the substrate, and the sub-layer having the higher band gap is near the light emitting layer. Each sub-layer of the N-type current spreading layer is expressed by a general formula InxAlyGa(1-x-y)N, wherein 0≦x≦1, 0≦y≦1, and 0≦x+y≦1.
摘要翻译：本发明公开了一种LED结构，其中N型电流扩展层插入在N型半导体层之间以均匀地分布流过N型半导体层的电流。 N型电流扩展层包括从低带隙到较高带隙的顺序堆叠的至少三个子层，其中具有较低带隙的子层在衬底附近，并且子层具有较高带隙的发光层靠近发光层。 N型电流扩展层的每个子层由通式In x Al y Ga（1-x-y）N表示，其中0＆nlE; x＆nlE; 1,0＆amp; nlE; y＆nlE; 1和0＆nlE; x + y＆nlE;

4. 发明授权

US08586995B2 Semiconductor element having high breakdown voltage 失效
标题翻译：具有高击穿电压的半导体元件
公开(公告)号：US08586995B2
公开(公告)日：2013-11-19
申请号：US13571041
申请日：2012-08-09
申请人： Jen-Inn Chyi , Geng-Yen Lee , Hsueh-Hsing Liu
发明人： Jen-Inn Chyi , Geng-Yen Lee , Hsueh-Hsing Liu
IPC分类号： H01L29/205 , H01L29/78
CPC分类号： H01L29/66212 , H01L29/2003 , H01L29/4236 , H01L29/475 , H01L29/7787 , H01L29/872
摘要： A semiconductor element having a high breakdown voltage includes a substrate, a buffer layer, a semiconductor composite layer and a bias electrode. The buffer layer disposed on the substrate includes a high edge dislocation defect density area. The semiconductor composite layer disposed on the buffer layer includes a second high edge dislocation defect density area formed due to the first high edge dislocation defect density area. The bias electrode is disposed on the semiconductor composite layer. A virtual gate effect of defect energy level capturing electrons is generated due to the first and second high edge dislocation defect density areas, such that an extended depletion region expanded from the bias electrode is formed at the semiconductor composite layer. When the bias electrode receives a reverse bias, the extended depletion region reduces a leakage current and increases the breakdown voltage of the semiconductor element.
摘要翻译：具有高击穿电压的半导体元件包括衬底，缓冲层，半导体复合层和偏置电极。设置在基板上的缓冲层包括高边缘位错缺陷密度区域。设置在缓冲层上的半导体复合层包括由于第一高边缘位错缺陷密度区域而形成的第二高边缘位错缺陷密度区域。偏置电极设置在半导体复合层上。由于第一和第二高边缘位错缺陷密度区域产生缺陷能级捕获电子的虚拟栅极效应，使得在半导体复合层处形成从偏置电极扩展的扩展的耗尽区。当偏置电极接收到反向偏压时，扩展耗尽区减小漏电流并增加半导体元件的击穿电压。

5. 发明申请

US20110272719A1 LED STRUCTURE 有权
标题翻译： LED结构
公开(公告)号：US20110272719A1
公开(公告)日：2011-11-10
申请号：US12776834
申请日：2010-05-10
申请人： Peng-Ren Chen , Hsueh-Hsing Liu , Jen-Inn Chyi
发明人： Peng-Ren Chen , Hsueh-Hsing Liu , Jen-Inn Chyi
IPC分类号： H01L33/32
CPC分类号： H01L33/14 , H01L33/04
摘要： The present invention discloses an LED structure, wherein an N-type current spreading layer is interposed between N-type semiconductor layers to uniformly distribute current flowing through the N-type semiconductor layer. The N-type current spreading layer includes at least three sub-layers stacked in a sequence of from a lower band gap to a higher band gap, wherein the sub-layer having the lower band gap is near the substrate, and the sub-layer having the higher band gap is near the light emitting layer. Each sub-layer of the N-type current spreading layer is expressed by a general formula InxAlyGa(1-x-y)N, wherein 0≦x≦1, 0≦y≦1, and 0≦x+y≦1.
摘要翻译：本发明公开了一种LED结构，其中N型电流扩展层插入在N型半导体层之间以均匀地分布流过N型半导体层的电流。 N型电流扩展层包括从低带隙到较高带隙的顺序堆叠的至少三个子层，其中具有较低带隙的子层在衬底附近，并且子层具有较高带隙的发光层靠近发光层。 N型电流扩展层的每个子层由通式In x Al y Ga（1-x-y）N表示，其中0＆nlE; x＆nlE; 1,0＆amp; nlE; y＆nlE; 1和0＆nlE; x + y＆nlE;

6. 发明授权

US08048786B2 Method for fabricating single-crystalline substrate containing gallium nitride 有权
标题翻译：制造含有氮化镓的单晶衬底的方法
公开(公告)号：US08048786B2
公开(公告)日：2011-11-01
申请号：US12263555
申请日：2008-11-03
申请人： Jen-Inn Chyi , Guan-Ting Chen , Hsueh-Hsing Liu
发明人： Jen-Inn Chyi , Guan-Ting Chen , Hsueh-Hsing Liu
IPC分类号： H01L21/20
CPC分类号： H01L21/0237 , C30B25/02 , C30B25/18 , C30B29/406 , H01L21/02381 , H01L21/0254 , H01L21/02639 , H01L21/0265
摘要： The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First, form a plurality of island containing GaN on a host substrate. Next, use the plurality of islands containing GaN as a mask to etch the substrate and form an uneven host substrate. Then, perform epitaxy on the uneven host substrate to make the islands containing GaN grow in size and merge into a continuous single-crystalline film containing GaN. Finally, separate the single-crystalline film containing GaN from the uneven host substrate to obtain the single-crystalline substrate containing GaN. According to the present invention, process time can be saved and yield can be improved.
摘要翻译：本发明提供一种制造含有氮化镓（GaN）的单晶衬底的方法，包括以下步骤。首先，在主体基板上形成多个含有GaN的岛。接下来，使用包含GaN的多个岛作为掩模来蚀刻衬底并形成不均匀的主体衬底。然后，在不均匀的主体衬底上进行外延，使含有GaN的岛尺寸增长并且合并成含有GaN的连续单晶膜。最后，从不均匀的主体衬底上分离含有GaN的单晶膜，得到含有GaN的单晶衬底。根据本发明，可以节省加工时间，提高成品率。

7. 发明申请

US20100068872A1 Method for Fabricating Single-Crystalline Substrate Containing Gallium Nitride 有权
标题翻译：制造含有氮化镓的单晶基板的方法
公开(公告)号：US20100068872A1
公开(公告)日：2010-03-18
申请号：US12263555
申请日：2008-11-03
申请人： Jen-Inn Chyi , Guan-Ting Chen , Hsueh-Hsing Liu
发明人： Jen-Inn Chyi , Guan-Ting Chen , Hsueh-Hsing Liu
IPC分类号： H01L21/205
CPC分类号： H01L21/0237 , C30B25/02 , C30B25/18 , C30B29/406 , H01L21/02381 , H01L21/0254 , H01L21/02639 , H01L21/0265
摘要： The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First, form a plurality of island containing GaN on a host substrate. Next, use the plurality of islands containing GaN as a mask to etch the substrate and form an uneven host substrate. Then, perform epitaxy on the uneven host substrate to make the islands containing GaN grow in size and merge into a continuous single-crystalline film containing GaN. Finally, separate the single-crystalline film containing GaN from the uneven host substrate to obtain the single-crystalline substrate containing GaN. According to the present invention, process time can be saved and yield can be improved.
摘要翻译：本发明提供一种制造含有氮化镓（GaN）的单晶衬底的方法，包括以下步骤。首先，在主体基板上形成多个含有GaN的岛。接下来，使用包含GaN的多个岛作为掩模来蚀刻衬底并形成不均匀的主体衬底。然后，在不平坦的主体衬底上进行外延，使含有GaN的岛尺寸增长并且合并成含有GaN的连续单晶膜。最后，从不均匀的主体衬底上分离含有GaN的单晶膜，得到含有GaN的单晶衬底。根据本发明，可以节省加工时间，提高成品率。

8. 发明申请

US20130240895A1 SEMICONDUCTOR ELEMENT HAVING HIGH BREAKDOWN VOLTAGE 失效
标题翻译：具有高电压破坏的半导体元件
公开(公告)号：US20130240895A1
公开(公告)日：2013-09-19
申请号：US13571041
申请日：2012-08-09
申请人： Jen-Inn CHYI , Geng-Yen Lee , Hsueh-Hsing Liu
发明人： Jen-Inn CHYI , Geng-Yen Lee , Hsueh-Hsing Liu
IPC分类号： H01L29/205
CPC分类号： H01L29/66212 , H01L29/2003 , H01L29/4236 , H01L29/475 , H01L29/7787 , H01L29/872
摘要： A semiconductor element having a high breakdown voltage includes a substrate, a buffer layer, a semiconductor composite layer and a bias electrode. The buffer layer disposed on the substrate includes a high edge dislocation defect density area. The semiconductor composite layer disposed on the buffer layer includes a second high edge dislocation defect density area formed due to the first high edge dislocation defect density area. The bias electrode is disposed on the semiconductor composite layer. A virtual gate effect of defect energy level capturing electrons is generated due to the first and second high edge dislocation defect density areas, such that an extended depletion region expanded from the bias electrode is formed at the semiconductor composite layer. When the bias electrode receives a reverse bias, the extended depletion region reduces a leakage current and increases the breakdown voltage of the semiconductor element.
摘要翻译：具有高击穿电压的半导体元件包括衬底，缓冲层，半导体复合层和偏置电极。设置在基板上的缓冲层包括高边缘位错缺陷密度区域。设置在缓冲层上的半导体复合层包括由于第一高边缘位错缺陷密度区域而形成的第二高边缘位错缺陷密度区域。偏置电极设置在半导体复合层上。由于第一和第二高边缘位错缺陷密度区域产生缺陷能级捕获电子的虚拟栅极效应，使得在半导体复合层处形成从偏置电极扩展的扩展的耗尽区。当偏置电极接收到反向偏压时，扩展耗尽区减小漏电流并增加半导体元件的击穿电压。

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