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1. 发明申请

US20070233965A1 Way hint line replacement algorithm for a snoop filter 审中-公开
标题翻译：用于窥探过滤器的方式提示行替换算法
公开(公告)号：US20070233965A1
公开(公告)日：2007-10-04
申请号：US11395123
申请日：2006-03-31
申请人： Kai Cheng , Rob Milstrey , Jeffrey Gilbert , Liqun Cheng , Lily Looi , Faye Briggs
发明人： Kai Cheng , Rob Milstrey , Jeffrey Gilbert , Liqun Cheng , Lily Looi , Faye Briggs
IPC分类号： G06F13/28
CPC分类号： G06F12/0831
摘要： A system and method for maintaining data coherency in a multiprocessor environment. The system includes a snoop filter that maintains a representation of the organization and context of each last level cache on the system. The representative is updated with each request which each include a hint to the location where requested data will be stored in the last level cache.
摘要翻译：一种用于在多处理器环境中维护数据一致性的系统和方法。该系统包括一个窥探过滤器，用于维护系统上每个最后一级缓存的组织和上下文的表示。每个请求更新代表，每个请求都包含对所请求数据将存储在最后一级缓存中的位置的提示。

2. 发明申请

US20050060499A1 Method and apparatus for joint cache coherency states in multi-interface caches 失效
标题翻译：多接口缓存中联合高速缓存一致性状态的方法和装置
公开(公告)号：US20050060499A1
公开(公告)日：2005-03-17
申请号：US10662093
申请日：2003-09-12
申请人： Jeffrey Gilbert , Kai Cheng
发明人： Jeffrey Gilbert , Kai Cheng
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0811 , G06F12/0831 , G06F2212/507
摘要： A method and apparatus for cache coherency states is disclosed. In one embodiment, a cache accessible across two interfaces, an inner interface and an outer interface, may have a joint cache coherency state. The joint cache coherency state may have a first state for the inner interface and a second state for the outer interface, where the second state has higher privilege than the first state. In one embodiment this may promote speculative invalidation. In other embodiments this may reduce snoop transactions on the inner interface.
摘要翻译：公开了一种用于高速缓存一致性状态的方法和装置。在一个实施例中，可跨两个接口访问的高速缓存，内部接口和外部接口可以具有联合高速缓存一致性状态。联合高速缓存一致性状态可以具有内部接口的第一状态和外部接口的第二状态，其中第二状态具有比第一状态更高的特权。在一个实施例中，这可以促进投机无效。在其他实施例中，这可以减少内部接口上的窥探事务。

3. 发明授权

US10523981B2 Multi-window video navigation system based on content—aware informative display 有权
公开(公告)号：US10523981B2
公开(公告)日：2019-12-31
申请号：US16125659
申请日：2018-09-07
申请人： Jeffrey Gilbert , Robert Miller , Joseph Inzerillo , Khurram Siddiqui
发明人： Jeffrey Gilbert , Robert Miller , Joseph Inzerillo , Khurram Siddiqui
IPC分类号： H04N21/422 , H04N21/2347 , H04L29/06 , H04N5/445 , H04N7/167 , H04N7/173 , H04N21/214 , H04N21/41 , H04N21/436 , H04N21/4363 , H04N21/4402 , H04N21/4405 , H04N21/4408 , H04N21/4788 , H04N21/482
摘要： A telecommunications network for a high-rise Multi-Dwelling Unit (MDU) is provided. In the telecommunications network eliminates much of the wiring and space required for voice, video and data services, electrical closets, security cameras, building automation, fire annunciation systems, hard-wired smoke detectors, hard-wired heat detectors, electrical meters through the use of an integrated Ethernet communication system. Additionally, a video program guide (VPG) is provided that allows a user to interact with multiple streams of video in real time. The VPG includes techniques for displaying multiple streams of data on a single screen for a user.

4. 发明申请

US20090327572A1 EXCHANGING INFORMATION BETWEEN COMPONENTS COUPLED WITH AN A I2C BUS VIA SEPARATE BANKS 审中-公开
标题翻译：通过独立银行与I2C总线相连的组件之间的交换信息
公开(公告)号：US20090327572A1
公开(公告)日：2009-12-31
申请号：US12164757
申请日：2008-06-30
申请人： In Sung Cho , Kumar Mahesh , Prakash Kamath , Jeffrey Gilbert , Rob Frizzell
发明人： In Sung Cho , Kumar Mahesh , Prakash Kamath , Jeffrey Gilbert , Rob Frizzell
IPC分类号： G06F12/06
CPC分类号： G06F13/4291
摘要： A method and apparatus for exchanging information between components coupled with an a I2C bus via separate banks. In one embodiment, the apparatus is for use in a wireless communication system for communicating with a wireless network and comprises a host processor having an I2C interface, a transceiver having an I2C interface, a physical interface coupling the host processor and the transceiver, the physical interface having an I2C bus coupled to the I2C interface of both the host processor and the transceiver and multiple separate banks of memory accessible by the host processor and the transceiver to exchange information between the host processor and the transceiver, where the host processor and the transceiver access the plurality of banks of memory via their respective I2C interfaces.
摘要翻译：一种用于通过单独的银行在与I2C总线耦合的组件之间交换信息的方法和装置。在一个实施例中，该装置用于与无线网络通信的无线通信系统，并且包括具有I2C接口的主处理器，具有I2C接口的收发器，耦合主机处理器和收发器的物理接口，物理接口具有耦合到主处理器和收发器的I2C接口的I2C总线以及由主机处理器和收发器可访问的多个独立存储体，以在主处理器和收发器之间交换信息，其中主处理器和收发器通过它们各自的I2C接口访问多个存储器组。

5. 发明申请

US20090327544A1 DISPATCH CAPABILITY USING A SINGLE PHYSICAL INTERFACE 有权
标题翻译：使用单个物理接口的分配能力
公开(公告)号：US20090327544A1
公开(公告)日：2009-12-31
申请号：US12164907
申请日：2008-06-30
申请人： In Sung Cho , Kumar Mahesh , Prakash Kamath , Jeffrey Gilbert , Rob Frizzell
发明人： In Sung Cho , Kumar Mahesh , Prakash Kamath , Jeffrey Gilbert , Rob Frizzell
IPC分类号： G06F13/42
CPC分类号： H04N21/43637 , G06F1/00 , G06F13/42 , G06F2101/00 , G09G2370/16 , H04L1/00 , H04L69/32
摘要： An apparatus, system and method for performing dispatch operations using a signal physical interface are disclosed. In one embodiment, the apparatus is for use in a wireless communication system for communicating with a wireless network and comprises a host processor, a transceiver, a physical interface coupling the host processor and the transceiver, and a memory accessible by the host processor and the transceiver to exchange information between the host processor and the transceiver. The transceiver is operable to store data in the memory for the host processor to send data to the host processor using the memory and asserts a control signal to the host processor to notify the host processor that the memory contains data for the host processor, and the host processor is operable to access the memory to obtain the data thereafter. The data is associated with a remote device in the wireless network and is stored as one or more packets at a first storage location in the memory with a first identifier identifying the remote device.
摘要翻译：公开了一种使用信号物理接口执行调度操作的装置，系统和方法。在一个实施例中，该装置用于与无线网络进行通信的无线通信系统，并且包括主机处理器，收发器，耦合主机处理器和收发器的物理接口以及主机处理器和收发器在主处理器和收发器之间交换信息。收发器可操作以将存储器中的数据存储在主机处理器中，以使用存储器向主机处理器发送数据，并向主机处理器发出控制信号，以通知主机处理器该存储器包含用于主机处理器的数据，主机处理器可操作以访问存储器以便此后获得数据。数据与无线网络中的远程设备相关联，并且以识别远程设备的第一标识符作为一个或多个分组存储在存储器中的第一存储位置处。

6. 发明申请

US20070224951A1 Low power very high-data rate device 有权
标题翻译：低功耗非常高的数据速率设备
公开(公告)号：US20070224951A1
公开(公告)日：2007-09-27
申请号：US11726874
申请日：2007-03-22
申请人： James Gilb , Jeffrey Gilbert , Sheung Li , Karim Nassiri-Toussi
发明人： James Gilb , Jeffrey Gilbert , Sheung Li , Karim Nassiri-Toussi
IPC分类号： H04B1/04 , H01Q11/12 , H04B1/38
CPC分类号： H04B7/0691 , H01Q3/26 , H04B7/0617 , H04W52/287 , H04W52/42
摘要： A radio frequency (RF) transmitter has a plurality of digitally controlled phased array antennas coupled to and controlled by the processor to transmit data. The processor is to enable one or more antennas to be turned off during a use of the apparatus to reduce a power consumption of the apparatus.
摘要翻译：射频（RF）发射机具有耦合到处理器并由其处理器控制以发射数据的多个数字控制相控阵列天线。该处理器是在使用该设备期间使一个或多个天线能够被关闭以减少设备的功耗。

7. 发明申请

US20050173522A1 System and method for identifying a retail customer's purchasing habits 有权
标题翻译：识别零售客户购买习惯的系统和方法
公开(公告)号：US20050173522A1
公开(公告)日：2005-08-11
申请号：US10936754
申请日：2004-09-08
申请人： Kyle Turner , Kevin Morrin , Jeffrey Gilbert
发明人： Kyle Turner , Kevin Morrin , Jeffrey Gilbert
IPC分类号： G06F20060101 , G06K15/00 , G06F17/60
CPC分类号： G07G5/00 , G06Q30/02 , G06Q30/0238 , G06Q30/0242 , G07G1/12
摘要： A system and method for targeting marketing messages at a point-of-sale consumer by collecting current transactional receipt data, such as the time of a retail transaction, the date of the transaction, the number of items purchased the transaction, and the total dollar value of a transaction. The data collected from the receipt is then applied to one or more algorithms to determine which marketing messages are most likely to be successful. A predetermined number of marketing messages found most likely to be successful are then printed on the customer receipt in order of priority of expected effectiveness. The system is designed to be used in connection with a point-of-sale terminal without the need for additional hardware, such as a second printer, or the need to access historical customer data.
摘要翻译：一种系统和方法，用于通过收集当前的交易收据数据来定位销售点消费者的营销信息，例如零售交易的时间，交易的日期，交易的购买数量以及总的美元交易价值。然后将从收据收集的数据应用于一种或多种算法，以确定哪些营销消息最有可能成功。然后按照预期效果的优先次序，将最可能成功的预定数量的营销消息印在客户收据上。该系统被设计为与销售点终端相关联使用，而不需要诸如第二打印机的附加硬件，或者需要访问历史客户数据。

8. 发明申请

US20050110096A1 CMOS TRANSISTOR WITH A POLYSILICON GATE ELECTRODE HAVING VARYING GRAIN SIZE 有权
标题翻译：具有具有变化的粒度的多晶硅栅极的CMOS晶体管
公开(公告)号：US20050110096A1
公开(公告)日：2005-05-26
申请号：US10904565
申请日：2004-11-16
申请人： Arne Ballantine , Kevin Chan , Jeffrey Gilbert , Kevin Houlihan , Glen Miles , James Quinlivan , Samuel Ramac , Michael Rice , Beth Ward
发明人： Arne Ballantine , Kevin Chan , Jeffrey Gilbert , Kevin Houlihan , Glen Miles , James Quinlivan , Samuel Ramac , Michael Rice , Beth Ward
IPC分类号： H01L21/28 , H01L21/336 , H01L29/49 , H01L29/76 , H01L21/3205 , H01L21/4763 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/28035 , H01L29/4925 , H01L29/665
摘要： Polysilicon electrical depletion in a polysilicon gate electrode is reduced by depositing the polysilicon under controlled conditions so as to vary the crystal grain size through the thickness of the polysilicon. The resulting CMOS transistor may have two or more depth-wise contiguous regions of respective crystalline grain size, and the selection of grain size may be directed to maximize dopant activation in the polysilicon near the gate dielectric and to tailor the resistance of the polysilicon above that first region and more distant from the gate dielectric. A region of polycrystalline silicon may have a varying grain size as a function of a distance measured from a surface of the dielectric film.
摘要翻译：通过在受控条件下沉积多晶硅来减少多晶硅栅电极中的多晶硅电耗，从而通过多晶硅的厚度来改变晶粒尺寸。所得到的CMOS晶体管可以具有各自的晶粒尺寸的两个或更多个深度连续的区域，并且可以针对晶体尺寸的选择来最大化在栅极电介质附近的多晶硅中的掺杂剂活化，并且将多晶硅的电阻调整到高于该第一区域并且远离栅极电介质。多晶硅的区域可以具有作为从电介质膜的表面测量的距离的函数的变化的晶粒尺寸。

9. 发明申请

US20050059366A1 Spur mitigation techniques 审中-公开
标题翻译：刺激减轻技术
公开(公告)号：US20050059366A1
公开(公告)日：2005-03-17
申请号：US10664792
申请日：2003-09-16
申请人： Won-Joon Choi , Jeffrey Gilbert , Yi-Hsiu Wang , Xiaoru Zhang
发明人： Won-Joon Choi , Jeffrey Gilbert , Yi-Hsiu Wang , Xiaoru Zhang
IPC分类号： H04L27/26 , H04B1/00
CPC分类号： H04L25/0232 , H04L1/0045 , H04L27/2647
摘要： Spurs cause significant problems with signal detecting, amplifier gain adjustment, and signal decoding. Various techniques can be used to mitigate the effects of spurs on a received signal. Generally, these techniques work by either canceling or ignoring the spurs. For example, a pilot mask can be used to ignore pilot information in one or more sub-channels. A Viterbi mask can determine the weighting given to bits in a sub-channel based on spur and data rate information. Channel interpolation can compute a pseudo channel estimate for a sub-channel known to have a spur location can be computed by interpolating the channel estimates of adjacent good sub-channels. Filtering of the received signal using a low-pass filter, a growing box filter, or a low-pass filter with self-correlation can be used to cancel a spur.
摘要翻译：马刺在信号检测，放大器增益调整和信号解码方面造成重大问题。可以使用各种技术来减轻杂散对接收信号的影响。一般来说，这些技术通过取消或忽略杂散来工作。例如，可以使用导频掩码来忽略一个或多个子信道中的导频信息。维特比掩码可以基于支线和数据速率信息来确定子信道中的比特的加权。信道内插可以计算已知具有支路位置的子信道的伪信道估计，可以通过内插相邻的良好子信道的信道估计来计算。使用低通滤波器，增长盒滤波器或具有自相关的低通滤波器对接收信号进行滤波可以用于取消杂散。

10. 发明申请

US20050043252A1 Pesticidal macrolides 审中-公开
标题翻译：杀虫剂大环内酯类
公开(公告)号：US20050043252A1
公开(公告)日：2005-02-24
申请号：US10919951
申请日：2004-08-17
申请人： Paul Lewer , Donald Hann , Laura Karr , Paul Graupper , Jeffrey Gilbert , Thomas Worden , Raymond Yao , Dennis Norton
发明人： Paul Lewer , Donald Hann , Laura Karr , Paul Graupper , Jeffrey Gilbert , Thomas Worden , Raymond Yao , Dennis Norton
IPC分类号： A01N43/22 , A01N63/02 , A61K31/7048 , A61P33/14 , C07H17/08 , C12N1/20 , C12P19/62 , C12R1/01 , A01N43/04
CPC分类号： C07H17/08 , A01N43/22 , C12P19/62 , C12R1/01
摘要： Macrolide compounds produced by culturing Saccharopolyspora species LW107129 (NRRL 30141) have insecticidal and acaricidal activity and are useful intermediates for preparing spinosyn analogs.
摘要翻译：通过培养多孢子虫种类LW107129（NRRL 30141）产生的大环内酯类化合物具有杀虫和杀螨活性，是制备多杀菌素类似物的有用中间体。

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