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1. 发明申请

US20110169503A1 Chassis Shielding Effectiveness Evaluation System 有权
标题翻译：底盘屏蔽效能评估系统
公开(公告)号：US20110169503A1
公开(公告)日：2011-07-14
申请号：US12687611
申请日：2010-01-14
申请人： Jeffrey C. Hailey , Jorge C. Marcet , Leroy Jones, JR. , Raymond A. McCormick , Todd W. Steigerwald , Tze-Chuen Toh
发明人： Jeffrey C. Hailey , Jorge C. Marcet , Leroy Jones, JR. , Raymond A. McCormick , Todd W. Steigerwald , Tze-Chuen Toh
IPC分类号： G01R27/00
CPC分类号： G01R29/0835 , G01R31/001
摘要： A chassis shielding effectiveness evaluation system includes a chassis having a chassis ground. A board is located in the chassis and includes a board ground layer. A signal generator includes at least one ground member coupled to the chassis ground and a signal member coupled to the board ground layer. The signal generator is operable to send a signal through the signal member to the board ground layer.
摘要翻译：底盘屏蔽效能评估系统包括具有底盘接地的底盘。一个电路板位于机箱中，并包括一个电路板接地层。信号发生器包括耦合到机架接地的至少一个接地构件和耦合到电路板接地层的信号构件。信号发生器可操作以通过信号构件将信号发送到电路板接地层。

2. 发明授权

US08198903B2 Chassis shielding effectiveness evaluation system 有权
标题翻译：底盘屏蔽效能评估系统
公开(公告)号：US08198903B2
公开(公告)日：2012-06-12
申请号：US12687611
申请日：2010-01-14
申请人： Jeffrey C. Hailey , Jorge C. Marcet , Leroy Jones, Jr. , Raymond A. McCormick , Todd W. Steigerwald , Tze-Chuen Toh
发明人： Jeffrey C. Hailey , Jorge C. Marcet , Leroy Jones, Jr. , Raymond A. McCormick , Todd W. Steigerwald , Tze-Chuen Toh
IPC分类号： G01R27/00
CPC分类号： G01R29/0835 , G01R31/001
摘要： A chassis shielding effectiveness evaluation system includes a chassis having a chassis ground. A board is located in the chassis and includes a board ground layer. A signal generator includes at least one ground member coupled to the chassis ground and a signal member coupled to the board ground layer. The signal generator is operable to send a signal through the signal member to the board ground layer.
摘要翻译：底盘屏蔽效能评估系统包括具有底盘接地的底盘。一个电路板位于机箱中，并包括一个电路板接地层。信号发生器包括耦合到机架接地的至少一个接地构件和耦合到电路板接地层的信号构件。信号发生器可操作以通过信号构件将信号发送到电路板接地层。

3. 发明授权

US07249338B2 High speed bus with radio frequency microstrip 有权
标题翻译：高速总线带射频微带线
公开(公告)号：US07249338B2
公开(公告)日：2007-07-24
申请号：US10847507
申请日：2004-05-17
申请人： Tze-Chuen Toh
发明人： Tze-Chuen Toh
IPC分类号： G06F17/50
CPC分类号： H01P3/081 , H05K1/024 , H05K2201/09036 , H05K2201/09063 , H05K2201/09236
摘要： A method for preparing a printed circuit board and an apparatus are provided to decrease losses associated with high speed signal propagation. The printed circuit board has at least two conductive layers separated by an dielectric layer formed of a dielectric material. A conductive path is formed in one of the conductive layers for propagation of the high speed signal. At least a portion of the dielectric layer is removed on both sides of and adjacent to the conductive path. The removed portion extends in the dielectric layer between the conductive layers from one to the other and includes a hole shaped portion and a trough shaped portion. The removed portion does not extend beyond the dielectric layer.
摘要翻译：提供一种用于制备印刷电路板和装置的方法，以减少与高速信号传播相关联的损耗。印刷电路板具有由介电材料形成的电介质层分开的至少两个导电层。在导电层之一中形成导电路径，用于传播高速信号。电介质层的至少一部分在导电路径的两侧和邻近的导电路径上被去除。去除部分在导电层之间的电介质层中从一个延伸到另一个，并且包括孔形部分和槽形部分。去除的部分不延伸超过介电层。

4. 发明授权

US06747870B2 Electromagnetic interference reduction air duct 有权
标题翻译：电磁干扰减少风管
公开(公告)号：US06747870B2
公开(公告)日：2004-06-08
申请号：US10131913
申请日：2002-04-25
申请人： Tze-Chuen Toh
发明人： Tze-Chuen Toh
IPC分类号： H05K720
CPC分类号： H01L23/467 , H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： An air duct is provided for ventilating an electronic device having a processor. The air duct comprises one or more walls that have an irregular surface and that further have a layer of conductive material applied to the irregular surface. Further embodiments of the invention include electronic device enclosures and electronic devices having an air duct featuring an irregular interior surface and having conductive material applied to the irregular surface.
摘要翻译：设置有用于使具有处理器的电子设备通风的通风管。空气管道包括具有不规则表面的一个或多个壁，并且还具有施加到不规则表面的导电材料层。本发明的另外的实施例包括电子设备外壳和电子设备，其具有特征在于不规则内表面并具有应用于不规则表面的导电材料的空气通道。

5. 发明授权

US06639144B1 Electromagnetic interference reduction system 有权
标题翻译：电磁干扰降低系统
公开(公告)号：US06639144B1
公开(公告)日：2003-10-28
申请号：US09945078
申请日：2001-08-31
申请人： Tze-Chuen Toh
发明人： Tze-Chuen Toh
IPC分类号： H01B500
CPC分类号： G06F1/182 , H05K1/0233 , H05K9/0039 , H05K9/0066
摘要： A system and method incorporate one or more magnets affixed in proximity to a ground plane of a printed circuit board such that the magnetic flux of the magnet is operable to perturb current flow through the ground plane, resulting in a reduction in electromagnetic emissions. The invention is implemented with various types of magnets in different embodiments, including rare-earth magnets, AlNiCo magnets, Neodymium magnets, and flat-sheet magnets. A digital electronic device consistent with the present invention incorporates one or more magnets in proximity to a ground plane of a circuit board within the device, such devices including computers, set-top boxes, and personal digital assistants in various embodiments.
摘要翻译：一种系统和方法包括一个或多个固定在印刷电路板的接地平面附近的磁体，使得磁体的磁通量可操作以扰乱通过接地平面的电流，导致电磁辐射的减少。本发明在不同实施例中的各种类型的磁体实现，包括稀土磁体，AlNiCo磁体，钕磁体和平板磁体。符合本发明的数字电子设备包括在设备内的电路板接地平面附近的一个或多个磁体，这些设备包括计算机，机顶盒和个人数字助理。

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