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    • 1. 发明申请
    • SR-IOV FAILOVER & AGGREGATION CONTROL SYSTEM TO ENSURE WITHIN-PHYSICAL-PORT VEB LOOPBACK
    • SR-IOV故障排除和集成控制系统,以确保物理端口VEB环回
    • US20130339955A1
    • 2013-12-19
    • US13977606
    • 2012-06-08
    • Jeff PrawerJames R. HearnWaseem Ahmad
    • Jeff PrawerJames R. HearnWaseem Ahmad
    • G06F9/455
    • G06F9/45533G06F9/45558G06F2009/45595
    • Methods, apparatus and systems for effecting Virtual Machine (VM) platform communication loopback and enabling user initiated network port failover. Network communications in platforms employing VMs and having multiple network ports accessible to the VMs are configured to be routed such that communications between VMs in the platform are looped back within the platform, thus not require routing through an external switch. This is facilitated via an Intelligent Channel Bonding Driver that dynamically enforces inter-VM traffic to ensure internal loopback within the same physical port. In another aspect, a user is enabled to initiate failover of a network port on a platform employing a Virtual Machine Manager and a plurality of VMs, wherein updated configuration information is sent to disable Virtual Function (VF) drivers associated with the network port.
    • 用于实现虚拟机(VM)平台通信环回和启用用户启动的网络端口故障转移的方法,设备和系统。 配置使用虚拟机并具有VM可访问的多个网络端口的平台中的网络通信被配置为路由,使得平台中的VM之间的通信环回到平台内,因此不需要通过外部交换机进行路由。 这通过智能通道绑定驱动程序来实现,该驱动程序动态地实施VM间流量,以确保同一物理端口内的内部环回。 在另一方面,用户能够启动使用虚拟机管理器和多个虚拟机的平台上的网络端口的故障转移,其中更新的配置信息被发送以禁用与网络端口相关联的虚拟功能(VF)驱动器。
    • 4. 发明授权
    • Fixed phrase detection for search
    • 用于搜索的固定短语检测
    • US08751518B1
    • 2014-06-10
    • US13465884
    • 2012-05-07
    • Waseem AhmadDeepak Jain
    • Waseem AhmadDeepak Jain
    • G06F17/30
    • G06F17/30598G06F17/30616G06F17/30864
    • A set of search requests may be analyzed to detect fixed phrases suitable for inclusion in a search index. Sets of candidate phrases may be identified among the search requests. Fixed phrases may be detected among the candidate phrases using statistical techniques, for example, by identifying phrases having a relatively high pointwise mutual information (PMI) with respect to component keywords. Fixed phrase detection may include keyword and/or phrase clustering. Clusters may correspond to topics defined using a latent Dirichlet allocation (LDA) procedure. Fixed phrase detection may include identifying phrases having relatively high PMI within particular clusters.
    • 可以分析一组搜索请求以检测适合于包括在搜索索引中的固定短语。 可以在搜索请求之间识别候选短语的集合。 使用统计技术可以在候选短语中检测固定短语,例如通过识别关于组件关键词具有相对较高的点互信息(PMI)的短语。 固定短语检测可以包括关键字和/或短语聚类。 群集可能对应于使用潜在的Dirichlet分配(LDA)过程定义的主题。 固定短语检测可以包括识别在特定簇内具有相对较高PMI的短语。
    • 5. 发明授权
    • Analog baud rate clock and data recovery
    • 模拟波特率时钟和数据恢复
    • US08243866B2
    • 2012-08-14
    • US12116329
    • 2008-05-07
    • Dawei HuangZuxu QinDrew G. DoblarWaseem AhmadDong Joon YoonOsman Javed
    • Dawei HuangZuxu QinDrew G. DoblarWaseem AhmadDong Joon YoonOsman Javed
    • H04L7/00H04L27/06
    • H04L7/0062
    • An analog baud rate clock and data recovery apparatus includes a first track and hold circuit that delays a received signal by one unit interval to create an odd signal; a second track and hold circuit that delays the received signal by one unit interval to create an even signal; a first comparator circuit; and a second comparator circuit. The first track and hold circuit outputs the odd signal to the first comparator circuit and the second comparator circuit. The second track and hold circuit outputs the even signal to the first comparator circuit and the second comparator circuit. The first comparator adds the odd signal to the even signal and outputs a first potential timing error. The second comparator subtracts the odd signal and the even signal and outputs a second potential timing error signal. A desired timing error signal is derived from the first and second potential timing error signals. The desired timing error signal is used to determine whether signal sampling is early or late.
    • 模拟波特率时钟和数据恢复装置包括第一跟踪和保持电路,其将接收到的信号延迟一个单位间隔以产生奇数信号; 第二轨道和保持电路,其将接收到的信号延迟一个单位间隔以产生均匀信号; 第一比较器电路; 和第二比较器电路。 第一跟踪和保持电路将奇数信号输出到第一比较器电路和第二比较器电路。 第二跟踪和保持电路将偶信号输出到第一比较器电路和第二比较器电路。 第一个比较器将奇数信号加到偶数信号,并输出第一个电位定时误差。 第二比较器减去奇数信号和偶数信号,并输出第二电位定时误差信号。 从第一和第二电位定时误差信号导出期望的定时误差信号。 所需的定时误差信号用于确定信号采样是早还是晚。
    • 7. 发明授权
    • Fixed phrase detection for search
    • 用于搜索的固定短语检测
    • US08176067B1
    • 2012-05-08
    • US12712081
    • 2010-02-24
    • Waseem AhmadDeepak Jain
    • Waseem AhmadDeepak Jain
    • G06F17/30
    • G06F17/30598G06F17/30616G06F17/30864
    • A set of search requests may be analyzed to detect fixed phrases suitable for inclusion in a search index. Sets of candidate phrases may be identified among the search requests. Fixed phrases may be detected among the candidate phrases using statistical techniques, for example, by identifying phrases having a relatively high pointwise mutual information (PMI) with respect to component keywords. Fixed phrase detection may include keyword and/or phrase clustering. Clusters may correspond to topics defined using a latent Dirichlet allocation (LDA) procedure. Fixed phrase detection may include identifying phrases having relatively high PMI within particular clusters.
    • 可以分析一组搜索请求以检测适合于包括在搜索索引中的固定短语。 可以在搜索请求之间识别候选短语的集合。 使用统计技术可以在候选短语中检测固定短语,例如通过识别关于组件关键词具有相对较高的点互信息(PMI)的短语。 固定短语检测可以包括关键字和/或短语聚类。 群集可能对应于使用潜在的Dirichlet分配(LDA)过程定义的主题。 固定短语检测可以包括识别在特定簇内具有相对较高PMI的短语。
    • 8. 发明授权
    • Method for determining capacitance values for quieting noisy power conductors
    • 确定静音电力导体电容值的方法
    • US06397158B1
    • 2002-05-28
    • US09303103
    • 1999-04-29
    • Waseem AhmadKazi M. Hassan
    • Waseem AhmadKazi M. Hassan
    • G01R3108
    • G01R27/2605
    • A method for determining the value of at least one capacitance required to be placed in a conductive path on a printed circuit board is disclosed. The method includes preparing a desired signal spectrum for the conductive path, preparing an actual signal spectrum for the conductive path, and then comparing the actual signal spectrum against the desired signal spectrum to determine where any out of tolerance conditions exist. If the actual signal spectrum is in amplitude versus time form, the method further includes performing, for each time having a voltage which is higher than the maximum voltage allowed on the conductive path, a fourier transform on the amplitude versus time data. Following the optional conversion, the method proceeds with the determination of at least one frequency having an amplitude which significantly contributes to the out of tolerance condition, and computing, for the one or more frequencies contributing to the out of tolerance condition, a value of capacitance which would diminish the amplitude at that frequency to a value which is within tolerance.
    • 公开了一种用于确定需要放置在印刷电路板上的导电路径中的至少一个电容的值的方法。 该方法包括制备用于导电路径的期望信号频谱,准备用于导电路径的实际信号频谱,然后将实际信号频谱与期望信号频谱进行比较,以确定存在任何超出公差条件的位置。 如果实际的信号频谱是以幅度对时间的形式,则该方法还包括对于具有高于导电路径上允许的最大电压的电压的每一次对幅度对时间数据进行傅里叶变换。 在可选转换之后,该方法继续确定具有显着有助于超出公差条件的幅度的至少一个频率,并且对于有助于超出公差条件的一个或多个频率,计算电容值 这将使该频率处的幅度减小到公差内的值。
    • 9. 发明授权
    • Five volt tolerant I/O buffer
    • 五伏容忍I / O缓冲器
    • US6150843A
    • 2000-11-21
    • US15328
    • 1998-01-29
    • James D. ShifferWaseem Ahmad
    • James D. ShifferWaseem Ahmad
    • H03K19/003H03K19/0175H03K19/00
    • H03K19/00315
    • A 5 volt tolerant I/O buffer circuit is coupled to a power supply terminal of a predetermined power supply voltage, for driving an I/O pad to a logic state depending on an input signal and an output enable signal. The I/O buffer circuit minimizes current flow into the power supply terminal when the pad is coupled to a voltage greater than the predetermined power supply voltage. A driver transistor of a first type is formed within a diffusion well and is coupled to the predetermined power supply voltage and to the pad. First and second terminals of a protection transistor are coupled to respective ones of the predetermined power supply voltage and the diffusion well. Circuitry is provided for, when the output enable signal is active, turning on the protection transistor so as to couple the predetermined power supply voltage to the diffusion well, regardless of a voltage level of the pad. A single protection transistor is sufficient to prevent current leakage through the parasitic PN diode.
    • 5伏容限I / O缓冲电路被耦合到预定电源电压的电源端子,用于根据输入信号和输出使能信号将I / O焊盘驱动到逻辑状态。 当焊盘耦合到大于预定电源电压的电压时,I / O缓冲电路使流入电源端的电流最小化。 第一类型的驱动晶体管形成在扩散阱内并且耦合到预定的电源电压和焊盘。 保护晶体管的第一和第二端子耦合到预定电源电压和扩散阱中的相应的一个。 提供电路,当输出使能信号有效时,不管垫的电压电平如何,导通保护晶体管以将预定的电源电压耦合到扩散阱。 单个保护晶体管足以防止通过寄生PN二极管的电流泄漏。
    • 10. 发明授权
    • Buffer and method for transferring data therein
    • 用于在其中传送数据的缓冲器和方法
    • US5864243A
    • 1999-01-26
    • US715457
    • 1996-09-18
    • Deng-Yuan David ChenWaseem Ahmad
    • Deng-Yuan David ChenWaseem Ahmad
    • H03K19/003H03K19/00H03K19/0175
    • H03K19/00315
    • A mixed voltage compatible buffer having reduced power consumption is provided. One embodiment of the buffer according to the present invention comprises: a data input configured to receive an output data signal; a data interface configured to couple with a pad interconnect; an output driver coupled with said data interface and being configured to apply the output data signal thereto; and a data controller intermediate said data input and said output driver, said data controller being configured to apply a plurality of control signals of substantially equal voltage to said output driver to control the operation thereof responsive to the output data signal received via said data input. The present invention also provides for a method of transferring data within the buffer.
    • 提供了具有降低功耗的混合电压兼容缓冲器。 根据本发明的缓冲器的一个实施例包括:数据输入,被配置为接收输出数据信号; 数据接口,被配置为与焊盘互连耦合; 与所述数据接口耦合并被配置为向其施加输出数据信号的输出驱动器; 以及在所述数据输入和所述输出驱动器之间的数据控制器,所述数据控制器被配置为向所述输出驱动器施加基本上相等电压的多个控制信号,以响应于经由所述数据输入接收到的输出数据信号来控制其操作。 本发明还提供了一种在缓冲器内传送数据的方法。