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    • 2. 发明授权
    • Distributed arithmetic digital processing circuit
    • 分布式算术数字处理电路
    • US4450533A
    • 1984-05-22
    • US293367
    • 1981-08-17
    • Jean-Pierre PetitXavier Maitre
    • Jean-Pierre PetitXavier Maitre
    • G06F17/10H03H17/02H03H17/04G06F15/31
    • H03H17/0241
    • Digital processing circuit forming a weighted sum of digital signals. It comprises n groups of M series registers (10/1, . . . , 10/nM) into which are introduced the signals to be processed, n multiplexers (15/1, 15/2, . . . , 15/n), a memory (20) containing precalculated quantities characteristic of the weighted sum to be formed, said memory having a capacity of 2 .sup..beta.+n words distributed into different blocks, a modulo M counter (25), an adder-subtracter (30) connected to the memory, an accumulator-register (40) connected to the adder-subtracter and a clock (50) actuating the counter and the registers. The circuit is in that the memory is subdivided into [M-(2.sup..beta. -M)] blocks of 2.sup.n words and into (2.sup..beta. -M) blocks of 2.sup.n+1 words, said blocks being selected by the bits supplied to the outputs of the counter, in that it comprises supplementary series registers, whose number is at the most equal to 2.sup..beta. -M, said series registers receiving the supplementary signals to be processed and in that it also comprises a multplexing means (21) controlled by the outputs of the counter.
    • 数字处理电路形成数字信号的加权和。 它包括n组M系列寄存器(10/1,...,10 / nM),其中引入要处理的信号,n个多路复用器(15/1,15/2,...,15 / n) ,包含要形成的加权和特征的预先计算量的存储器(20),所述存储器具有分配到不同块中的2个β+ n个字的容量,模M计数器(25),连接的加法器 - 减法器(30) 连接到加法器 - 减法器的累加器寄存器(40)和启动计数器和寄存器的时钟(50)发送到存储器。 该电路的特征在于,存储器被细分为2n个字的[M-(2β-M)]个块和2n + 1个字的(2个β-M)块,所述块被提供给输出的位选择 因为它包括数量最多等于2β-M的补充串行寄存器,所述串行寄存器接收待处理的补充信号,并且还包括由多路复用器件(21)控制的多路复用器件 计数器的输出。
    • 4. 发明申请
    • Method of determining the impedance of an electrochemical system
    • 确定电化学系统阻抗的方法
    • US20060091892A1
    • 2006-05-04
    • US10521216
    • 2003-07-11
    • Bogdan PetrescuJean-Pierre PetitJean-Claude Poignet
    • Bogdan PetrescuJean-Pierre PetitJean-Claude Poignet
    • G01N27/416
    • G01R27/02
    • The invention relates to a method of determining the complex impedance Z(fm) of a non-steady electrochemical system, comprising the following steps consisting in: bringing the system to a selected voltage condition and applying a sinusoidal signal with frequency fm thereto; immediately thereafter, measuring successive values for voltage and current at regular time intervals ?T; calculating the discrete Fourier transforms for voltage (E(f)) and current (I(f)), the voltage transform being calculated for the single frequency fm of the sinusoidal signal and the current transform being calculated for frequency fm and for two adjacent frequencies fm−1 and fm+1 on either side of frequency fm; and calculating the impedance using the following formula: Z(fm)=E(fm)/I*(fm), wherein I* denotes a corrected current such that Re[I*(fm)]=Re[I(fm)]−{Re[I(fm+1)]+Re[I(fm−1)]}/2, Im[I*(fm)]=Im[I(fm)]−{Im[I(fm+1)]+Im[I(fm−1)]}/2.
    • 本发明涉及一种确定非稳定电化学系统的复阻抗Z(f mm)的方法,包括以下步骤:使系统处于选定的电压状态并施加正弦波 信号,频率为f m m; 此后,以规则的时间间隔ΔT测量电压和电流的连续值; 计算电压(E(f))和电流(I(f))的离散傅里叶变换,对正弦信号的单频f m m计算电压变换,并计算当前变换 对于频率f m m和频率f m 2的任一侧上的两个相邻频率f m-1和f m + 1 < / SUB>; 并且使用以下公式计算阻抗:Z(f m m)= E(f m m)/ I *(f m m)其中 I *表示校正电流,使得Re [I *(f> m N)] = Re [I(f m m)) - {Re [I(f&prime; m + 1)] + Re [I(f m-1)] / 2,Im [I *(f m m)] = Im [ I(f m-1)] - {Im [I(f m + 1)] + Im [I(f m-1)] } / 2。
    • 6. 发明授权
    • Method of determining the impedance of an electrochemical system
    • 确定电化学系统阻抗的方法
    • US07253631B2
    • 2007-08-07
    • US10521216
    • 2003-07-11
    • Bogdan PetrescuJean-Pierre PetitJean-Claude Poignet
    • Bogdan PetrescuJean-Pierre PetitJean-Claude Poignet
    • H03H19/00
    • G01R27/02
    • The invention relates to a method of determining the complex impedance Z(fm) of a non-steady electrochemical system, comprising the following steps consisting in: bringing the system to a selected voltage condition and applying a sinusoidal signal with frequency fm thereto; immediately thereafter, measuring successive values for voltage and current at regular time intervals ?T; calculating the discrete Fourier transforms for voltage (E(f)) and current (I(f)), the voltage transform being calculated for the single frequency fm of the sinusoidal signal and the current transform being calculated for frequency fm and for two adjacent frequencies fm−1 and fm+1 on either side of frequency fm; and calculating the impedance using the following formula: Z(fm)=E(fm)/I*(fm), wherein I* denotes a corrected current such that Re[I*(fm)]=Re[I*(fm)]−(Re[I(fm+1)]+Re[I(fm−1)]2, Im[I*(fm)]=Im[I(fm)]−Im[I(fm+1)]+Im[I(fm−1)])/2.
    • 本发明涉及一种确定非稳定电化学系统的复阻抗Z(f mm)的方法,包括以下步骤:使系统处于选定的电压状态并施加正弦波 信号,频率为f m m; 此后,以规则的时间间隔ΔT测量电压和电流的连续值; 计算电压(E(f))和电流(I(f))的离散傅里叶变换,对正弦信号的单频f m m计算电压变换,并计算当前变换 对于频率f m m和频率f m 2的任一侧上的两个相邻频率f m-1和f m + 1 < / SUB>; 并且使用以下公式计算阻抗:Z(f m m)= E(f m m)/ I *(f m m)其中 I *表示校正电流,使得Re [I *(f> m N)] = Re [I *(f m m)) - (Re [I(f&lt; SUB > m + 1)] + Re [I(f m-1)] 2,Im [I *(f m m)] = Im [I (f m-1)] - Im [I(f m + 1)] + Im [I(f m-1)])/ 2。
    • 7. 发明授权
    • Digital transmission system with a double analog integrator Delta Sigma
coder and a double digital integrator Delta Sigma decoder
    • 数字传输系统采用双模拟积分器Delta Sigma编码器和双数字积分器Delta Sigma解码器
    • US4301446A
    • 1981-11-17
    • US170043
    • 1980-07-17
    • Jean-Pierre Petit
    • Jean-Pierre Petit
    • H04B14/06H03K13/02
    • H04B14/062
    • Delta-Sigma noise-shaping coder with two analog integrators and Delta-Sigma decoder with two digital integrators. The coder comprises an operational amplifier with two analog integrators in its feedback loop and two cascaded flipflops both connected to the input of the operational amplifier through resistors having a predetermined ratio. The configuration of the integrators is particular and results of the identification of the z-transfer function of the coder to be designed with the p-transfer function of a known integrator (p, Laplace's variable). The decoder comprises a digital integrator-filter of order two and two cascaded flipflops both connected to the input of the filter through amplifiers having gains in a predetermined ratio.
    • 带两个模拟积分器的Delta-Sigma噪声整形编码器和两个数字积分器的Delta-Sigma解码器。 编码器包括在其反馈回路中具有两个模拟积分器的运算放大器和通过具有预定比例的电阻器连接到运算放大器的输入的两个级联触发器。 积分器的配置是特定的,并且使用已知积分器的p转移函数(p,拉普拉斯变量)来设计编码器的z传递函数的结果。 解码器包括二阶和两级级联触发器的数字积分器滤波器,它们通过具有预定比例增益的放大器连接到滤波器的输入端。