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1. 发明申请

US20070113233A1 Program thread synchronization 有权
标题翻译：程序线程同步
公开(公告)号：US20070113233A1
公开(公告)日：2007-05-17
申请号：US11272197
申请日：2005-11-10
申请人： Jean-Francois Collard , Norman Jouppi , John Sampson
发明人： Jean-Francois Collard , Norman Jouppi , John Sampson
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G06F9/52 , G06F9/522 , G06F12/0808
摘要： The present invention is a method of and system for program thread synchronization. In accordance with an embodiment of the invention, a method of synchronizing program threads for one or more processors is provided. An address for data for each of a plurality of program threads to be synchronized is determined. For each processor executing one or more of the threads to be synchronized, execution of the thread is halted at a barrier by attempting a data operation to the determined address and the address being unavailable. Execution of the threads is resumed.
摘要翻译：本发明是用于程序线程同步的方法和系统。根据本发明的一个实施例，提供了一种同步一个或多个处理器的程序线程的方法。确定要同步的多个程序线程中的每一个的数据的地址。对于执行要同步的一个或多个线程的每个处理器，通过尝试对所确定的地址进行数据操作并且该地址不可用来停止线程的执行。恢复执行线程。

2. 发明申请

US20070113232A1 Program thread syncronization 失效
标题翻译：程序线程同步
公开(公告)号：US20070113232A1
公开(公告)日：2007-05-17
申请号：US11271535
申请日：2005-11-10
申请人： Jean-Francois Collard , Norman Jouppi , Michael Schlansker
发明人： Jean-Francois Collard , Norman Jouppi , Michael Schlansker
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G06F9/52
摘要： The present invention is a method of and system for program thread synchronization. In accordance with an embodiment of the invention, a method of synchronizing program threads for one or more processors is provided. An instruction cache line for is determined each of a plurality of program threads to be synchronized. For each processor executing one or more of the threads to be synchronized, execution of the thread is halted at a barrier by rendering the determined instruction cache line unavailable. Execution of the threads resumes by rendering the determined instruction cache lines available.
摘要翻译：本发明是用于程序线程同步的方法和系统。根据本发明的一个实施例，提供了一种同步一个或多个处理器的程序线程的方法。确定要同步的多个程序线程中的每一个的指令高速缓存行。对于执行要同步的一个或多个线程的每个处理器，通过渲染所确定的指令高速缓存行不可用来停止线程的执行。通过渲染确定的指令高速缓存行可用来恢复线程的执行。

3. 发明申请

US20070168646A1 Data exchange between cooperating processors 审中-公开
标题翻译：合作处理器之间的数据交换
公开(公告)号：US20070168646A1
公开(公告)日：2007-07-19
申请号：US11333708
申请日：2006-01-17
申请人： Jean-Francois Collard , Norman Jouppi , Christophe Lemuet
发明人： Jean-Francois Collard , Norman Jouppi , Christophe Lemuet
IPC分类号： G06F15/00
CPC分类号： G06F15/16
摘要： One embodiment relates to a computer apparatus including at least a microprocessor having an address space, an accelerator configured to cooperatively execute a program with the microprocessor, and a data register in the accelerator. The data register in the accelerator is mapped into the memory address space of the microprocessor. Other embodiments are also disclosed.
摘要翻译：一个实施例涉及至少包括具有地址空间的微处理器，被配置为与微处理器协同执行程序的加速器和加速器中的数据寄存器的计算机设备。加速器中的数据寄存器映射到微处理器的存储器地址空间。还公开了其他实施例。

4. 发明授权

US07650471B2 Head of queue cache for communication interfaces 有权
标题翻译：通讯接口队列缓存头
公开(公告)号：US07650471B2
公开(公告)日：2010-01-19
申请号：US11326919
申请日：2006-01-06
申请人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
发明人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
IPC分类号： G06F12/10
CPC分类号： G06F12/0831 , G06F12/0862 , G06F12/0893
摘要： A technique includes identifying an address of a head end of a queue and monitoring a coherent interconnect to identify a data transfer that is communicated by a producer, which targets the address. The technique includes storing the data of the data transfer in the queue and selectively storing at least a portion of the data in a head-of-queue cache memory based at least in part on whether the monitoring identifies the address. At least a portion of the data is selectively retrieved from the head-of-queue cache memory instead of from the queue for transmission to a consumer.
摘要翻译：一种技术包括识别队列的头端的地址并监视相干互连以识别由生产者传送的数据传输，该生产者以该地址为目标。该技术包括将数据传输的数据存储在队列中并且至少部分地基于监视是否识别地址来选择性地将至少一部分数据存储在队列头部高速缓冲存储器中。从队列高速缓冲存储器而不是从队列中选择性地检索至少一部分数据以传送给消费者。

5. 发明申请

US20060059257A1 Message queue tuning 审中-公开
标题翻译：消息队列调优
公开(公告)号：US20060059257A1
公开(公告)日：2006-03-16
申请号：US10940173
申请日：2004-09-14
申请人： Jean-Francois Collard , Patrick Estep
发明人： Jean-Francois Collard , Patrick Estep
IPC分类号： G06F15/173
CPC分类号： G06F9/546 , H04L49/90
摘要： Message queue tuning is disclosed. A communication routine is provided that is able to record a log entry for a message. A log is obtained by running a software application with the communication routine. The log is evaluated to determine a desired value of a tuning knob for a message queue parameter of the communication routine, and the tuning knob is adjusted to the desired value for running the software application with the communication routine.
摘要翻译：消息队列调优被公开。提供了能够记录消息的日志条目的通信例程。通过运行具有通信例程的软件应用程序获得日志。评估日志以确定通信例程的消息队列参数的调谐旋钮的期望值，并且通过通信例程将调谐旋钮调整到用于运行软件应用程序的期望值。

6. 发明申请

US20060026582A1 Method and system for optional code scheduling 有权
标题翻译：可选代码调度的方法和系统
公开(公告)号：US20060026582A1
公开(公告)日：2006-02-02
申请号：US10902199
申请日：2004-07-28
申请人： Jean-Francois Collard , Alan Karp
发明人： Jean-Francois Collard , Alan Karp
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： A method of scheduling optional instructions in a compiler targets a processor. The scheduling includes indicating a limit on the additional processor computations that are available for executing an optional code, generating one or more required instructions corresponding to a source code and one or more optional instructions corresponding to the optional code used with the source code and scheduling all of the one or more required instructions with as many of the one or more optional instructions as possible without exceeding the indicated limit on the additional processor computations for executing the optional code.
摘要翻译：在编译器中调度可选指令的方法针对处理器。调度包括指示可用于执行可选代码的附加处理器计算的限制，生成对应于源代码的一个或多个所需指令以及对应于与源代码一起使用的可选代码的一个或多个可选指令并且调度所有所述一个或多个所需指令具有尽可能多的一个或多个可选指令，而不超过用于执行可选代码的附加处理器计算的指定限制。

7. 发明申请

US20080005726A1 Methods and systems for modifying software applications to implement memory allocation 审中-公开
标题翻译：用于修改软件应用程序以实现内存分配的方法和系统
公开(公告)号：US20080005726A1
公开(公告)日：2008-01-03
申请号：US11477840
申请日：2006-06-29
申请人： Jean-Francois Collard
发明人： Jean-Francois Collard
IPC分类号： G06F9/45
CPC分类号： G06F8/52
摘要： Techniques for modifying applications to implement memory allocation are disclosed. The application is executed using a default memory allocation scheme. A log is generated that identifies which memory addresses are requested by which instructions of the application. The log is evaluated to identify changes to be made to the default memory allocation scheme and, after execution, the application is modified by adding instructions to implement the identified changes.
摘要翻译：公开了用于修改应用以实现内存分配的技术。应用程序使用默认内存分配方案执行。生成一个日志，用于标识应用程序的哪个指令请求哪些内存地址。评估日志以识别对默认内存分配方案的更改，并且在执行后，通过添加指令来修改应用程序来实现所标识的更改。

8. 发明申请

US20050283772A1 Determination of loop unrolling factor for software loops 审中-公开
标题翻译：确定软件循环的循环展开因子
公开(公告)号：US20050283772A1
公开(公告)日：2005-12-22
申请号：US10874614
申请日：2004-06-22
申请人： Kalyan Muthukumar , Jean-Francois Collard
发明人： Kalyan Muthukumar , Jean-Francois Collard
IPC分类号： G06F9/45
CPC分类号： G06F8/4452
摘要： Disclosed are embodiments of a method and system for calculating an unrolling factor for software loops. The unrolling factor may be calculated by applying a formula that takes into account issue constraints of a processor. The issue constraints may include the total issue width of the processor, and may also include individual issue constraints for each instruction type. The software loop may be unrolled by the calculated unrolling factor and may be software pipelined. Other embodiments are also described and claimed.
摘要翻译：公开了用于计算软件循环的展开因子的方法和系统的实施例。可以通过应用考虑到处理器的问题约束的公式来计算展开因子。问题约束可以包括处理器的总发行宽度，并且还可以包括针对每个指令类型的单独的问题约束。软件循环可以通过计算的展开因子展开，并且可以是软件流水线的。还描述和要求保护其他实施例。

9. 发明申请

US20050283770A1 Detecting memory address bounds violations 审中-公开
标题翻译：检测内存地址限制违规
公开(公告)号：US20050283770A1
公开(公告)日：2005-12-22
申请号：US10871971
申请日：2004-06-18
申请人： Alan Karp , Jean-Francois Collard
发明人： Alan Karp , Jean-Francois Collard
IPC分类号： G06F9/45
CPC分类号： G06F11/366 , G06F11/3624
摘要： In one aspect, machine-executable code is generated. The machine-executable code includes machine-readable instructions for detecting a memory address bounds violation by the program code based on a determination that a boundary memory address stored in a hardware table has been accessed during execution of the program code. The boundary memory address delimits a boundary for a set of memory addresses allocated for execution of the program code. The machine-executable code is stored in a machine-readable medium. In another aspect, a boundary memory address delimiting a boundary for a set of memory addresses allocated for execution of the program code is stored in a hardware table. The program code is executed. A memory address bounds violation by the program code is detected based on a determination that the boundary memory address stored in the hardware table has been accessed during execution of the program code.
摘要翻译：在一个方面，生成机器可执行代码。机器可执行代码包括用于基于在执行程序代码期间存储在硬件表中的边界存储器地址已经被访问的确定来检测存储器地址限制程序代码的机器可读指令。边界存储器地址限定分配用于执行程序代码的一组存储器地址的边界。机器可执行代码存储在机器可读介质中。另一方面，分配用于执行程序代码的一组存储器地址的边界的边界存储器地址被存储在硬件表中。执行程序代码。基于在执行程序代码期间存储在硬件表中的边界存储器地址已经被访问的确定来检测存储器地址限制程序代码的违规。

10. 发明申请

US20050216899A1 Resource-aware scheduling for compilers 失效
标题翻译：编译器的资源感知调度
公开(公告)号：US20050216899A1
公开(公告)日：2005-09-29
申请号：US10809716
申请日：2004-03-24
申请人： Kalyan Muthukumar , Daniel Lavery , Gerolf Hoflehner , Chu-Cheow Lim , Jean-Francois Collard
发明人： Kalyan Muthukumar , Daniel Lavery , Gerolf Hoflehner , Chu-Cheow Lim , Jean-Francois Collard
IPC分类号： G06F9/45
CPC分类号： G06F8/445
摘要： Disclosed are embodiments of a compiler, methods, and system for resource-aware scheduling of instructions. A list scheduling approach is augmented to take into account resource constraints when determining priority for scheduling of instructions. Other embodiments are also described and claimed.
摘要翻译：公开了用于指令的资源感知调度的编译器，方法和系统的实施例。增加列表调度方法以在确定指令调度的优先级时考虑到资源约束。还描述和要求保护其他实施例。

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