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1. 发明授权

US06348738B1 Flip chip assembly 失效
标题翻译：倒装芯片组装
公开(公告)号：US06348738B1
公开(公告)日：2002-02-19
申请号：US09371975
申请日：1999-08-11
申请人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
发明人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
IPC分类号： H01L2348
CPC分类号： H01L24/28 , H01L21/563 , H01L24/45 , H01L2224/16 , H01L2224/45124 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/83102 , H01L2224/92125 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , Y10S438/959 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/48
摘要： A method for forming a flip-chip-on-board assembly. An integrated circuit (IC) chip having a polyimide passivation layer is joined to a chip carrier via a plurality of solder bumps which electrically connect a plurality of contact pads on the IC chip to corresponding contacts on the chip carrier. A space is formed between a surface of the passivation layer and a surface of the chip carrier. A plasma is applied, to chemically modify the surface of the chip carrier and the passivation layer of the IC chip substantially without roughening the surface of the passivation layer. The plasma is either an O2 plasma or a microwave-generated Ar and N2O plasma. An underfill encapsulant material is applied to fill the space. The plasma treatment may be performed after the step of joining. Then, the chip and chip carrier are treated with the plasma simultaneously. Alternatively, the IC chip and chip carrier may be treated with the plasma before they are joined to one another. The plasma treatment improves adhesion between the encapsulant and the IC chip, and between the encapsulant and the chip carrier.
摘要翻译：一种用于形成板上倒装芯片组件的方法。具有聚酰亚胺钝化层的集成电路（IC）芯片通过将IC芯片上的多个接触焊盘电连接到芯片载体上的相应触点的多个焊料凸块而接合到芯片载体。在钝化层的表面和芯片载体的表面之间形成空间。施加等离子体以化学改性芯片载体的表面和IC芯片的钝化层，基本上不使钝化层的表面变粗糙。等离子体是O2等离子体或微波产生的Ar和N2O等离子体。应用底部填充密封材料填充空间。等离子体处理可以在接合步骤之后进行。然后，同时用等离子体处理芯片和芯片载体。或者，IC芯片和芯片载体可以在彼此接合之前用等离子体处理。等离子体处理改善了密封剂和IC芯片之间以及密封剂和芯片载体之间的粘合性。

2. 发明授权

US06306683B1 Method of forming a flip chip assembly, and a flip chip assembly formed by the method 失效
标题翻译：形成倒装芯片组件的方法，以及通过该方法形成的倒装芯片组件
公开(公告)号：US06306683B1
公开(公告)日：2001-10-23
申请号：US09526569
申请日：2000-03-16
申请人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
发明人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
IPC分类号： H01L2144
CPC分类号： H01L24/28 , H01L21/563 , H01L24/45 , H01L2224/16 , H01L2224/45124 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/83102 , H01L2224/92125 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , Y10S438/959 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/48
摘要： A method for forming a flip-chip-on-board assembly. An integrated circuit (IC) chip having a polyimide passivation layer is joined to a chip carrier via a plurality of solder bumps which electrically connect a plurality of contact pads on the IC chip to corresponding contacts on the chip carrier. A space is formed between a surface of the passivation layer and a surface of the chip carrier. A plasma is applied, to chemically modify the surface of the chip carrier and the passivation layer of the IC chip substantially without roughening the surface of the passivation layer. The plasma is either an O2 plasma or a microwave-generated Ar and N2O plasma. An underfill encapsulant material is applied to fill the space. The plasma treatment may be performed after the step of joining. Then, the chip and chip carrier are treated with the plasma simultaneously. Alternatively, the IC chip and chip carrier may be treat with the plasma before they are joined to one another. The plasma treatment improves adhesion between the encapsulant and the IC chip, and between the encapsulant and the chip carrier.
摘要翻译：一种用于形成板上倒装芯片组件的方法。具有聚酰亚胺钝化层的集成电路（IC）芯片通过将IC芯片上的多个接触焊盘电连接到芯片载体上的相应触点的多个焊料凸块而接合到芯片载体。在钝化层的表面和芯片载体的表面之间形成空间。施加等离子体以化学改性芯片载体的表面和IC芯片的钝化层，基本上不使钝化层的表面变粗糙。等离子体是O2等离子体或微波产生的Ar和N2O等离子体。应用底部填充密封材料填充空间。等离子体处理可以在接合步骤之后进行。然后，同时用等离子体处理芯片和芯片载体。或者，IC芯片和芯片载体可以在彼此接合之前用等离子体处理。等离子体处理改善了密封剂和IC芯片之间以及密封剂和芯片载体之间的粘合性。

3. 发明授权

US6074895A Method of forming a flip chip assembly 失效
标题翻译：形成倒装芯片组件的方法
公开(公告)号：US6074895A
公开(公告)日：2000-06-13
申请号：US936032
申请日：1997-09-23
申请人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
发明人： Jean Dery , Frank D. Egitto , Luis J. Matienzo , Charles Ouellet , Luc Ouellet , David L. Questad , William J. Rudik , Son K. Tran
IPC分类号： H01L21/56 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/28 , H01L21/563 , H01L2224/16 , H01L2224/45124 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/83102 , H01L2224/92125 , H01L24/45 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , Y10S438/959
摘要： A method for forming a flip-chip-on-board assembly. An integrated circuit (IC) chip having a polyimide passivation layer is joined to a chip carrier via a plurality of solder bumps which electrically connect a plurality of contact pads on the IC chip to corresponding contacts on the chip carrier. A space is formed between a surface of the passivation layer and a surface of the chip carrier. A plasma is applied, to chemically modify the a surface of the chip carrier and the passivation layer of the IC chip substantially without roughening the surface of the passivation layer. The plasma is either an O.sub.2 plasma or a microwave-generated Ar and N.sub.2 O plasma. An underfill encapsulant material is applied to fill the space. The plasma treatment may be performed after the step of joining. Then, the chip and chip carrier are treated with the plasma simultaneously. Alternatively, the IC chip and chip carrier may be treated with the plasma before they are joined to one another. The plasma treatment improves adhesion between the encapsulant and the IC chip, and between the encapsulant and the chip carrier.
摘要翻译：一种用于形成板上倒装芯片组件的方法。具有聚酰亚胺钝化层的集成电路（IC）芯片通过将IC芯片上的多个接触焊盘电连接到芯片载体上的相应触点的多个焊料凸块而接合到芯片载体。在钝化层的表面和芯片载体的表面之间形成空间。施加等离子体，以化学改性芯片载体的表面和IC芯片的钝化层，基本上不使钝化层的表面变粗糙。等离子体是O2等离子体或微波产生的Ar和N2O等离子体。应用底部填充密封材料填充空间。等离子体处理可以在接合步骤之后进行。然后，同时用等离子体处理芯片和芯片载体。或者，IC芯片和芯片载体可以在彼此接合之前用等离子体处理。等离子体处理改善了密封剂和IC芯片之间以及密封剂和芯片载体之间的粘合性。

4. 发明授权

US06607613B2 Solder ball with chemically and mechanically enhanced surface properties 失效
标题翻译：焊球具有化学和机械增强的表面性能
公开(公告)号：US06607613B2
公开(公告)日：2003-08-19
申请号：US09775747
申请日：2001-02-01
申请人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
发明人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
IPC分类号： C22C1106
CPC分类号： C23C8/00 , B23K1/206 , B23K35/0244 , B23K35/262 , B23K35/268 , B23K2101/40 , C23C26/00 , H05K3/3457 , H05K3/3489 , H05K2203/092 , H05K2203/095 , Y10T428/12 , Y10T428/12021 , Y10T428/12458 , Y10T428/12493 , Y10T428/12687
摘要： A metal alloy solder ball comprising a first metal and a second metal, the first metal having a sputtering yield greater than the second metal. The solder ball comprises a bulk portion having a bulk ratio of the first metal to the second metal, an outer surface, and a surface gradient having a depth and a gradient ratio of the first metal to the second metal that is less than the bulk ratio. The gradient ratio increases along the surface gradient depth from a minimum at the outer surface. The solder ball may be formed by the process of exposing the ball to energized ions of a sputtering gas for an effective amount of time to form the surface gradient.
摘要翻译：一种包含第一金属和第二金属的金属合金焊球，所述第一金属的溅射产率大于所述第二金属。焊球包括具有第一金属与第二金属的体积比的主体部分，外表面和具有小于体积比的第一金属与第二金属的深度和梯度比的表面梯度。梯度比沿着表面梯度深度从外表面的最小值增加。可以通过将球暴露于溅射气体的激发离子有效时间以形成表面梯度的过程来形成焊球。

5. 发明授权

US06210547B1 Enhanced solder surface and process for chemically and mechanically enhancing solder surface properties 失效
标题翻译：增强的焊料表面和用于化学和机械增强焊料表面性能的工艺
公开(公告)号：US06210547B1
公开(公告)日：2001-04-03
申请号：US09382221
申请日：1999-08-24
申请人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
发明人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
IPC分类号： C23C800
CPC分类号： C23C26/00 , B23K35/262 , B23K35/268 , C23C8/00 , H05K3/3457 , H05K2203/092 , H05K2203/095 , Y10S148/901 , Y10S148/903 , Y10T428/12687 , Y10T428/12701 , Y10T428/12708 , Y10T428/12861 , Y10T428/12896
摘要： A process for altering surface properties of a mass of metal alloy solder comprising a first metal and a second metal. The process comprises exposing the mass to energized ions to preferentially sputter atoms of the first metal to form a surface layer ratio of first metal to second metal atoms that is less than the bulk ratio. The solder may be located on the surface of a substrate, wherein the process may further comprise masking the substrate to shield all but a selected area from the ion beam. The sputtering gas may comprises a reactive gas such as oxygen and the substrate may be an organic substrate. The process may further comprise simultaneously exposing the organic substrate to energized ions of the reactive gas to roughen the organic substrate surface.
摘要翻译：一种用于改变包含第一金属和第二金属的金属合金焊料块的表面性质的方法。该方法包括将质量暴露于通电离子以优先溅射第一金属的原子，以形成小于体积比的第一金属与第二金属原子的表面层比。焊料可以位于衬底的表面上，其中该工艺可以进一步包括掩蔽衬底以屏蔽离开所述离子束的所有区域。溅射气体可以包括诸如氧的反应性气体，并且衬底可以是有机衬底。该方法可以进一步包括将有机底物同时暴露于活性气体的激发离子以粗糙化有机基底表面。

6. 发明授权

US6056831A Process for chemically and mechanically enhancing solder surface properties 失效
标题翻译：化学和机械增强焊料表面性能的工艺
公开(公告)号：US6056831A
公开(公告)日：2000-05-02
申请号：US113445
申请日：1998-07-10
申请人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
发明人： Frank D. Egitto , Edmond O. Fey , Luis J. Matienzo , David L. Questad , Rajinder S. Rai , Daniel C. Van Hart
IPC分类号： B23K35/14 , B23K35/26 , C23C8/00 , C23C26/00 , H05K3/34
CPC分类号： C23C26/00 , B23K35/262 , B23K35/268 , C23C8/00 , H05K3/3457 , H05K2203/092 , H05K2203/095 , Y10S148/901 , Y10S148/903 , Y10T428/12687 , Y10T428/12701 , Y10T428/12708 , Y10T428/12861 , Y10T428/12896
摘要： A process for altering surface properties of a mass of metal alloy solder comprising a first metal and a second metal. The process comprises exposing the mass to energized ions to preferentially sputter atoms of the first metal to form a surface layer ratio of first metal to second metal atoms that is less than the bulk ratio. The solder may be located on the surface of a substrate, wherein the process may further comprise masking the substrate to shield all but a selected area from the ion beam. The sputtering gas may comprises a reactive gas such as oxygen and the substrate may be an organic substrate. The process may further comprise simultaneously exposing the organic substrate to energized ions of the reactive gas to roughen the organic substrate surface.
摘要翻译：一种用于改变包括第一金属和第二金属的金属合金焊料块的表面性质的方法。该方法包括将质量暴露于通电离子以优先溅射第一金属的原子，以形成小于体积比的第一金属与第二金属原子的表面层比。焊料可以位于衬底的表面上，其中该工艺可以进一步包括掩蔽衬底以屏蔽离开所述离子束的所有区域。溅射气体可以包括诸如氧的反应性气体，并且衬底可以是有机衬底。该方法可以进一步包括将有机底物同时暴露于活性气体的激发离子以粗糙化有机基底表面。

7. 发明授权

US06719871B2 Method for bonding heat sinks to overmolds and device formed thereby 有权
公开(公告)号：US06719871B2
公开(公告)日：2004-04-13
申请号：US09757185
申请日：2001-01-09
申请人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
发明人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
IPC分类号： B32B3114
CPC分类号： B29C59/14 , H01L21/56 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.

8. 发明申请

US20110260299A1 METHOD FOR VIA PLATING IN ELECTRONIC PACKAGES CONTAINING FLUOROPOLYMER DIELECTRIC LAYERS 审中-公开
标题翻译：用于在含有荧光体介质层的电子封装中进行镀覆的方法
公开(公告)号：US20110260299A1
公开(公告)日：2011-10-27
申请号：US12765110
申请日：2010-04-22
申请人： Robert D. Edwards , Frank D. Egitto , Luis J. Matienzo , Susan Pitely , Daniel C. Van Hart
发明人： Robert D. Edwards , Frank D. Egitto , Luis J. Matienzo , Susan Pitely , Daniel C. Van Hart
IPC分类号： H01L23/50 , H05K3/00 , H01L21/441
CPC分类号： H05K3/0055 , H01L23/49827 , H01L23/49894 , H01L2924/0002 , H05K2201/015 , H05K2201/09509 , H05K2203/095 , H01L2924/00
摘要： A semiconductor printed circuit board assembly (PCBA) and method for making same for use in electronic packages having a core layer of copper-invar-copper (CIC) with a layer of dielectric substrate placed on the core layer. A second layer of dielectric substrate is placed on the lower surface of the core layer of CIC. The layers are laminated together. Blind vias are laser drilled into the layers of dielectric substrate. The partially completed PCBA is subjected to a reactive ion etch (RIE) plasma as a first step to clean blind vias in the PCBA. After the plasma etch, an acidic etchant liquid solution is used on the blind vias. Pre-plating cleaning of blind vias removes a majority of oxides from the blind vias. Seed copper layers are then applied to the PCBA, followed by a layer of copper plating that can be etched to meet the requirements of the PCBA.
摘要翻译：一种半导体印刷电路板组件（PCBA）及其制造方法，用于具有放置在芯层上的介电基片层的具有铜 - 铜 - 铜（CIC）芯层的电子封装。第二层电介质基片放置在CIC芯层的下表面上。层叠在一起。盲孔通过激光钻入电介质基片的层中。部分完成的PCBA经受反应离子蚀刻（RIE）等离子体作为清洁PCBA中的盲孔的第一步骤。在等离子体蚀刻之后，在盲孔上使用酸性蚀刻剂液体溶液。盲孔的电镀前清洁从盲孔中除去大部分氧化物。然后将种子铜层施加到PCBA，随后是可以被蚀刻以满足PCBA的要求的一层镀铜层。

9. 发明授权

US07307022B2 Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof 有权
标题翻译：用于电路化基板的导电层的处理方法以及制造具有所述导电层作为其一部分的所述基板的方法
公开(公告)号：US07307022B2
公开(公告)日：2007-12-11
申请号：US11327493
申请日：2006-01-09
申请人： Frank D. Egitto , Stephen Krasniak , John M. Lauffer , Voya R. Markovich , Luis J. Matienzo
发明人： Frank D. Egitto , Stephen Krasniak , John M. Lauffer , Voya R. Markovich , Luis J. Matienzo
IPC分类号： H01L21/44 , C25D5/02
CPC分类号： H05K3/384 , H05K1/056 , H05K3/386 , H05K2201/0355 , H05K2201/0358 , H05K2203/0353 , H05K2203/0723
摘要： A method of treating a conductive layer to assure enhanced adhesion of the layer to selected dielectric layers used to form a circuitized substrate. The conductive layer includes at least one surface with the appropriate roughness to enable such adhesion and also good signal passage if the layer is used as a signal layer. The method is extendible to the formation of such substrates, including to the formation of multilayered substrates having many conductive and dielectric layers. Such substrates may include one or more electrical components (e.g., semiconductor chips) mounted thereon and may also be mounted themselves onto other substrates.
摘要翻译：一种处理导电层以确保该层对用于形成电路化基底的所选电介质层的附着力的方法。导电层包括具有适当粗糙度的至少一个表面以实现这种粘附，并且如果该层用作信号层，则还具有良好的信号通过。该方法可扩展到形成这种衬底，包括形成具有许多导电和电介质层的多层衬底。这样的基板可以包括安装在其上的一个或多个电气部件（例如，半导体芯片），并且也可以将它们本身安装到其它基板上。

10. 发明授权

US06770968B2 Method for bonding heat sinks to overmolds and device formed thereby 有权
标题翻译：用于将散热器连接到包覆成型体的方法和由此形成的装置
公开(公告)号：US06770968B2
公开(公告)日：2004-08-03
申请号：US10369778
申请日：2003-02-19
申请人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
发明人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
IPC分类号： H01L2334
CPC分类号： B29C59/14 , H01L21/56 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.
摘要翻译：一种用于将散热器粘合到封装的电子部件的方法包括以下步骤：（a）将形成在基底上的模制聚合物的表面暴露于等离子体; （b）允许等离子体至少部分地将表面上的含硅残余物转化为二氧化硅; 和（c）通过在制品和表面之间施加贴附物将物品粘合到表面上。通常，含硅残渣是使用常规粘合方法和材料的硅油，脱模剂，可以防止形成粘结。形成在模塑聚合物表面上的二氧化硅层有助于形成适当的键。等离子体可以是氧等离子体，并且粘合剂可以选自具有金属氧化物填料的热固化的硅氧烷基糊状粘合剂或浸渍有粘合剂的热固化多孔聚合物膜。特别地，膜可以是聚四氟乙烯，粘合剂可以是聚丁二烯，并且该膜可以进一步用金属氧化物传热介质如氧化锌浸渍。替代方法包括在不进行等离子体处理的情况下应用多孔聚合物膜并热固化膜以形成适当的键。

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