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1. 发明授权

US06909336B1 Discrete-time amplitude control of voltage-controlled oscillator 有权
标题翻译：压控振荡器的离散时间幅度控制
公开(公告)号：US06909336B1
公开(公告)日：2005-06-21
申请号：US10654318
申请日：2003-09-03
申请人： Jayendar Rajagopalan , Rob Butler
发明人： Jayendar Rajagopalan , Rob Butler
IPC分类号： H03B5/12 , H03L5/00 , H03L7/099 , H03B5/00 , H03B5/04
CPC分类号： H03L7/099 , H03B5/1215 , H03B5/1231 , H03B5/1234 , H03B5/1243 , H03B2200/0062 , H03B2200/0066 , H03L5/00
摘要： Periodically, sensed amplitude for the output signal of a voltage-controlled oscillator is compared to a reference and biasing of the voltage-controlled oscillator is correspondingly set, thereby controlling amplitude of the voltage-controlled oscillator output signal. Process and temperature dependencies of the amplitude are eliminated while achieving low phase noise and large signal-to-noise ratio in the output signal, and consequently low phase noise.
摘要翻译：将压控振荡器的输出信号的感测振幅周期性地与基准相比较，相应地设定压控振荡器的偏置，从而控制压控振荡器输出信号的幅度。消除幅度的过程和温度依赖性，同时实现输出信号中的低相位噪声和较大的信噪比，从而降低相位噪声。

2. 发明授权

US07504888B1 Internally compensated differential amplifier 有权
标题翻译：内部补偿差分放大器
公开(公告)号：US07504888B1
公开(公告)日：2009-03-17
申请号：US11862006
申请日：2007-09-26
申请人： Shu-Ing Ju , Jayendar Rajagopalan , Jeffry Mark Huard
发明人： Shu-Ing Ju , Jayendar Rajagopalan , Jeffry Mark Huard
IPC分类号： H03F3/04
CPC分类号： H03F1/14
摘要： The invention relates to a differential amplifier with internal compensation. The invention also relates to a regulator controller and a regulator which includes such an amplifier. The amplifier includes a preamplifier circuit and a gain circuit. The frequency response of the amplifier is based in part on internal compensation within the preamplifier circuit. The internal compensation of the differential amplifier includes a low frequency zero that is provided by the preamplifier circuit.
摘要翻译：本发明涉及具有内部补偿的差分放大器。本发明还涉及一种包括这种放大器的调节器控制器和调节器。放大器包括前置放大器电路和增益电路。放大器的频率响应部分基于前置放大器电路内部的补偿。差分放大器的内部补偿包括由前置放大器电路提供的低频零点。

3. 发明授权

US07495423B1 Apparatus and method for loop adjustment for a DC/DC switching regulator 有权
标题翻译：用于DC / DC开关调节器的环路调整的装置和方法
公开(公告)号：US07495423B1
公开(公告)日：2009-02-24
申请号：US11397424
申请日：2006-04-03
申请人： Jonathan Knight , Jayendar Rajagopalan
发明人： Jonathan Knight , Jayendar Rajagopalan
IPC分类号： G05F1/618 , G05F1/62
CPC分类号： H02M3/1588 , H02M3/1582 , H02M2001/0025 , Y02B70/1466
摘要： A current-mode switching regulator is provided. In one embodiment, the regulator is a multi-mode buck-boost regulator that operates as follows. When the operating mode changes, a gain associated with the inner current loop changes, and the loop compensation changes. The inner current loop gain and the loop compensation are adjusted when the operating mode changes such that the post-mode change feedback variable values are roughly the same as the pre-mode change feedback variables values.
摘要翻译：提供电流模式开关调节器。在一个实施例中，调节器是如下操作的多模式降压 - 升压调节器。当操作模式改变时，与内部电流环路相关联的增益改变，并且循环补偿变化。当操作模式改变时，内部电流环路增益和环路补偿被调整，使得后模式改变反馈变量值与预模式改变反馈变量值大致相同。

4. 发明授权

US08106639B1 Feed forward control of switching regulator 有权
标题翻译：开关调节器的前馈控制
公开(公告)号：US08106639B1
公开(公告)日：2012-01-31
申请号：US12136010
申请日：2008-06-09
申请人： Shu-Ing Ju , Jayendar Rajagopalan , Rajarshi Paul , Jeffry Mark Huard
发明人： Shu-Ing Ju , Jayendar Rajagopalan , Rajarshi Paul , Jeffry Mark Huard
IPC分类号： G05F1/40
CPC分类号： H02M3/1582 , H02M2001/0022
摘要： The invention relates to a switching regulator with an error amplifier circuit and a feed-forward circuit. The error amplifier circuit provides an error signal by amplifying the difference between a feedback signal and a reference signal. The feed-forward circuit level-shifts the output of the error amplifier based on the feed-forward input signal and a scaling factor. The resulting adjusted error signal includes both feed-back and feed-forward signal components. A PWM comparator is employed to compare the adjusted error signal to a ramp signal. Switched-mode regulation is performed based on the PWM comparator output. In addition, buck-boost mode transition smoothing circuitry may also be employed to smooth the buck-mode/boost-mode transition in a buck-boost switching regulator.
摘要翻译：本发明涉及具有误差放大器电路和前馈电路的开关调节器。误差放大器电路通过放大反馈信号和参考信号之间的差异来提供误差信号。前馈电路基于前馈输入信号和缩放因子对误差放大器的输出进行电平移位。所得到的调整误差信号包括反馈和前馈信号分量。采用PWM比较器将调整后的误差信号与斜坡信号进行比较。基于PWM比较器输出执行开关调节。此外，还可以采用降压 - 升压模式转换平滑电路来平滑降压 - 升压开关调节器中的降压模式/升压模式转换。

5. 发明授权

US07391190B1 Apparatus and method for three-phase buck-boost regulation 有权
标题翻译：三相降压 - 升压调节装置及方法
公开(公告)号：US07391190B1
公开(公告)日：2008-06-24
申请号：US11397588
申请日：2006-04-03
申请人： Jayendar Rajagopalan
发明人： Jayendar Rajagopalan
IPC分类号： G05F1/59
CPC分类号： H02M3/1582
摘要： A buck-boost converter is provided. In buck-boost mode, the converter operates in at least three phases. In one phase, the inductor current ramps upward. In another phase, the inductor current ramps downward. In yet another phase, the inductor current remains at roughly the same non-zero value. Only one pulse-width modulating signal is used in the buck-boost operation. A PWM comparator compares the pulse-width modulating signal with the error signal and trips when the error signal exceeds the pulse-width modulating signal. One of the three phases occurs at the beginning of the clock pulse before the PWM comparator trips. Another of the phases occurs while the PWM comparator is tripped. Yet another of the phases occurs from the time that the PWM goes from tripped to untripped until the beginning of the next clock cycle.
摘要翻译：提供降压 - 升压转换器。在降压 - 升压模式下，转换器至少运行三相。在一相中，电感电流向上斜坡。在另一个阶段，电感电流向下倾斜。在另一个阶段，电感电流保持大致相同的非零值。降压 - 升压操作中仅使用一个脉冲宽度调制信号。 PWM比较器将脉宽调制信号与误差信号进行比较，当误差信号超过脉宽调制信号时，PWM比较器跳变。在PWM比较器跳闸之前，三相中的一个发生在时钟脉冲的开始处。当PWM比较器跳闸时，发生另一个相位。从PWM跳变到未分配到下一个时钟周期开始的时候，发生了另一个阶段。

6. 发明授权

US06339349B1 Method and circuit for comparator-less generation of ramped voltage having controlled maximum amplitude 有权
标题翻译：无比较器生成具有受控最大幅度的斜坡电压的方法和电路
公开(公告)号：US06339349B1
公开(公告)日：2002-01-15
申请号：US09496572
申请日：2000-02-02
申请人： Jayendar Rajagopalan
发明人： Jayendar Rajagopalan
IPC分类号： H03K406
CPC分类号： H03K3/0315 , H03K3/354 , H03K4/502
摘要： A circuit for generating a ramped voltage having controlled maximum amplitude (e.g., for use in a switching controller), and a method for generating such a ramped voltage without use of a comparator. The ramped voltage is a voltage developed across a periodically charged and discharged capacitor, or optionally a level-shifted version of such voltage. Preferably, a ring oscillator generates a clock signal (without use of a comparator) for use in controlling the periodic charging and discharging of the capacitor, and a feedback loop generates a supplemental charging current for the capacitor in response to feedback indicative of the ramped output voltage. Preferably, the ring oscillator is a current-starved ring oscillator biased by a zero temperature coefficient bias current source, and the feedback loop includes a sample-adjust-hold circuit which samples the ramped output voltage shortly before the capacitor discharges, generates an adjustment voltage indicative of the difference between a reference voltage and the sampled output voltage, and holds the adjustment voltage for use in the next charging cycle. Preferably, a current mirror generates the supplemental charging current in response to the adjustment voltage held by the sample-adjust-hold circuit. The ramped voltage generation circuit can be implemented in less area (for the same ramped voltage frequency) than required for a conventional circuit employing at least one comparator, with the ramped voltage peak and valley levels being invariant to process and temperature variations, and with reduced supply voltage.
摘要翻译：用于产生具有受控最大幅度的斜坡电压（例如，用于开关控制器）的电路，以及用于在不使用比较器的情况下产生这种斜坡电压的方法。斜坡电压是在周期性充电和放电的电容器上形成的电压，或者可选地是这种电压的电平移位版本。优选地，环形振荡器产生用于控制电容器的周期性充电和放电的时钟信号（不使用比较器），并且响应于指示斜坡输出的反馈，反馈环路产生用于电容器的补充充电电流电压。优选地，环形振荡器是由零温度系数偏置电流源偏置的电流饥饿环形振荡器，并且反馈环路包括采样调整保持电路，其在电容器放电之前不久对斜坡输出电压进行采样，产生调整电压指示参考电压和采样输出电压之间的差异，并保持用于下一个充电周期的调节电压。优选地，电流镜响应于由采样调节保持电路保持的调整电压而产生补充充电电流。斜坡电压产生电路可以在采用至少一个比较器的常规电路所需的较小面积（相同的斜坡电压频率）中实现，其中斜坡电压峰值和谷值水平对于处理和温度变化是不变的，并且随着减少电源电压。

7. 发明授权

US6137274A Switching DC-to-DC converter and conversion method with current sharing between paralleled channels 有权
公开(公告)号：US6137274A
公开(公告)日：2000-10-24
申请号：US496570
申请日：2000-02-02
申请人： Jayendar Rajagopalan
发明人： Jayendar Rajagopalan
IPC分类号： H02J1/10 , H02M3/158
CPC分类号： H02J1/102 , H02J2001/106
摘要： A DC-to-DC converter having multiple power delivery channels, and including a current-sharing switching controller implemented as an integrated circuit, multi-channel circuitry (including parallel channels connected to one output node) external to the controller chip, and current sharing circuitry (including circuitry external to the controller chip and circuitry including current mirrors internal to the controller chip), and methods for generating PWM power switch control signals for use in (and performing DC-to-DC conversion using) such a DC-to-DC converter. Preferably, the current sharing circuitry generates individual channel current signals from voltage analogs thereof produced external to the controller chip, and superposes the individual channel current signals to produce an average current signal. Channel current error signals are generated by subtracting the individual channel current signals from the average current signal. The power switch control signal for each channel is generated in response to the channel current error signal for the appropriate channel and a feedback signal (an output voltage error signal) indicative of the output potential of the DC-to-DC converter relative to a reference potential, so that the DC-to-DC converter achieves a desired output potential with increased current sharing among the channels. The invention implements current sharing between channels of a DC-to-DC converter using simple circuitry external to the controller chip (and without an external bus which connects one channel to the other), and with simple, silicon-area efficient circuitry internal to the controller chip. Preferably, current mirror circuitry in the controller chip generates a set of identical average current signals, each of which is proportional to the average of the currents drawn from the individual channels, and additional current mirror circuitry generates a set of identical error current signals, each of which is an error current proportional to the difference between the DC-to-DC converter's output potential and a reference potential.

8. 发明授权

US6111440A Circuit for generating interleaved ramped voltage signals having uniform, controlled maximum amplitude 有权
标题翻译：用于产生具有均匀的受控最大振幅的交错斜坡电压信号的电路
公开(公告)号：US6111440A
公开(公告)日：2000-08-29
申请号：US231046
申请日：1999-01-14
申请人： Jayendar Rajagopalan , Christopher Falvey , Douglas Robert Farrenkopf
发明人： Jayendar Rajagopalan , Christopher Falvey , Douglas Robert Farrenkopf
IPC分类号： H03K4/50 , H03K4/06
CPC分类号： H03K4/50
摘要： A circuit having multiple channels for generating multiple ramped voltage signals (preferably of a type useful in an interleaved PWM dc/dc converter) such that each ramped voltage signal has a different phase, and all the ramped voltage signals have a uniform controlled maximum amplitude. The circuit can be implemented as an integrated circuit (or portion of an integrated circuit) which generates the multiple ramped voltage signals with uniform maximum amplitude in a manner independent of process and temperature variations in implementing and operating such integrated circuit. In preferred embodiments, the circuit includes a single amplifier having an input coupled to receive a reference signal (indicative of a preselected maximum ramped voltage amplitude) and an output which is coupled (in time-division-multiplexed fashion) to each of the ramped voltage generation channels, thus implementing time-division-multiplexed negative feedback loops which control the maximum amplitude of the ramped voltage signal generated by each channel. The input offset voltage error of the amplifier is applied across all channels equally. Preferably, the ramped voltage signal generating circuit also includes circuitry for generating clock signals for controlling generation of the ramped voltage signals. Another aspect of the invention is a method for generating multiple ramped voltage signals (preferably those of a type useful in an interleaved PWM dc/dc converter) such that each ramped signal has a different phase and a uniform, controlled maximum amplitude.
摘要翻译：具有多个通道的电路，用于产生多个斜坡电压信号（优选地是在交错式PWM dc / dc转换器中有用的类型），使得每个斜坡电压信号具有不同的相位，并且所有斜坡电压信号具有均匀的受控最大振幅。电路可以实现为集成电路（或集成电路的一部分），其以独立于实现和操作这种集成电路中的过程和温度变化的方式产生具有均匀最大振幅的多个斜坡电压信号。在优选实施例中，电路包括具有耦合以接收参考信号（指示预先选择的最大斜坡电压幅度）的输入的单个放大器和以每个斜坡电压（以时分复用的方式）耦合的输出从而实现时分复用的负反馈回路，其控制由每个通道产生的斜坡电压信号的最大幅度。放大器的输入失调电压误差平均应用于所有通道。优选地，斜坡电压信号发生电路还包括用于产生用于控制斜坡电压信号的产生的时钟信号的电路。本发明的另一方面是一种用于产生多个斜坡电压信号（优选地是在交错PWM dc / dc转换器中有用的类型的电压信号）的方法，使得每个斜坡信号具有不同的相位和均匀的受控最大振幅。

9. 发明授权

US5920471A Method and apparatus for automatic average current mode controlled power factor correction without input voltage sensing 失效
标题翻译：自动平均电流模式控制功率因数校正无输入电压检测的方法和装置
公开(公告)号：US5920471A
公开(公告)日：1999-07-06
申请号：US921062
申请日：1997-08-29
申请人： Jayendar Rajagopalan , Paolo Nora , Fred C. Lee
发明人： Jayendar Rajagopalan , Paolo Nora , Fred C. Lee
IPC分类号： H02M1/00 , H02M1/42 , H02M1/12 , G05F1/40 , H02M5/42
CPC分类号： H02M1/4225 , Y02B70/126 , Y02P80/112
摘要： A method for preparing power factor control integrated circuits which generate linear pulse width modulation (PWM) waveforms is presented. The method of pulse width modulation waveform generation involves providing a capacitor; fast charging the capacitor; and controlling a discharge rate of the capacitor to ensure a constant switching period and a linear PWM waveform. The method is applicable for any single-phase ac/dc converter topology that performs power factor correction. Unlike conventional techniques which utilize three feedback loops, the method of the present invention reduces the total number of feedback loops to two, eliminates input voltage sensing and achieves the same objective. This method results in significant integrated circuit simplification, such as elimination of multiplier, squarer and divider circuits in the control integrated circuit and reduces the cost of the integrated circuit.
摘要翻译：提出了一种制造产生线性脉宽调制（PWM）波形的功率因数控制集成电路的方法。脉宽调制波形生成方法涉及提供电容器; 快速充电电容器; 并且控制电容器的放电速率以确保恒定的开关周期和线性PWM波形。该方法适用于执行功率因数校正的任何单相交流/直流转换器拓扑。与使用三个反馈回路的常规技术不同，本发明的方法将反馈回路的总数减少到两个，消除输入电压感测并实现相同的目的。这种方法产生了显着的集成电路简化，例如消除了控制集成电路中的乘法器，平方和分频器电路，并降低了集成电路的成本。

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