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1. 发明申请

US20080171437A1 Methods of Forming Titanium-Containing Materials 失效
标题翻译：形成含钛材料的方法
公开(公告)号：US20080171437A1
公开(公告)日：2008-07-17
申请号：US12044253
申请日：2008-03-07
申请人： Jaydeb Goswami , Joel A. Drewes
发明人： Jaydeb Goswami , Joel A. Drewes
IPC分类号： H01L21/44
CPC分类号： H01L21/28562 , H01L21/28518 , H01L21/76855
摘要： The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance, the invention can utilize alternating cycles of titanium tetrachloride and activated hydrogen to form titanium silicide on a surface of a silicon-containing substrate.
摘要翻译：本发明包括形成含钛材料的方法，例如硅化钛。本发明可以使用卤化钛前体和一种或多种还原剂的交替循环来形成含钛材料。例如，本发明可以利用四氯化钛和活性氢的交替循环在含硅基材的表面上形成硅化钛。

2. 发明授权

US07622388B2 Methods of forming titanium-containing materials 失效
标题翻译：形成含钛材料的方法
公开(公告)号：US07622388B2
公开(公告)日：2009-11-24
申请号：US12044253
申请日：2008-03-07
申请人： Jaydeb Goswami , Joel A. Drewes
发明人： Jaydeb Goswami , Joel A. Drewes
IPC分类号： H01L21/44
CPC分类号： H01L21/28562 , H01L21/28518 , H01L21/76855
摘要： The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance, the invention can utilize alternating cycles of titanium tetrachloride and activated hydrogen to form titanium silicide on a surface of a silicon-containing substrate.
摘要翻译：本发明包括形成含钛材料的方法，例如硅化钛。本发明可以使用卤化钛前体和一种或多种还原剂的交替循环来形成含钛材料。例如，本发明可以利用四氯化钛和活性氢的交替循环在含硅基材的表面上形成硅化钛。

3. 发明授权

US07361596B2 Semiconductor processing methods 有权
标题翻译：半导体加工方法
公开(公告)号：US07361596B2
公开(公告)日：2008-04-22
申请号：US11168856
申请日：2005-06-28
申请人： Jaydeb Goswami , Joel A. Drewes
发明人： Jaydeb Goswami , Joel A. Drewes
IPC分类号： H01L21/44
CPC分类号： H01L21/28562 , H01L21/28518 , H01L21/76855
摘要： The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance, the invention can utilize alternating cycles of titanium tetrachloride and activated hydrogen to form titanium silicide on a surface of a silicon-containing substrate.
摘要翻译：本发明包括形成含钛材料的方法，例如硅化钛。本发明可以使用卤化钛前体和一种或多种还原剂的交替循环来形成含钛材料。例如，本发明可以利用四氯化钛和活性氢的交替循环在含硅基材的表面上形成硅化钛。

4. 发明申请

US20110216585A1 METAL CONTAINING MATERIALS 审中-公开
标题翻译：含金属材料
公开(公告)号：US20110216585A1
公开(公告)日：2011-09-08
申请号：US12717535
申请日：2010-03-04
申请人： Jaydeb Goswami
发明人： Jaydeb Goswami
IPC分类号： G11C16/04 , C01B21/06 , C01B21/076 , H01L21/336 , H01L29/788
CPC分类号： C01B21/06 , C01B21/076 , G11C16/04 , H01L29/788
摘要： Metal containing materials and methods of forming the same are disclosed. One such method includes substantially concurrently feeding a flow of precursor gas containing a metal of a metal containing material and a flow of source gas containing a reducing agent so that the precursor gas and the source gas react to form a thickness of the metal containing material. The flow of precursor gas is discontinued, and while the flow of precursor gas is discontinued, the flow of source gas continues to be fed to contact the thickness of the metal containing material.
摘要翻译：公开了含金属材料及其形成方法。一种这样的方法包括基本上同时地供给含有含金属材料的金属和含有还原剂的源气体流的前体气体流，使得前体气体和源气体反应以形成含金属材料的厚度。前体气体的流动停止，并且当前体气体的流动停止时，源气体的流动继续被供给以接触含金属材料的厚度。

5. 发明授权

US08530305B2 Nanodot charge storage structures and methods 有权
标题翻译： Nanodot电荷存储结构和方法
公开(公告)号：US08530305B2
公开(公告)日：2013-09-10
申请号：US12762712
申请日：2010-04-19
申请人： Jaydeb Goswami
发明人： Jaydeb Goswami
IPC分类号： H01L21/02
CPC分类号： H01L27/1104 , B82Y10/00 , H01L21/28273 , H01L29/42332
摘要： Methods, devices, and systems associated with charge storage structures in semiconductor devices are described herein. In one or more embodiments, a method of forming nanodots includes forming at least a portion of a charge storage structure over a material by reacting a single-source precursor and a reactant, where the single-source precursor includes a metal and a semiconductor.
摘要翻译：本文描述了与半导体器件中的电荷存储结构相关联的方法，器件和系统。在一个或多个实施方案中，形成纳米点的方法包括通过使单源前体和反应物反应而在材料上形成电荷存储结构的至少一部分，其中单源前体包括金属和半导体。

6. 发明授权

US08207582B2 Semiconductor devices including dual gate structures 有权
标题翻译：包括双栅极结构的半导体器件
公开(公告)号：US08207582B2
公开(公告)日：2012-06-26
申请号：US12348737
申请日：2009-01-05
申请人： Jaydeb Goswami
发明人： Jaydeb Goswami
IPC分类号： H01L29/66
CPC分类号： H01L29/7831 , H01L21/32134 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78
摘要： Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric structure formed from an oxide of the first material. For another example, methods including forming a high-K dielectric material layer over a semiconductor substrate, forming a first conductive material layer over the high-K dielectric material layer, oxidizing a portion of the first conductive material layer to convert the portion of the first conductive material layer to a dielectric material layer, and forming a second conductive material layer over both the conductive material layer and the dielectric material layer are also disclosed.
摘要翻译：公开了包括双栅极结构的半导体器件和形成这种半导体器件的方法。例如，公开了包括可以包括由第一材料形成的第一导电栅极结构的第一栅极堆叠和可以包括由第一材料的氧化物形成的电介质结构的第二栅极堆叠的半导体器件。另一个实例是包括在半导体衬底上形成高K电介质材料层的方法，在高K电介质材料层上形成第一导电材料层，氧化第一导电材料层的一部分以转换第一导电材料层到介电材料层，并且在导电材料层和介电材料层两者之上形成第二导电材料层。

7. 发明授权

US07863176B2 Low-resistance interconnects and methods of making same 有权
标题翻译：低电阻互连及其制作方法
公开(公告)号：US07863176B2
公开(公告)日：2011-01-04
申请号：US12119994
申请日：2008-05-13
申请人： Jaydeb Goswami , Allen McTeer
发明人： Jaydeb Goswami , Allen McTeer
IPC分类号： H01L23/52
CPC分类号： H01L23/5226 , H01L21/76807 , H01L21/7681 , H01L21/76843 , H01L21/76876 , H01L21/76877 , H01L23/528 , H01L23/53266 , H01L23/53271 , H01L23/53295 , H01L23/535 , H01L2924/0002 , H01L2924/00
摘要： Devices and methods for providing low-resistance interconnects in a semiconductor device are provided. Specifically, one or more embodiments of the present invention relate to disposing a conductive material in a trench without disposing a resistive barrier material between the conductive material and the sidewalls of the trench so that the conductive material takes up the full width of the trench. For example, the trench may be disposed over one or more contacts made of a barrier material such as titanium nitride that also acts as a seed, and the conductive material may be grown on top of the titanium nitride to fill the trench.
摘要翻译：提供了用于在半导体器件中提供低电阻互连的装置和方法。具体地，本发明的一个或多个实施例涉及将导电材料设置在沟槽中而不在导电材料和沟槽的侧壁之间设置电阻阻挡材料，使得导电材料占据沟槽的整个宽度。例如，沟槽可以设置在由阻挡材料制成的一个或多个触点上，例如氮化钛也可以作为种子，并且导电材料可以在氮化钛的顶部生长以填充沟槽。

8. 发明申请

US20100171178A1 SEMICONDUCTOR DEVICES INCLUDING DUAL GATE STRUCTURES AND METHODS OF FORMING SUCH SEMICONDUCTOR DEVICES 有权
标题翻译：包括双门结构的半导体器件和形成这种半导体器件的方法
公开(公告)号：US20100171178A1
公开(公告)日：2010-07-08
申请号：US12348737
申请日：2009-01-05
申请人： Jaydeb Goswami
发明人： Jaydeb Goswami
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7831 , H01L21/32134 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78
摘要： Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric structure formed from an oxide of the first material. For another example, methods including forming a high-K dielectric material layer over a semiconductor substrate, forming a first conductive material layer over the high-K dielectric material layer, oxidizing a portion of the first conductive material layer to convert the portion of the first conductive material layer to a dielectric material layer, and forming a second conductive material layer over both the conductive material layer and the dielectric material layer are also disclosed.
摘要翻译：公开了包括双栅极结构的半导体器件和形成这种半导体器件的方法。例如，公开了包括可以包括由第一材料形成的第一导电栅极结构的第一栅极堆叠和可以包括由第一材料的氧化物形成的电介质结构的第二栅极堆叠的半导体器件。另一个实例是包括在半导体衬底上形成高K电介质材料层的方法，在高K电介质材料层上形成第一导电材料层，氧化第一导电材料层的一部分以转换第一导电材料层到介电材料层，并且在导电材料层和介电材料层两者之上形成第二导电材料层。

9. 发明申请

US20080273410A1 Tungsten digitlines 审中-公开
标题翻译：钨数字线
公开(公告)号：US20080273410A1
公开(公告)日：2008-11-06
申请号：US11800199
申请日：2007-05-04
申请人： Jaydeb Goswami
发明人： Jaydeb Goswami
IPC分类号： G11C7/00 , H01L21/4763 , H01L27/108
CPC分类号： H01L21/76876 , C23C16/0272 , C23C16/14 , H01L21/28556 , H01L27/10885
摘要： Methods, devices, and systems for using and forming tungsten digitlines have been described. The tungsten digitlines formed according to embodiments of the present disclosure can be formed with a tungsten (W) monolayer on a tungsten nitride (WNx) substrate, a boron (B) monolayer on the W monolayer, and a bulk W layer on the B monolayer.
摘要翻译：已经描述了用于使用和形成钨数字线的方法，装置和系统。根据本公开的实施例形成的钨数字线可以在钨氮化物（WN×x）衬底上形成钨（W）单层，在W单层上形成硼（B）单层，以及 B单层上的散装W层。

10. 发明授权

US08592985B2 Methods of forming conductive structures and methods of forming DRAM cells 有权
标题翻译：形成导电结构的方法和形成DRAM单元的方法
公开(公告)号：US08592985B2
公开(公告)日：2013-11-26
申请号：US13443141
申请日：2012-04-10
申请人： Jaydeb Goswami , Hung Ming Tsai , Duane M. Goodner
发明人： Jaydeb Goswami , Hung Ming Tsai , Duane M. Goodner
IPC分类号： H01L23/48
CPC分类号： H01L23/53252 , C23C16/045 , H01L21/743 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/528 , H01L23/53257 , H01L23/53266 , H01L27/10876 , H01L27/10891 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include methods of forming conductive structures. An electrically conductive material may be deposited with a first deposition method. The first deposition method has a first deposition rate and forms a first portion of a conductive structure. A second portion of the conductive structure may be formed by depositing the electrically conductive material with a second deposition method having a second deposition rate. The second deposition rate may be different from the first deposition rate by at least about a factor of 3. In some embodiments, a region of the conductive structure is utilized as a transistor gate of a DRAM cell. Some embodiments include semiconductor constructions.
摘要翻译：一些实施例包括形成导电结构的方法。可以用第一沉积方法沉积导电材料。第一沉积方法具有第一沉积速率并形成导电结构的第一部分。导电结构的第二部分可以通过用具有第二沉积速率的第二沉积方法沉积导电材料来形成。第二沉积速率可以不同于第一沉积速率至少约3倍。在一些实施例中，导电结构的区域用作DRAM单元的晶体管栅极。一些实施例包括半导体结构。

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