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1. 发明授权

US08861410B2 Method and apparatus for scalable network transaction identifier for interconnects 有权
标题翻译：用于互连的可伸缩网络事务标识符的方法和装置
公开(公告)号：US08861410B2
公开(公告)日：2014-10-14
申请号：US13285215
申请日：2011-10-31
申请人： Jaya Prakash Subramaniam Ganasan , Prudhvi N. Nooney , Darren P. Umstead , Joseph L. Van Swearingen , Barry Joe Wolford , Mark Michael Schaffer
发明人： Jaya Prakash Subramaniam Ganasan , Prudhvi N. Nooney , Darren P. Umstead , Joseph L. Van Swearingen , Barry Joe Wolford , Mark Michael Schaffer
IPC分类号： H04B7/00
CPC分类号： H04L45/74
摘要： A transaction request passes from an initiator through interconnect paths and a routing ID indicating the interconnect paths is prepended. A temporary ID is assigned to the routing ID, the transaction request with the temporary ID is sent to a target device, and a response having the temporary ID is received. The routing ID is retrieved using the target ID, and the response with the retrieved routing ID is sent to the initiator.
摘要翻译：交易请求从发起者通过互连路径传递，并且指示互连路径的路由ID被添加。临时ID被分配给路由ID，具有临时ID的事务请求被发送到目标设备，并且接收到具有临时ID的响应。使用目标ID检索路由ID，并将具有检索到的路由ID的响应发送到启动器。

2. 发明申请

US20130107880A1 Method and Apparatus for Scalable Network Transaction Identifier for Interconnects 有权
标题翻译：用于互连的可扩展网络事务标识符的方法和装置
公开(公告)号：US20130107880A1
公开(公告)日：2013-05-02
申请号：US13285215
申请日：2011-10-31
申请人： Jaya Prakash Subramaniam Ganasan , Prudhvi N. Nooney , Darren P. Umstead , Joseph L. Van Swearingen , Barry Joe Wolford , Mark Michael Schaffer
发明人： Jaya Prakash Subramaniam Ganasan , Prudhvi N. Nooney , Darren P. Umstead , Joseph L. Van Swearingen , Barry Joe Wolford , Mark Michael Schaffer
IPC分类号： H04L12/56
CPC分类号： H04L45/74
摘要： A transaction request passes from an initiator through interconnect paths and a routing ID indicating the interconnect paths is prepended. A temporary ID is assigned to the routing ID, the transaction request with the temporary ID is sent to a target device, and a response having the temporary ID is received. The routing ID is retrieved using the target ID, and the response with the retrieved routing ID is sent to the initiator.
摘要翻译：交易请求从发起者通过互连路径传递，并且指示互连路径的路由ID被添加。临时ID被分配给路由ID，具有临时ID的事务请求被发送到目标设备，并且接收到具有临时ID的响应。使用目标ID检索路由ID，并将具有检索到的路由ID的响应发送到启动器。

3. 发明申请

US20130117593A1 Low Latency Clock Gating Scheme for Power Reduction in Bus Interconnects 审中-公开
标题翻译：总线互连功率降低的低延迟时钟门控方案
公开(公告)号：US20130117593A1
公开(公告)日：2013-05-09
申请号：US13290250
申请日：2011-11-07
申请人： Prudhvi N. Nooney , Jaya Prakash Subramaniam Ganasan , Joseph L. Van Swearingen , Richard Gerard Hofmann
发明人： Prudhvi N. Nooney , Jaya Prakash Subramaniam Ganasan , Joseph L. Van Swearingen , Richard Gerard Hofmann
IPC分类号： G06F1/32
CPC分类号： G06F1/3237 , G06F1/3253 , Y02D10/128 , Y02D10/151 , Y02D50/20
摘要： A System-on-a-Chip (SoC) comprising a controller, an activity counter, a reference pattern detection logic, a master pattern detection logic, an arbiter, a comparator, a tracker circuit, a delay cell circuit, and a request mask circuit coupled to a bus. The bus is configured to support master control. The controller is configured to cause components to enter a low power state. The activity counter is configured to monitor activity. The detection logics are configured to operate on an activity based clock or always on clock. The arbiter is configured to select an initiator. The comparator is configured to compare the output of the detection logics. The tracker circuit is configured to track selection of components. The delay cell circuit is configured to store output of components. The request mask circuit is configured to prevent request to arbiter or any arbiter selected request made from a previous clock cycle.
摘要翻译：一种片上系统（SoC），包括控制器，活动计数器，参考模式检测逻辑，主模式检测逻辑，仲裁器，比较器，跟踪器电路，延迟单元电路和请求掩码电路耦合到总线。总线配置为支持主控制。控制器被配置为使组件进入低功率状态。活动计数器配置为监视活动。检测逻辑被配置为在基于活动的时钟上操作或者始终处于时钟上。仲裁器被配置为选择启动器。比较器配置为比较检测逻辑的输出。跟踪器电路被配置为跟踪组件的选择。延迟单元电路被配置为存储组件的输出。请求屏蔽电路被配置为防止对仲裁器的请求或从先前时钟周期进行的任何仲裁器选择的请求。

4. 发明授权

US06973520B2 System and method for providing improved bus utilization via target directed completion 失效
标题翻译：通过目标定向完成提供改进的总线利用率的系统和方法
公开(公告)号：US06973520B2
公开(公告)日：2005-12-06
申请号：US10195172
申请日：2002-07-11
申请人： Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Richard Nicholas Iachetta, Jr. , Barry Joe Wolford
发明人： Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Richard Nicholas Iachetta, Jr. , Barry Joe Wolford
IPC分类号： G06F13/00 , G06F13/14 , G06F13/364
CPC分类号： G06F13/364
摘要： An electronic system is disclosed, including multiple initiators and one or more targets coupled to a bus, and a request mask control unit (RMCU). The initiators are configured to initiate requests (e.g., read requests and write requests) via the bus, and the targets are configured to receive requests from the initiators via the bus. The targets are also configured to produce multiple MaskEnable signals, wherein each of the MaskEnable signals is generated following an initial request received via the bus, and dependent on a corresponding “masking situation” within the target. The RMCU receives the MaskEnable signals and produces multiple RequestMask signals dependent upon the MaskEnable signals. One or more of the initiators are permitted to repeat requests via the bus dependent upon one or more of the RequestMask signals. This mechanism provides additional bus bandwidth for carrying out successful data transfers.
摘要翻译：公开了一种电子系统，包括多个启动器和耦合到总线的一个或多个目标，以及请求掩码控制单元（RMCU）。启动器被配置为经由总线发起请求（例如，读请求和写请求），并且目标被配置为经由总线接收来自发起者的请求。目标还被配置为产生多个MaskEnable信号，其中每个MaskEnable信号是在经由总线接收到的初始请求之后生成的，并且取决于目标内相应的“屏蔽情况”。 RMCU接收MaskEnable信号，并根据MaskEnable信号产生多个RequestMask信号。一个或多个启动器被允许经由总线重复请求，取决于一个或多个请求掩码信号。该机制为进行成功的数据传输提供了额外的总线带宽。

5. 发明授权

US06985972B2 Dynamic cache coherency snooper presence with variable snoop latency 有权
标题翻译：动态缓存一致性snooper存在与可变侦听延迟
公开(公告)号：US06985972B2
公开(公告)日：2006-01-10
申请号：US10264163
申请日：2002-10-03
申请人： James Norris Dieffenderfer , Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Thomas Andrew Sartorius , Thomas Philip Speier , Barry Joe Wolford
发明人： James Norris Dieffenderfer , Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Thomas Andrew Sartorius , Thomas Philip Speier , Barry Joe Wolford
IPC分类号： G06F13/28 , G06F12/00
CPC分类号： G06F13/366 , G06F12/0831 , G06F2212/1028 , G06F2213/0038 , Y02D10/13 , Y02D10/14
摘要： A data processing system with a snooper that is capable of dynamically enabling and disabling its snooping capabilities (i.e., snoop detect and response). The snooper is connected to a bus controller via a plurality of interconnects, including a snooperPresent signal, a snoop response signal and a snoop detect signal. When the snooperPresent signal is asserted, subsequent snoop requests are sent to the snooper, and the snooper is polled for a snoop response. Each snooper is capable of responding at different times (i.e., each snooper operates with different snoop latencies). The bus controller individually tracks the snoop response received from each snooper with the snooperPresent signal enabled. Whenever the snooper wishes to deactivate its snooping capabilities/operations, the snooper de-asserts the snooperPresent signal. The bus controller recognizes this as an indication that the snooper is unavailable. Thus, when the bus controller broadcasts subsequent snoop requests, the bus controller does not send the snoop request to the snooper.
摘要翻译：具有能够动态地启用和禁用其窥探能力（即，窥探检测和响应）的窥探者的数据处理系统。窥探者通过多个互连连接到总线控制器，包括窥探信号，窥探响应信号和窥探检测信号。当snooperPresent信号被断言时，后续的窥探请求被发送到snooper，并且窥探者被轮询以进行侦听响应。每个窥探者都能够在不同的时间进行响应（即，每个窥探者使用不同的侦听延迟进行操作）。总线控制器单独跟踪snooperPresent信号启用时从每个窥探者接收的窥探响应。只要窥探者希望取消其窥探能力/操作，窥探者将断言snooperPresent信号。总线控制器将此识别为snooper不可用的指示。因此，当总线控制器广播后续的窥探请求时，总线控制器不向窥探者发送窥探请求。

6. 发明授权

US06907502B2 Method for moving snoop pushes to the front of a request queue 失效
标题翻译：将snoop移动到请求队列前端的方法
公开(公告)号：US06907502B2
公开(公告)日：2005-06-14
申请号：US10264169
申请日：2002-10-03
申请人： Victor Roberts Augsburg , James Norris Dieffenderfer , Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Thomas Andrew Sartorius , Thomas Philip Speier , Barry Joe Wolford
发明人： Victor Roberts Augsburg , James Norris Dieffenderfer , Bernard Charles Drerup , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann , Thomas Andrew Sartorius , Thomas Philip Speier , Barry Joe Wolford
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0831
摘要： A method for prioritizing snoop pushes in a data processing system that schedules requests within a request FIFO. Each new request that is received is placed in the last position of the request FIFO and the request FIFO typically grants request based solely on the order within the request FIFO. As prior requests are sequentially granted the subsequent requests move closer to a first position of the request FIFO. However, when a snoop push is received at the request FIFO, the snoop push is automatically inserted at the first position of the request FIFO ahead of all yet to be granted requests within the request FIFO.
摘要翻译：一种用于将窥探优先级的方法推送到在请求FIFO内调度请求的数据处理系统中。接收到的每个新请求被置于请求FIFO的最后位置，并且请求FIFO通常仅基于请求FIFO内的顺序授予请求。由于先前请求被顺序授权，所以随后的请求更接近请求FIFO的第一位置。然而，当在请求FIFO处接收到窥探推送时，窥探推送将自动插入请求FIFO的第一个位置，而在请求FIFO之前尚未被授予请求。

7. 发明授权

US09064050B2 Arbitrating bus transactions on a communications bus based on bus device health information and related power management 有权
标题翻译：根据总线设备健康信息和相关电源管理，在通信总线上仲裁总线事务
公开(公告)号：US09064050B2
公开(公告)日：2015-06-23
申请号：US13253381
申请日：2011-10-05
申请人： Cristian Duroiu , Jaya Prakash Subramaniam Ganasan , Vinod Chamarty , Mark Michael Schaffer , Joshua H. Stubbs , Robert N. Gibson , Kris Tiri , Moinul H. Khan , Bohuslav Rychlik , Serag GadelRab , Simon Booth
发明人： Cristian Duroiu , Jaya Prakash Subramaniam Ganasan , Vinod Chamarty , Mark Michael Schaffer , Joshua H. Stubbs , Robert N. Gibson , Kris Tiri , Moinul H. Khan , Bohuslav Rychlik , Serag GadelRab , Simon Booth
IPC分类号： G06F12/00 , G06F13/362
CPC分类号： G06F13/362 , Y02D10/14
摘要： Devices, systems, methods, and computer-readable mediums for arbitrating bus transactions on a communications bus based on health information are disclosed. Health information of master devices can be used to adjust priorities of bus transactions from master devices to meet quality of service requirements of the master devices. In one embodiment, a bus interconnect is provided and configured to communicate bus transactions from any of a plurality of master devices to slave device(s) coupled the bus interconnect. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space. The bus interconnect is further configured to translate the virtual priority space into a physical priority level for each of the plurality of master devices. The bus interconnect is further configured to arbitrate bus transactions for the plurality of master devices based on physical priority level for the plurality of master devices.
摘要翻译：公开了用于基于健康信息在通信总线上仲裁总线事务的设备，系统，方法和计算机可读介质。主设备的健康信息可用于调整主设备总线事务的优先级，以满足主设备的服务质量要求。在一个实施例中，总线互连被提供和配置为将总线事务从多个主设备中的任一个传送到耦合总线互连的从设备。总线互连还被配置为将多个主设备中的每一个的健康信息映射到虚拟优先级空间中。总线互连还被配置为将虚拟优先级空间转换为多个主设备中的每一个的物理优先级。总线互连还被配置为基于多个主设备的物理优先级来仲裁多个主设备的总线事务。

8. 发明申请

US20120102249A1 Arbitrating Bus Transactions on a Communications Bus Based on Bus Device Health Information and Related Power Management 有权
标题翻译：基于总线设备健康信息和相关电源管理的通信总线仲裁总线交易
公开(公告)号：US20120102249A1
公开(公告)日：2012-04-26
申请号：US13253381
申请日：2011-10-05
申请人： Cristian Duroiu , Jaya Prakash Subramaniam Ganasan , Vinod Chamarty , Mark Michael Schaffer , Joshua H. Stubbs , Robert N. Gibson , Kris Tiri , Moinul H. Khan , Bohuslav Rychlik , Serag GadelRab , Simon Booth
发明人： Cristian Duroiu , Jaya Prakash Subramaniam Ganasan , Vinod Chamarty , Mark Michael Schaffer , Joshua H. Stubbs , Robert N. Gibson , Kris Tiri , Moinul H. Khan , Bohuslav Rychlik , Serag GadelRab , Simon Booth
IPC分类号： G06F13/368
CPC分类号： G06F13/362 , Y02D10/14
摘要： Devices, systems, methods, and computer-readable mediums for arbitrating bus transactions on a communications bus based on health information are disclosed. Health information of master devices can be used to adjust priorities of bus transactions from master devices to meet quality of service requirements of the master devices. In one embodiment, a bus interconnect is provided and configured to communicate bus transactions from any of a plurality of master devices to slave device(s) coupled the bus interconnect. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space. The bus interconnect is further configured to translate the virtual priority space into a physical priority level for each of the plurality of master devices. The bus interconnect is further configured to arbitrate bus transactions for the plurality of master devices based on physical priority level for the plurality of master devices.
摘要翻译：公开了用于基于健康信息在通信总线上仲裁总线事务的设备，系统，方法和计算机可读介质。主设备的健康信息可用于调整主设备总线事务的优先级，以满足主设备的服务质量要求。在一个实施例中，总线互连被提供和配置为将总线事务从多个主设备中的任一个传送到耦合总线互连的从设备。总线互连还被配置为将多个主设备中的每一个的健康信息映射到虚拟优先级空间中。总线互连还被配置为将虚拟优先级空间转换为多个主设备中的每一个的物理优先级。总线互连还被配置为基于多个主设备的物理优先级来仲裁多个主设备的总线事务。

9. 发明授权

US07395361B2 Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidth 有权
标题翻译：基于传输方向和/或消耗带宽，在多个主设备之间进行加权总线仲裁的装置和方法
公开(公告)号：US07395361B2
公开(公告)日：2008-07-01
申请号：US11208089
申请日：2005-08-19
申请人： Mark Michael Schaffer , Richard Gerard Hofmann , Jaya Prakash Subramaniam Ganasan
发明人： Mark Michael Schaffer , Richard Gerard Hofmann , Jaya Prakash Subramaniam Ganasan
IPC分类号： G06F13/36
CPC分类号： G06F13/362
摘要： A bus arbitration algorithm precisely controls the relative bus channel bandwidth allocated to each master device by considering the direction of, and/or the bus channel bandwidth consumed by, a bus transaction. At least one weighting register is associated with each master device; in one embodiment, one weighting register per bus channel. The register is periodically loaded with a proportionate share of the available bus bandwidth. Upon being granted a bus transaction on a bus channel, the corresponding weighting register is decremented by an amount that reflects the bus channel bandwidth consumed by the transaction, measured in amount of data transferred or number of bus data transfer cycles required to complete the transaction. In the case of equal initial allocation of relative bandwidth share, master devices that consume bus channel bandwidth will have relatively low priority; master devices that do not consume bus channel bandwidth retain relatively high priority.
摘要翻译：总线仲裁算法通过考虑总线事务消耗的方向和/或总线信道带宽来精确地控制分配给每个主设备的相对总线信道带宽。至少一个加权寄存器与每个主设备相关联; 在一个实施例中，每个总线信道有一个加权寄存器。寄存器定期加载可用总线带宽的比例份额。在总线信道被授予总线事务后，对应的加权寄存器减少反映交易消耗的总线信道带宽的量，以传输的数据量或完成交易所需的总线数据传送周期的数量进行测量。在初始分配相对带宽份额相同的情况下，消耗总线信道带宽的主设备优先级相对较低; 不消耗总线信道带宽的主设备保持较高的优先级。

10. 发明授权

US07921249B2 Weakly ordered processing systems and methods 有权
标题翻译：处理系统和方法薄弱
公开(公告)号：US07921249B2
公开(公告)日：2011-04-05
申请号：US12561381
申请日：2009-09-17
申请人： James Edward Sullivan, Jr. , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann
发明人： James Edward Sullivan, Jr. , Jaya Prakash Subramaniam Ganasan , Richard Gerard Hofmann
IPC分类号： G06F13/00
CPC分类号： G06F13/1621 , G06F9/52 , G06F9/522
摘要： The disclosure is directed to a weakly-ordered processing system and method of executing memory barriers in weakly-ordered processing system. The processing system includes memory and a master device configured to issue memory access requests, including memory barriers, to the memory. The processing system also includes a slave device configured to provide the master device access to the memory, the slave device being further configured to produce a signal indicating that an ordering constraint imposed by a memory barrier issued by the master device will be enforced, the signal being produced before the execution of all memory access requests issued by the master device to the memory before the memory barrier.
摘要翻译：本公开涉及一种弱有序处理系统和在弱有序处理系统中执行存储障碍的方法。处理系统包括存储器和被配置为向存储器发出存储器访问请求（包括存储器障碍）的主设备。处理系统还包括被配置为提供主设备对存储器的访问的从设备，从设备还被配置为产生指示由主设备发布的存储器障碍施加的排序约束将被强制的信号，信号在执行由主设备发出的所有存储器访问请求之前在存储器屏障之前被产生到存储器。

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