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    • 5. 发明授权
    • Manufacturing testing for LDPC codes
    • LDPC码制造测试
    • US08914709B1
    • 2014-12-16
    • US13041218
    • 2011-03-04
    • Yu KouLingqi ZengJason BelloradoMarcus Marrow
    • Yu KouLingqi ZengJason BelloradoMarcus Marrow
    • H03M13/00
    • G06F11/1076G06F11/08G06F11/1012G11C29/56004H03M13/015H03M13/1102H03M13/154
    • A storage system includes a channel detector, an LDPC decoder, and an erasure block. The channel detector is configured to receive data corresponding to data read from a storage and output an LLR signal. The LDPC decoder is configured to receive the LLR signal and output a feedback signal to the channel detector. The erasure block is configured to erase at a portion of at least one of the LLR signal and the feedback signal. A method for testing includes generating an error rate function corresponding to an erasure pattern. The function is a function of a number of LDPC iterations. The method includes determining testing parameters at least in part based on the error rate function, wherein the testing parameters comprise a testing number of LDPC iterations, a passing error rate, and the erasure pattern. The method includes testing storage devices using the testing parameters.
    • 存储系统包括信道检测器,LDPC解码器和擦除块。 信道检测器被配置为接收对应于从存储器读取的数据的数据并输出LLR信号。 LDPC解码器被配置为接收LLR信号并将反馈信号输出到信道检测器。 擦除块被配置为擦除LLR信号和反馈信号中的至少一个的一部分。 一种测试方法包括产生与擦除模式对应的错误率函数。 该函数是多次LDPC迭代的函数。 该方法包括至少部分地基于错误率函数来确定测试参数,其中测试参数包括LDPC迭代的测试次数,通过错误率和擦除模式。 该方法包括使用测试参数测试存储设备。
    • 9. 发明授权
    • Digital control of a read-back signal gain
    • 回读信号增益的数字控制
    • US08310386B1
    • 2012-11-13
    • US12985244
    • 2011-01-05
    • Jason BelloradoMarcus Marrow
    • Jason BelloradoMarcus Marrow
    • H03M1/18
    • H03M1/185
    • A system for controlling a dynamic range of an analog to digital converter (ADC) signal is disclosed. The system includes an ADC configured to receive an ADC input signal and output ADC samples; an error computation block coupled to the output of the ADC and configured to compute an error based at least in part on a target and the ADC samples, wherein the target has a constraint that is indicative of a desired dynamic range of the ADC input signal; and an analog front end coupled to the input of the ADC, wherein the analog front end comprises a variable gain amplifier whose gain is adjusted based at least in part on the error.
    • 公开了一种用于控制模数转换器(ADC)信号的动态范围的系统。 该系统包括配置为接收ADC输入信号并输出​​ADC采样的ADC; 耦合到所述ADC的输出并被配置为至少部分地基于目标和所述ADC采样来计算误差的误差计算块,其中所述目标具有指示所述ADC输入信号的期望动态范围的约束; 以及耦合到所述ADC的输入的模拟前端,其中所述模拟前端包括至少部分地基于所述误差来调整增益的可变增益放大器。