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1. 发明授权

US07983372B2 Method, system and computer program product for an even sampling spread over differing clock domain boundaries 失效
标题翻译：方法，系统和计算机程序产品，用于在不同的时钟域边界上进行均匀采样
公开(公告)号：US07983372B2
公开(公告)日：2011-07-19
申请号：US12031158
申请日：2008-02-14
申请人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, Jr.
发明人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, Jr.
IPC分类号： H04L7/00
CPC分类号： H04L7/0008
摘要： The present invention relates to a method, computer program product and system for generating a sample signal from differing clock domain boundaries. The system comprises a cycle base component, a sample offset component being configured to receive a time-based sample pulse signal, and logic to generate a sample pulse. The sample pulse generation logic is configured to receive a time-based sample pulse signal, a free running counter value, a sample offset counter value, and deliver a sample pulse signal.
摘要翻译：本发明涉及一种用于从不同时钟域边界产生采样信号的方法，计算机程序产品和系统。该系统包括循环基础组件，被配置为接收基于时间的采样脉冲信号的采样偏移分量和用于产生采样脉冲的逻辑。采样脉冲发生逻辑被配置为接收基于时间的采样脉冲信号，自由运行计数器值，采样偏移计数器值，并且传送采样脉冲信号。

2. 发明授权

US07881906B2 Method, system and computer program product for event-based sampling to monitor computer system performance 失效
标题翻译：用于事件采样的方法，系统和计算机程序产品，用于监视计算机系统的性能
公开(公告)号：US07881906B2
公开(公告)日：2011-02-01
申请号：US12031735
申请日：2008-02-15
申请人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, Jr.
发明人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, Jr.
IPC分类号： G06F11/30 , G06F11/34
CPC分类号： G06F11/3466 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.
摘要翻译：提供了一种用于监控计算机系统性能的用于事件采样的系统，方法和计算机程序产品。该系统包括用于存储仪器数据样本的样本缓冲区，其中仪器数据可以测量计算机系统性能。该系统还包括样本段选择器，以将事件的仪器数据样本的一段隔离。该系统还包括响应于事件和采样脉冲的组合的仪表计数器计数，并且断言指示仪器数据的样本准备从采样缓冲器注销。

3. 发明申请

US20090207958A1 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR AN EVEN SAMPLING SPREAD OVER DIFFERING CLOCK DOMAIN BOUNDARIES 失效
标题翻译：方法，系统和计算机程序产品，用于通过不同的时域域边界进行采样
公开(公告)号：US20090207958A1
公开(公告)日：2009-08-20
申请号：US12031158
申请日：2008-02-14
申请人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, JR.
发明人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, JR.
IPC分类号： H04L7/00
CPC分类号： H04L7/0008
摘要： The present invention relates to a method, computer program product and system for generating a sample signal from differing clock domain boundaries. The system comprises a cycle base component, a sample offset component being configured to receive a time-based sample pulse signal, and logic to generate a sample pulse. The sample pulse generation logic is configured to receive a time-based sample pulse signal, a free running counter value, a sample offset counter value, and deliver a sample pulse signal.
摘要翻译：本发明涉及一种用于从不同时钟域边界产生采样信号的方法，计算机程序产品和系统。该系统包括循环基础组件，被配置为接收基于时间的采样脉冲信号的采样偏移分量和用于产生采样脉冲的逻辑。采样脉冲发生逻辑被配置为接收基于时间的采样脉冲信号，自由运行计数器值，采样偏移计数器值，并且传送采样脉冲信号。

4. 发明申请

US20090210196A1 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR EVENT-BASED SAMPLING TO MONITOR COMPUTER SYSTEM PERFORMANCE 失效
标题翻译：方法，系统和计算机程序产品，用于基于事件的采样监控计算机系统性能
公开(公告)号：US20090210196A1
公开(公告)日：2009-08-20
申请号：US12031735
申请日：2008-02-15
申请人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, JR.
发明人： Jane H. Bartik , Willm Hinrichs , Martin Recktenwald , Patrick M. West, JR.
IPC分类号： G06F15/00
CPC分类号： G06F11/3466 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.
摘要翻译：提供了一种用于监控计算机系统性能的用于事件采样的系统，方法和计算机程序产品。该系统包括用于存储仪器数据样本的样本缓冲器，其中仪器数据可以测量计算机系统性能。该系统还包括样本段选择器，以将事件的仪器数据样本的一段隔离。该系统还包括响应于事件和采样脉冲的组合的仪表计数器计数，并且断言指示仪器数据的样本准备从采样缓冲器注销。

5. 发明授权

US08055931B2 Method for switching between two redundant oscillator signals within an alignment element 有权
标题翻译：用于在对准元件内切换两个冗余振荡器信号的方法
公开(公告)号：US08055931B2
公开(公告)日：2011-11-08
申请号：US12246123
申请日：2008-10-06
申请人： Ralf Ludewig , Thuyen Le , Tilman Gloekler , Willm Hinrichs
发明人： Ralf Ludewig , Thuyen Le , Tilman Gloekler , Willm Hinrichs
IPC分类号： G06F1/04
CPC分类号： G06F1/12
摘要： A method is provided for switching between two oscillator signals within an alignment element. In accordance with the method, one of the two oscillator signals one is selected as a first master signal in order to provide an output stepping signal at an output of the alignment element. The method comprises introducing a virtual stepping signal when a switch between the two oscillator signals occurs or when a failure in the first master signal is detected. The method further comprises sending the virtual stepping signal to the output of the alignment element in the event of a switch until an alignment with a new master signal is completed.
摘要翻译：提供了一种用于在对准元件内的两个振荡器信号之间切换的方法。根据该方法，选择两个振荡器信号之一作为第一主信号，以便在对准元件的输出处提供输出步进信号。该方法包括当两个振荡器信号之间的开关发生时或当检测到第一主信号的故障时引入虚拟步进信号。该方法还包括在开关的情况下将虚拟步进信号发送到对准元件的输出，直到与新的主信号的对准完成。

6. 发明授权

US08363487B2 Method, system, computer program product, and data processing device for monitoring memory circuits and corresponding integrated circuit 失效
标题翻译：方法，系统，计算机程序产品和用于监视存储器电路的数据处理装置和相应的集成电路
公开(公告)号：US08363487B2
公开(公告)日：2013-01-29
申请号：US12784164
申请日：2010-05-20
申请人： Sebastian Ehrenreich , Tilman Gloekler , Willm Hinrichs , Jens Kuenzer
发明人： Sebastian Ehrenreich , Tilman Gloekler , Willm Hinrichs , Jens Kuenzer
IPC分类号： G11C16/04
CPC分类号： G11C29/24 , G11C16/349 , G11C29/021 , G11C29/028 , G11C2029/0409 , G11C2029/1202
摘要： An improved method monitors memory circuits, especially those used in integrated circuits. The method provides: writing random data in at least one monitor cell, which is implemented as a regular memory cell with an artificially deteriorated stability in order to provoke early fails when compared to fails in a regular memory cell; reading the random data out of the at least one monitor cell; comparing the output data of the read operation against an expected value to detect a value mismatch; and reporting the value mismatch to an error structure if the value mismatch is detected.
摘要翻译：改进的方法监视存储器电路，特别是集成电路中使用的那些电路。该方法提供：在至少一个监视器单元中写入随机数据，其被实现为具有人为劣化的稳定性的常规存储器单元，以便在与常规存储器单元中的故障相比时引发早期失败; 从所述至少一个监视器单元读取所述随机数据; 将读取操作的输出数据与期望值进行比较以检测值不匹配; 并且如果检测到值不匹配，则将值不匹配报告给错误结构。

7. 发明申请

US20100309734A1 METHOD, SYSTEM, COMPUTER PROGRAM PRODUCT, AND DATA PROCESSING DEVICE FOR MONITORING MEMORY CIRCUITS AND CORRESPONDING INTEGRATED CIRCUIT 失效
标题翻译：方法，系统，计算机程序产品和用于监视存储器电路和相关集成电路的数据处理设备
公开(公告)号：US20100309734A1
公开(公告)日：2010-12-09
申请号：US12784164
申请日：2010-05-20
申请人： Sebastian Ehrenreich , Tilman Gloekler , Willm Hinrichs , Jens Kuenzer
发明人： Sebastian Ehrenreich , Tilman Gloekler , Willm Hinrichs , Jens Kuenzer
IPC分类号： G11C7/06
CPC分类号： G11C29/24 , G11C16/349 , G11C29/021 , G11C29/028 , G11C2029/0409 , G11C2029/1202
摘要： An improved method monitors memory circuits, especially those used in integrated circuits. The method provides: writing random data in at least one monitor cell, which is implemented as a regular memory cell with an artificially deteriorated stability in order to provoke early fails when compared to fails in a regular memory cell; reading the random data out of the at least one monitor cell; comparing the output data of the read operation against an expected value to detect a value mismatch; and reporting the value mismatch to an error structure if the value mismatch is detected.
摘要翻译：改进的方法监视存储器电路，特别是集成电路中使用的那些电路。该方法提供：在至少一个监视器单元中写入随机数据，其被实现为具有人为劣化的稳定性的常规存储器单元，以便在与常规存储器单元中的故障相比时引发早期失败; 从所述至少一个监视器单元读取所述随机数据; 将读取操作的输出数据与期望值进行比较以检测值不匹配; 并且如果检测到不匹配值，则将值不匹配报告给错误结构。

8. 发明申请

US20090100283A1 Method for switching between two redundant oscillator signals within an alignment element 有权
标题翻译：用于在对准元件内切换两个冗余振荡器信号的方法
公开(公告)号：US20090100283A1
公开(公告)日：2009-04-16
申请号：US12246123
申请日：2008-10-06
申请人： Ralf Ludewig , Thuyen Le , Tilman Gloekler , Willm Hinrichs
发明人： Ralf Ludewig , Thuyen Le , Tilman Gloekler , Willm Hinrichs
IPC分类号： G06F1/12
CPC分类号： G06F1/12
摘要： A method for switching between two oscillator signals within an alignment element, wherein one of the two oscillator signals one is selected as a first master signal in order to provide an output stepping signal at an output of the alignment element. Said method comprises the steps of: introducing a virtual stepping signal when a switch between the two oscillator signals occurs or when a failure in the first master signal is detected; sending the virtual stepping signal to the output of the alignment element in the event of a switch until an alignment with a new master signal is completed; sending the virtual stepping signal to the output of the alignment element in the event of a failure in the master signal until a switch to the other oscillator signal as a new master signal is performed or until the first master signal becomes valid again.
摘要翻译：一种用于在对准元件内切换两个振荡器信号的方法，其中两个振荡器信号之一被选择为第一主信号，以便在对准元件的输出处提供输出步进信号。所述方法包括以下步骤：当发生两个振荡器信号之间的切换时或当检测到第一主信号的故障时，引入虚拟步进信号; 在切换的情况下将虚拟步进信号发送到对准元件的输出，直到与新的主信号的对准完成; 在主信号发生故障的情况下将虚拟步进信号发送到对准元件的输出，直到作为新的主信号切换到另一个振荡器信号，或者直到第一主信号再次变为有效。

9. 发明申请

US20080115004A1 Clock Skew Adjustment Method and Clock Skew Adjustment Arrangement 审中-公开
标题翻译：时钟倾斜调整方法和时钟偏移调整方案
公开(公告)号：US20080115004A1
公开(公告)日：2008-05-15
申请号：US11938835
申请日：2007-11-13
申请人： Florian Braun , Willm Hinrichs , Cedric Lichtenau , Thomas Pflueger
发明人： Florian Braun , Willm Hinrichs , Cedric Lichtenau , Thomas Pflueger
IPC分类号： G06F1/12
CPC分类号： G06F1/10
摘要： A clock skew adjustment arrangement for a chip is provided which chip is subdivided in at least two blocks, wherein the blocks are supplied with a clock signal of a single joint clock signal generator via clock signals paths, and wherein to each block a circuitry is assigned for measuring and adjusting the respective clock signal.
摘要翻译：提供了一种用于芯片的时钟偏移调整装置，其芯片被细分为至少两个块，其中通过时钟信号路径向块提供单个联合时钟信号发生器的时钟信号，并且其中向每个块分配电路用于测量和调整各个时钟信号。

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