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1. 发明申请

US20090171651A1 SDRAM-BASED TCAM EMULATOR FOR IMPLEMENTING MULTIWAY BRANCH CAPABILITIES IN AN XML PROCESSOR 审中-公开
标题翻译：用于在XML处理器中实现多路分支能力的基于SDRAM的TCAM仿真器
公开(公告)号：US20090171651A1
公开(公告)日：2009-07-02
申请号：US11966236
申请日：2007-12-28
申请人： Jan Van Lunteren , Heather D. Achilles , Joseph Allen , David J. Hoeweler , Jeffrey M. Peters
发明人： Jan Van Lunteren , Heather D. Achilles , Joseph Allen , David J. Hoeweler , Jeffrey M. Peters
IPC分类号： G06F9/455
CPC分类号： G06F9/30058 , G06F16/9014
摘要： The system and method of the present invention “emulates” the TCAM function using a data structure which is stored in an SDRAM device in such way that the size of emulated TCAM is substantially larger than the original TCAM device, thereby allowing the increase of the number of PPE programs which can be resident in memory. The present invention provides a new “emulCAM” algorithm which builds partially on BaRT, but is extended by providing multiple results per hash table entry with flexible assignment to “match-condition-combinations”, by utilizing MUX control vectors for extracting hash index instead of “index-mask-based extraction”, by moving part of CAM function to invoking emulCAM instruction and by providing “Pathological case handling” using multiple emulCAM instructions.
摘要翻译：本发明的系统和方法使用存储在SDRAM设备中的数据结构“模拟”TCAM功能，使得仿真TCAM的大小显着大于原始TCAM设备，从而允许增加数量可以驻留在记忆中的PPE程序。本发明提供了一种新的“emulCAM”算法，其部分地构建在BaRT上，但是通过使用用于提取散列索引的MUX控制向量而不是以“匹配条件组合”提供具有对“匹配条件组合”的灵活分配的每个哈希表条目的多个结果来扩展 “基于索引掩码的提取”，通过将CAM功能的一部分移动到调用emulCAM指令，并通过使用多个emulCAM指令提供“病理案例处理”。

2. 发明申请

US20100185941A1 SUPPORTING VARIABLE DATA STRUCTURES AND CONSTANT DATA STRUCTURES IN A HARDWARE-BASED EXTENSIBLE MARKUP LANGUAGE (XML) POST PROCESSING ENGINE (PPE) 失效
标题翻译：支持基于硬件的可扩展标记语言（XML）后处理引擎（PPE）中的可变数据结构和持续数据结构
公开(公告)号：US20100185941A1
公开(公告)日：2010-07-22
申请号：US12358050
申请日：2009-01-22
申请人： Heather D. Achilles , Joseph H. Allen , David J. Hoeweler , Jeffrey M. Peters
发明人： Heather D. Achilles , Joseph H. Allen , David J. Hoeweler , Jeffrey M. Peters
IPC分类号： G06F17/00
CPC分类号： G06F17/2247
摘要： A method, computer program product, and system are disclosed for supporting variable data structures and constant data structures in a hardware-based XML PPE. The method may include inserting one or more constant Type-Length-Attributes (TLAs) into an output stream. The constant TLAs are inserted from one or more constant node-sets referenced from a constant table. The method may also include creating one or more variable node-sets. Each variable node-set includes one or more variable TLAs (TLAs saved from a base XML document) and is mapped to a variable table. The method may also include inserting one or more variable TLAs into the output stream inserted from one or more variable node-sets referenced from the variable table.
摘要翻译：公开了一种用于在基于硬件的XML PPE中支持可变数据结构和恒定数据结构的方法，计算机程序产品和系统。该方法可以包括将一个或多个常数类型长度属性（TLA）插入到输出流中。从一个常数表引用的一个或多个恒定节点集中插入常量TLA。该方法还可以包括创建一个或多个可变节点集。每个变量节点集包括一个或多个可变TLA（从基本XML文档保存的TLA）并映射到变量表。该方法还可以包括将一个或多个可变TLA插入从从变量表引用的一个或多个可变节点集插入的输出流中。

3. 发明授权

US08091019B2 Supporting variable data structures and constant data structures in a hardware-based extensible markup language (XML) post processing engine (PPE) 失效
标题翻译：支持基于硬件的可扩展标记语言（XML）后处理引擎（PPE）中的可变数据结构和常量数据结构
公开(公告)号：US08091019B2
公开(公告)日：2012-01-03
申请号：US12358050
申请日：2009-01-22
申请人： Heather D. Achilles , Joseph H. Allen , David J. Hoeweler , Jeffrey M. Peters
发明人： Heather D. Achilles , Joseph H. Allen , David J. Hoeweler , Jeffrey M. Peters
IPC分类号： G06F17/00
CPC分类号： G06F17/2247
摘要： A method, computer program product, and system are disclosed for supporting variable data structures and constant data structures in a hardware-based XML PPE. The method may include inserting one or more constant Type-Length-Attributes (TLAs) into an output stream. The constant TLAs are inserted from one or more constant node-sets referenced from a constant table. The method may also include creating one or more variable node-sets. Each variable node-set includes one or more variable TLAs (TLAs saved from a base XML document) and is mapped to a variable table. The method may also include inserting one or more variable TLAs into the output stream inserted from one or more variable node-sets referenced from the variable table.
摘要翻译：公开了一种用于在基于硬件的XML PPE中支持可变数据结构和恒定数据结构的方法，计算机程序产品和系统。该方法可以包括将一个或多个常数类型长度属性（TLA）插入到输出流中。从一个常数表引用的一个或多个恒定节点集中插入常量TLA。该方法还可以包括创建一个或多个可变节点集。每个变量节点集包括一个或多个可变TLA（从基本XML文档保存的TLA）并映射到变量表。该方法还可以包括将一个或多个可变TLA插入从从变量表引用的一个或多个可变节点集插入的输出流中。

4. 发明授权

US08516170B2 Control flow in a ring buffer 失效
标题翻译：环路缓冲区中的控制流程
公开(公告)号：US08516170B2
公开(公告)日：2013-08-20
申请号：US13619050
申请日：2012-09-14
申请人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
发明人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
IPC分类号： G06F3/00
CPC分类号： G06F5/10
摘要： A computer implemented method for writing to a software bound ring buffer. A network adapter may determine that data is available to write to the software bound ring buffer. The network adapter determines that a read index is not equal to a write index, responsive to a determination that data is available to write to the software bound ring buffer. The network adapter writes the data to memory referenced by the hardware write index, wherein memory referenced by the write index is offset according to an offset, and the memory contents comprise a data portion and a valid bit. The network adapter writes an epoch value of the write index to the valid bit. The network adapter increments the write index, responsive to writing the data to memory referenced by the write index. Further disclosed is method to access a hardware bound ring buffer.
摘要翻译：一种用于写入软件绑定环形缓冲区的计算机实现的方法。网络适配器可以确定数据可用于写入软件绑定环形缓冲器。响应于确定数据可用于写入软件绑定环形缓冲区，网络适配器确定读取索引不等于写入索引。网络适配器将数据写入由硬件写入索引引用的存储器，其中由写入索引引用的存储器根据偏移量被偏移，并且存储器内容包括数据部分和有效位。网络适配器将写索引的时期值写入有效位。响应于将数据写入由写入索引引用的存储器，网络适配器会增加写入索引。进一步公开的是访问硬件绑定环形缓冲器的方法。

5. 发明授权

US08291136B2 Ring buffer 失效
标题翻译：环形缓冲区
公开(公告)号：US08291136B2
公开(公告)日：2012-10-16
申请号：US12629445
申请日：2009-12-02
申请人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
发明人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
IPC分类号： G06F3/00
CPC分类号： G06F5/10
摘要： A computer implemented method for writing to a software bound ring buffer. A network adapter may determine that data is available to write to the software bound ring buffer. The network adapter determines that a read index is not equal to a write index, responsive to a determination that data is available to write to the software bound ring buffer. The network adapter writes the data to memory referenced by the hardware write index, wherein memory referenced by the write index is offset according to an offset, and the memory contents comprise a data portion and a valid bit. The network adapter writes an epoch value of the write index to the valid bit. The network adapter increments the write index, responsive to writing the data to memory referenced by the write index. Further disclosed is method to access a hardware bound ring buffer.
摘要翻译：一种用于写入软件绑定环形缓冲区的计算机实现的方法。网络适配器可以确定数据可用于写入软件绑定环形缓冲器。响应于确定数据可用于写入软件绑定环形缓冲区，网络适配器确定读取索引不等于写入索引。网络适配器将数据写入由硬件写入索引引用的存储器，其中由写入索引引用的存储器根据偏移量被偏移，并且存储器内容包括数据部分和有效位。网络适配器将写索引的时期值写入有效位。响应于将数据写入由写入索引引用的存储器，网络适配器会增加写入索引。进一步公开的是访问硬件绑定环形缓冲器的方法。

6. 发明申请

US20130013868A1 RING BUFFER 失效
标题翻译：环形缓冲器
公开(公告)号：US20130013868A1
公开(公告)日：2013-01-10
申请号：US13619050
申请日：2012-09-14
申请人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
发明人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
IPC分类号： G06F12/00
CPC分类号： G06F5/10
摘要： A computer implemented method for writing to a software bound ring buffer. A network adapter may determine that data is available to write to the software bound ring buffer. The network adapter determines that a read index is not equal to a write index, responsive to a determination that data is available to write to the software bound ring buffer. The network adapter writes the data to memory referenced by the hardware write index, wherein memory referenced by the write index is offset according to an offset, and the memory contents comprise a data portion and a valid bit. The network adapter writes an epoch value of the write index to the valid bit. The network adapter increments the write index, responsive to writing the data to memory referenced by the write index. Further disclosed is method to access a hardware bound ring buffer.
摘要翻译：一种用于写入软件绑定环形缓冲区的计算机实现的方法。网络适配器可以确定数据可用于写入软件绑定环形缓冲器。响应于确定数据可用于写入软件绑定环形缓冲区，网络适配器确定读取索引不等于写入索引。网络适配器将数据写入由硬件写索引引用的存储器，其中由写入索引引用的存储器根据偏移量偏移，存储器内容包括数据部分和有效位。网络适配器将写索引的时期值写入有效位。响应于将数据写入由写入索引引用的存储器，网络适配器会增加写入索引。进一步公开的是访问硬件绑定环形缓冲器的方法。

7. 发明申请

US20110131352A1 Ring Buffer 失效
标题翻译：环形缓冲区
公开(公告)号：US20110131352A1
公开(公告)日：2011-06-02
申请号：US12629445
申请日：2009-12-02
申请人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
发明人： Joseph H. Allen , David J. Hoeweler , John A. Shriver
IPC分类号： G06F5/00
CPC分类号： G06F5/10
摘要： A computer implemented method for writing to a software bound ring buffer. A network adapter may determine that data is available to write to the software bound ring buffer. The network adapter determines that a read index is not equal to a write index, responsive to a determination that data is available to write to the software bound ring buffer. The network adapter writes the data to memory referenced by the hardware write index, wherein memory referenced by the write index is offset according to an offset, and the memory contents comprise a data portion and a valid bit. The network adapter writes an epoch value of the write index to the valid bit. The network adapter increments the write index, responsive to writing the data to memory referenced by the write index. Further disclosed is method to access a hardware bound ring buffer.
摘要翻译：一种用于写入软件绑定环形缓冲区的计算机实现的方法。网络适配器可以确定数据可用于写入软件绑定环形缓冲器。响应于确定数据可用于写入软件绑定环形缓冲区，网络适配器确定读取索引不等于写入索引。网络适配器将数据写入由硬件写入索引引用的存储器，其中由写入索引引用的存储器根据偏移量被偏移，并且存储器内容包括数据部分和有效位。网络适配器将写索引的时期值写入有效位。响应于将数据写入由写入索引引用的存储器，网络适配器会增加写入索引。进一步公开的是访问硬件绑定环形缓冲器的方法。

8. 发明授权

US06564350B1 Testing frequency hopping devices 有权
标题翻译：测试跳频设备
公开(公告)号：US06564350B1
公开(公告)日：2003-05-13
申请号：US09608040
申请日：2000-06-30
申请人： David J. Hoeweler , Michael A. Rothman
发明人： David J. Hoeweler , Michael A. Rothman
IPC分类号： G01R3128
CPC分类号： H03L7/00 , G01R31/2822 , G01R31/3167
摘要： An improved system and method for testing high frequency electronic devices. The improvement allows characteristics such as phase noise to be measured while a device under test changes operating frequency (frequency hops) at its normal rate. In accordance with the invention, a dynamic controller programs the frequencies of first and second frequency synthesizers at precisely controlled instants of time. For each of the first and second synthesizers, the dynamic controller includes a frequency memory for storing a sequence of frequency data, a counter for sequencing through the frequency memory, and a timing source for activating the counter. Data stored at each location of the frequency memory represents a frequency to which the respective synthesizer is to be programmed. The output from the first synthesizer is provided to the input of a device under test (DUT), in response to which the DUT generates and output signal. A mixer receives at its inputs the output of the DUT and the output of the second synthesizer. The mixer combines the two inputs to generate a test signal. The test signal can then be digitized, and the resulting digital samples can be evaluated. Under control of the timing source, the dynamic controller steps through different addresses of the frequency memories for the first and second synthesizers. At each memory location, new data are sent to the synthesizers at precisely controlled instants of time. New frequencies are established, and the test signal is again digitized. Characteristics of the DUT can be determined from the digital samples at each frequency that the DUT assumes.
摘要翻译：一种用于测试高频电子设备的改进的系统和方法。该改进允许在被测器件以正常速率改变工作频率（跳频）时测量相位噪声等特性。根据本发明，动态控制器以精确控制的时刻对第一和第二频率合成器的频率进行编程。对于第一和第二合成器中的每一个，动态控制器包括用于存储频率数据序列的频率存储器，用于通过频率存储器排序的计数器和用于激活计数器的定时源。存储在频率存储器的每个位置处的数据表示相应合成器要编程的频率。来自第一合成器的输出被提供给待测器件（DUT）的输入端，响应于DUT产生和输出信号。混合器在其输入端接收DUT的输出和第二合成器的输出。混频器组合两个输入以产生测试信号。然后可以将测试信号数字化，并且可以评估所得到的数字样本。在定时源的控制下，动态控制器跨越第一和第二合成器的频率存储器的不同地址。在每个存储器位置，新的数据在精确控制的时刻发送到合成器。建立新的频率，再次对测试信号进行数字化处理。 DUT的特性可以从DUT所采用的每个频率的数字样本确定。

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