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1. 发明申请

US20090172299A1 System and Method for Implementing Hybrid Single-Compare-Single-Store Operations 有权
标题翻译：实现混合单一比较 - 单店操作的系统和方法
公开(公告)号：US20090172299A1
公开(公告)日：2009-07-02
申请号：US11967358
申请日：2007-12-31
申请人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba' , Cong Wang
发明人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba' , Cong Wang
IPC分类号： G06F12/00 , G06F12/16 , G06F12/14
CPC分类号： G06F9/526 , G06F9/466 , G06F11/141 , G06F11/1479 , G06F2209/521
摘要： A hybrid Single-Compare-Single-Store (SCSS) operation may exploit best-effort hardware transactional memory (HTM) for good performance in the case that it succeeds, and may transparently resort to software-mediated transactions if the hardware transactional mechanisms fail. The SCSS operation may compare a value in a control location to a specified expected value, and if they match, may store a new value in a separate data location. The control value may include a global lock, a transaction status indicator, and/or a portion of an ownership record, in different embodiments. If another transaction in progress owns the data location, the SCSS operation may abort the other transaction or may help it complete by copying the other transactions' write set into its own right set before acquiring ownership. A hybrid SCSS operation, which is usually nonblocking, may be applied to building software transactional memories (STMs) and/or hybrid transactional memories (HyTMs), in some embodiments.
摘要翻译：混合单一比较单存储（SCSS）操作可以在成功的情况下利用尽力而为的硬件事务存储器（HTM）以获得良好的性能，并且如果硬件事务机制失败，则可以透明地诉诸软件介入的事务。 SCSS操作可以将控制位置中的值与指定的预期值进行比较，如果匹配，则可将新值存储在单独的数据位置。在不同的实施例中，控制值可以包括全局锁定，事务状态指示符和/或所有权记录的一部分。如果正在进行的另一个交易拥有数据位置，SCSS操作可能会中止其他交易，或者可以在获得所有权之前将其他交易的写入集合复制到自己的权利集中来帮助完成该交易。在一些实施例中，通常不阻塞的混合SCSS操作可以应用于构建软件事务存储器（STM）和/或混合事务存储器（HyTM）。

2. 发明申请

US20090171962A1 System and Method for Implementing Nonblocking Zero-Indirection Transactional Memory 有权
标题翻译：实现非阻塞零间接事务存储器的系统和方法
公开(公告)号：US20090171962A1
公开(公告)日：2009-07-02
申请号：US11967381
申请日：2007-12-31
申请人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba' , Cong Wang
发明人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba' , Cong Wang
IPC分类号： G06F17/30
CPC分类号： G06F9/467
摘要： Systems and methods for implementing and using nonblocking zero-indirection software transactional memory (NZSTM) are disclosed. NZSTM systems implement object-based software transactional memory that eliminates all levels of indirection except in the uncommon case of a conflict with an unresponsive thread. Shared data is co-located with a header in an NZObject, and is addressable at a fixed offset from the header. Conflicting transactions are requested to abort themselves without being forced to abort. NZObjects are modified in place when there are no conflicts, and when a conflicting transaction acknowledges the abort request. In the uncommon case, NZObjects are inflated to introduce a locator and some levels of indirection, and are restored to their un-inflated form following resolution of the conflict. In some embodiments, transactions are executed using best effort hardware transactional memory if it is available and effective, and software transactional memory if not, yielding a hybrid transactional memory system, NZTM.
摘要翻译：公开了用于实现和使用非阻塞零间接软件事务存储器（NZSTM）的系统和方法。 NZSTM系统实现了基于对象的软件事务内存，消除了所有级别的间接，除非是与无响应线程冲突的罕见情况。共享数据与NZObject中的头部位于一起，并且可以与头部固定的偏移量进行寻址。要求冲突交易中止自己而不被迫中止。当没有冲突时，NZObjects被修改就位，当冲突的事务确认中止请求时。在不常见的情况下，NZObjects被膨胀以引入定位器和一定程度的间接性，并且在解决冲突之后恢复到它们没有膨胀的形式。在一些实施例中，如果可用且有效，则使用尽力而为的硬件事务存储器来执行事务，如果不是，则使用软件事务存储器，产生混合事务存储器系统NZTM。

3. 发明授权

US08140497B2 System and method for implementing nonblocking zero-indirection transactional memory 有权
标题翻译：用于实现非阻塞零间接事务内存的系统和方法
公开(公告)号：US08140497B2
公开(公告)日：2012-03-20
申请号：US11967381
申请日：2007-12-31
申请人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba′ , Cong Wang
发明人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba′ , Cong Wang
IPC分类号： G06F17/00
CPC分类号： G06F9/467
摘要： Systems and methods for implementing and using nonblocking zero-indirection software transactional memory (NZSTM) are disclosed. NZSTM systems implement object-based software transactional memory that eliminates all levels of indirection except in the uncommon case of a conflict with an unresponsive thread. Shared data is co-located with a header in an NZObject, and is addressable at a fixed offset from the header. Conflicting transactions are requested to abort themselves without being forced to abort. NZObjects are modified in place when there are no conflicts, and when a conflicting transaction acknowledges the abort request. In the uncommon case, NZObjects are inflated to introduce a locator and some levels of indirection, and are restored to their un-inflated form following resolution of the conflict. In some embodiments, transactions are executed using best effort hardware transactional memory if it is available and effective, and software transactional memory if not, yielding a hybrid transactional memory system, NZTM.
摘要翻译：公开了用于实现和使用非阻塞零间接软件事务存储器（NZSTM）的系统和方法。 NZSTM系统实现了基于对象的软件事务内存，消除了所有级别的间接，除非是与无响应线程冲突的罕见情况。共享数据与NZObject中的头部位于一起，并且可以与头部固定的偏移量进行寻址。要求冲突交易中止自己而不被迫中止。当没有冲突时，NZObjects被修改就位，当冲突的事务确认中止请求时。在不常见的情况下，NZObjects被膨胀以引入定位器和一定程度的间接性，并且在解决冲突之后恢复到它们没有膨胀的形式。在一些实施例中，如果可用且有效，则使用尽力而为的硬件事务存储器来执行事务，如果不是，则使用软件事务存储器，产生混合事务存储器系统NZTM。

4. 发明授权

US07793052B2 System and method for implementing hybrid single-compare-single-store operations 有权
标题翻译：实现混合单比较单店操作的系统和方法
公开(公告)号：US07793052B2
公开(公告)日：2010-09-07
申请号：US11967358
申请日：2007-12-31
申请人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba′ , Cong Wang
发明人： James R. Goodman , Mark S. Moir , Fu'ad W. F. Al Tabba′ , Cong Wang
IPC分类号： G06F12/00
CPC分类号： G06F9/526 , G06F9/466 , G06F11/141 , G06F11/1479 , G06F2209/521
摘要： A hybrid Single-Compare-Single-Store (SCSS) operation may exploit best-effort hardware transactional memory (HTM) for good performance in the case that it succeeds, and may transparently resort to software-mediated transactions if the hardware transactional mechanisms fail. The SCSS operation may compare a value in a control location to a specified expected value, and if they match, may store a new value in a separate data location. The control value may include a global lock, a transaction status indicator, and/or a portion of an ownership record, in different embodiments. If another transaction in progress owns the data location, the SCSS operation may abort the other transaction or may help it complete by copying the other transactions' write set into its own right set before acquiring ownership. A hybrid SCSS operation, which is usually nonblocking, may be applied to building software transactional memories (STMs) and/or hybrid transactional memories (HyTMs), in some embodiments.
摘要翻译：混合单一比较单存储（SCSS）操作可以在成功的情况下利用尽力而为的硬件事务存储器（HTM）以获得良好的性能，并且如果硬件事务机制失败，则可以透明地诉诸软件介入的事务。 SCSS操作可以将控制位置中的值与指定的预期值进行比较，如果匹配，则可将新值存储在单独的数据位置。在不同的实施例中，控制值可以包括全局锁定，事务状态指示符和/或所有权记录的一部分。如果正在进行的另一个交易拥有数据位置，SCSS操作可能会中止其他交易，或者可以在获得所有权之前将其他交易的写入集合复制到自己的权利集中来帮助完成该交易。在一些实施例中，通常不阻塞的混合SCSS操作可以应用于构建软件事务存储器（STM）和/或混合事务存储器（HyTM）。

5. 发明授权

US08560816B2 System and method for performing incremental register checkpointing in transactional memory 有权
标题翻译：用于在事务性存储器中执行增量寄存器检查点的系统和方法
公开(公告)号：US08560816B2
公开(公告)日：2013-10-15
申请号：US12827842
申请日：2010-06-30
申请人： Mark S. Moir , David Dice , Daniel S. Nussbaum , James R. Goodman
发明人： Mark S. Moir , David Dice , Daniel S. Nussbaum , James R. Goodman
IPC分类号： G06F9/00
CPC分类号： G06F9/3863 , G06F9/3834 , G06F9/3859
摘要： Systems and methods described herein for performing incremental register checkpointing may employ a special register to indicate which registers have already been checkpointed. This register may include one bit per register. These systems may also include a special pointer register whose value identifies a location in user memory or in dedicated on-chip storage at which a copy of a register's value should be saved by a checkpointing operation. Only registers modified during speculative execution or execution of a transaction may be checkpointed (e.g., when register modifying instructions are encountered) and subsequently restored (e.g., due to misspeculation or transaction abort), rather than all of the registers of the processor. Each register may be checkpointed at most once for a given speculative episode or atomic transaction. Setting a bit in the special register may prevent checkpointing of the corresponding register. Setting all of the bits in the special register may disable checkpointing.
摘要翻译：本文描述的用于执行增量寄存器检查点的系统和方法可以使用特殊寄存器来指示哪些寄存器已经被检查点。该寄存器可以包括每个寄存器一位。这些系统还可以包括特殊的指针寄存器，其特征指针寄存器的值标识用户存储器中的位置或专用片上存储器，通过检查点操作应该保存寄存器值的副本。只有在推测性执行或执行交易期间修改的寄存器可以是检查点（例如，当遇到寄存器修改指令时）并且随后恢复（例如，由于错误设置或事务中止）而不是处理器的所有寄存器。对于给定的投机事件或原子事务，每个寄存器最多可以被检查点一次。在特殊寄存器中设置一位可能会阻止相应寄存器的检查点。设置特殊寄存器中的所有位可能会禁用检查点。

6. 发明申请

US20120005461A1 System and Method for Performing Incremental Register Checkpointing in Transactional Memory 有权
标题翻译：在事务性存储器中执行增量寄存器检查点的系统和方法
公开(公告)号：US20120005461A1
公开(公告)日：2012-01-05
申请号：US12827842
申请日：2010-06-30
申请人： Mark S. Moir , David Dice , Daniel S. Nussbaum , James R. Goodman
发明人： Mark S. Moir , David Dice , Daniel S. Nussbaum , James R. Goodman
IPC分类号： G06F9/312
CPC分类号： G06F9/3863 , G06F9/3834 , G06F9/3859
摘要： Systems and methods described herein for performing incremental register checkpointing may employ a special register to indicate which registers have already been checkpointed. This register may include one bit per register. These systems may also include a special pointer register whose value identifies a location in user memory or in dedicated on-chip storage at which a copy of a register's value should be saved by a checkpointing operation. Only registers modified during speculative execution or execution of a transaction may be checkpointed (e.g., when register modifying instructions are encountered) and subsequently restored (e.g., due to misspeculation or transaction abort), rather than all of the registers of the processor. Each register may be checkpointed at most once for a given speculative episode or atomic transaction. Setting a bit in the special register may prevent checkpointing of the corresponding register. Setting all of the bits in the special register may disable checkpointing.
摘要翻译：本文描述的用于执行增量寄存器检查点的系统和方法可以使用特殊寄存器来指示哪些寄存器已经被检查点。该寄存器可以包括每个寄存器一位。这些系统还可以包括特殊的指针寄存器，其特征指针寄存器的值标识用户存储器中的位置或专用片上存储器，通过检查点操作应该保存寄存器值的副本。只有在推测性执行或执行交易期间修改的寄存器可以是检查点（例如，当遇到寄存器修改指令时）并且随后恢复（例如，由于错误设置或事务中止）而不是处理器的所有寄存器。对于给定的投机事件或原子事务，每个寄存器最多可以被检查点一次。在特殊寄存器中设置一位可能会阻止相应寄存器的检查点。设置特殊寄存器中的所有位可能会禁用检查点。

7. 发明授权

US08281185B2 Advice-based feedback for transactional execution 有权
标题翻译：基于咨询的事务执行反馈
公开(公告)号：US08281185B2
公开(公告)日：2012-10-02
申请号：US12494934
申请日：2009-06-30
申请人： Daniel S. Nussbaum , David Dice , Martin Karlsson , Mark S. Moir
发明人： Daniel S. Nussbaum , David Dice , Martin Karlsson , Mark S. Moir
IPC分类号： G06F11/00
CPC分类号： G06F11/141 , G06F9/3004 , G06F9/30087 , G06F9/30123 , G06F9/3834 , G06F9/3842 , G06F9/3861 , G06F9/467 , G06F11/0766 , G06F11/0793
摘要： One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a failure state of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides an advice state associated with the recorded failure state to the program to facilitate a response to the transaction failure by the program.
摘要翻译：一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。在操作期间，系统使用硬件事务存储器机制在执行事务期间记录事务的故障状态。接下来，系统检测与事务相关联的事务失败。最后，系统向程序提供与记录的故障状态相关联的建议状态，以便于程序对事务失败的响应。

8. 发明授权

US08225139B2 Facilitating transactional execution through feedback about misspeculation 有权
标题翻译：通过关于错配的反馈促进交易执行
公开(公告)号：US08225139B2
公开(公告)日：2012-07-17
申请号：US12493447
申请日：2009-06-29
申请人： Daniel S. Nussbaum , David Dice , Martin Karlsson , Mark S. Moir
发明人： Daniel S. Nussbaum , David Dice , Martin Karlsson , Mark S. Moir
IPC分类号： G06F9/00
CPC分类号： G06F9/30087 , G06F9/3842 , G06F9/3865 , G06F12/0817
摘要： One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a misspeculation indicator of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides the recorded misspeculation indicator to the program to facilitate a response to the transaction failure by the program.
摘要翻译：一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。在操作期间，系统使用硬件事务存储器机制在执行事务期间记录事务的错误指示符。接下来，系统检测与事务相关联的事务失败。最后，系统向程序提供记录的错误指示符，以便程序响应交易失败。

9. 发明授权

US07984444B1 Composite abortable locks 有权
标题翻译：复合材料不可逾越的锁
公开(公告)号：US07984444B1
公开(公告)日：2011-07-19
申请号：US11226949
申请日：2005-09-15
申请人： Nir N. Shavit , Mark S. Moir , Virendra J. Marathe
发明人： Nir N. Shavit , Mark S. Moir , Virendra J. Marathe
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G06F9/526
摘要： A lock implementation has properties of both backoff locks and queue locks. Such a “composite” lock is abortable and is provided with a constant number of preallocated nodes. A thread requesting the lock selects one of the nodes, attempts to acquire the selected node, and, if successful, inserts the selected node in a wait-queue for the lock. Because there is only a constant number of nodes for the wait-queue, all requesting threads may not be queued. Requesting threads unable to successfully acquire a selected node may backoff and retry selecting and acquiring a node. A node at the front of the wait-queue holds the lock.
摘要翻译：锁实现具有回退锁和队列锁的属性。这样的“复合”锁是不可中止的，并且具有恒定数量的预分配节点。请求锁的线程选择一个节点，尝试获取所选择的节点，如果成功，则将所选节点插入到等待队列中。因为等待队列中只有一定数量的节点，所有请求的线程可能不会排队。请求线程无法成功获取所选节点可以退避并重试选择和获取节点。等待队列前面的节点保存锁。

10. 发明申请

US20110138134A1 Software Transactional Memory for Dynamically Sizable Shared Data Structures 有权
标题翻译：用于动态相似的共享数据结构的软件事务内存
公开(公告)号：US20110138134A1
公开(公告)日：2011-06-09
申请号：US13030992
申请日：2011-02-18
申请人： Mark S. Moir , Victor M. Luchangco , Maurice Herlihy
发明人： Mark S. Moir , Victor M. Luchangco , Maurice Herlihy
IPC分类号： G06F12/00
CPC分类号： G06F9/524 , G06F9/526 , Y10S707/99944 , Y10S707/99947
摘要： We propose a new form of software transactional memory (STM) designed to support dynamic-sized data structures, and we describe a novel non-blocking implementation. The non-blocking property we consider is obstruction-freedom. Obstruction-freedom is weaker than lock-freedom; as a result, it admits substantially simpler and more efficient implementations. An interesting feature of our obstruction-free STM implementation is its ability to use of modular contention managers to ensure progress in practice.
摘要翻译：我们提出了一种旨在支持动态大小的数据结构的新形式的软件事务内存（STM），我们描述了一种新的非阻塞实现。我们认为的非阻塞性是阻碍自由。障碍自由弱于锁定自由; 因此，它承认基本上更简单和更有效的实现。我们无障碍STM实施的一个有趣的特征是其使用模块化竞争管理人员确保实践进度的能力。

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