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    • 2. 发明授权
    • Method of using controlled resist footing on silicon nitride substrate for smaller spacing of integrated circuit device features
    • 在氮化硅衬底上使用受控抗蚀剂基底的方法,用于较小间距的集成电路器件特征
    • US06514874B1
    • 2003-02-04
    • US09875635
    • 2001-06-06
    • James Jiahua YuBhanwar SinghAngela T. Hui
    • James Jiahua YuBhanwar SinghAngela T. Hui
    • H01L21461
    • H01L21/31144
    • A method of fabricating an integrated circuit can include providing a layer of silicon nitride over a semiconductor substrate where the layer of silicon nitride has a first thickness selected based on a desired size of extensions; providing a layer of photoresist material over the layer of silicon nitride; patterning the layer of photoresist to form photoresist features being separated at the top of the photoresist features by one minimum lithographic feature and etching a portion of the layer of silicon nitride to form a hole for an integrated circuit device feature. The photoresist features include extensions at the bottom of the photoresist features. The extensions define footings. These footings reduce the separation at the bottom of the photoresist features. As such, exposed portions of the layer of silicon nitride are less than one minimum lithographic feature in width.
    • 制造集成电路的方法可以包括在半导体衬底上提供氮化硅层,其中氮化硅层具有基于期望的扩展尺寸选择的第一厚度; 在氮化硅层上提供一层光致抗蚀剂材料; 图案化光致抗蚀剂层以形成光致抗蚀剂特征,其通过一个最小光刻特征在光致抗蚀剂特征的顶部分离,并蚀刻氮化硅层的一部分以形成用于集成电路器件特征的孔。 光致抗蚀剂特征包括在光刻胶特征底部的延伸部分。 扩展名定义了基础。 这些底脚减少了光刻胶特征底部的分离。 因此,氮化硅层的暴露部分的宽度小于一个最小光刻特征。