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1. 发明授权

US08443122B2 Asynchronous upsizing circuit in data processing system 有权
标题翻译：数据处理系统中的异步升压电路
公开(公告)号：US08443122B2
公开(公告)日：2013-05-14
申请号：US12917854
申请日：2010-11-02
申请人： JaeGeun Yun , Junhyung Um , Woo-Cheol Kwon , Hyun-Joon Kang , Bub-chul Jeong
发明人： JaeGeun Yun , Junhyung Um , Woo-Cheol Kwon , Hyun-Joon Kang , Bub-chul Jeong
IPC分类号： G06F3/00 , G06F5/00
CPC分类号： G06F13/4059
摘要： An asynchronous upsizing circuit in a data processing system. The asynchronous upsizing circuit includes an asynchronous packer and an asynchronous unpacker. The asynchronous packer includes a write buffer commonly used for an asynchronous bridge and for upsizing and for buffering a write channel data; and first and second asynchronous packing controllers controlling channel compaction according to first and second clocks, respectively, regarding the write channel data inputted/outputted to/from the write buffer during a burst write operation. The asynchronous unpacker includes a read buffer commonly used for an asynchronous bridge and for upsizing and for buffering a read channel data; and first and second asynchronous unpacking controllers controlling channel compaction according to the first and second clocks, respectively, regarding the read channel data inputted/outputted to/from the read buffer during a burst read operation.
摘要翻译：数据处理系统中的异步增大电路。异步升压电路包括异步封隔器和异步解包器。异步封隔器包括通常用于异步桥的写入缓冲器，并且用于增大和缓冲写通道数据; 以及第一和第二异步打包控制器，分别根据第一和第二时钟控制在突发写入操作期间输入/输出到写入缓冲器的写入通道数据的通道压缩。异步解包器包括通常用于异步网桥的读缓冲器，并用于增大和缓冲读通道数据; 以及分别针对在突发读取操作期间从读取缓冲器输入/输出的读通道数据，分别根据第一和第二时钟控制信道压缩的第一和第二异步解包控制器。

2. 发明申请

US20110131350A1 ASYNCHRONOUS UPSIZING CIRCUIT IN DATA PROCESSING SYSTEM 有权
标题翻译：数据处理系统中异步升压电路
公开(公告)号：US20110131350A1
公开(公告)日：2011-06-02
申请号：US12917854
申请日：2010-11-02
申请人： JaeGeun Yun , Junhyung Um , WooCheol Kwon , Hyun-Joon Kang , Bub-chul Jeong
发明人： JaeGeun Yun , Junhyung Um , WooCheol Kwon , Hyun-Joon Kang , Bub-chul Jeong
IPC分类号： G06F5/00 , G06F13/00
CPC分类号： G06F13/4059
摘要： An asynchronous upsizing circuit in a data processing system. The asynchronous upsizing circuit includes an asynchronous packer and an asynchronous unpacker. The asynchronous packer includes a write buffer commonly used for an asynchronous bridge and for upsizing and for buffering a write channel data; and first and second asynchronous packing controllers controlling channel compaction according to first and second clocks, respectively, regarding the write channel data inputted/outputted to/from the write buffer during a burst write operation. The asynchronous unpacker includes a read buffer commonly used for an asynchronous bridge and for upsizing and for buffering a read channel data; and first and second asynchronous unpacking controllers controlling channel compaction according to the first and second clocks, respectively, regarding the read channel data inputted/outputted to/from the read buffer during a burst read operation.
摘要翻译：数据处理系统中的异步增大电路。异步升压电路包括异步封隔器和异步解包器。异步封隔器包括通常用于异步桥的写入缓冲器，并且用于增大和缓冲写通道数据; 以及第一和第二异步打包控制器，分别根据第一和第二时钟控制在突发写入操作期间输入/输出到写入缓冲器的写入通道数据的通道压缩。异步解包器包括通常用于异步网桥的读缓冲器，并用于增大和缓冲读通道数据; 以及分别针对在突发读取操作期间从读取缓冲器输入/输出的读通道数据，分别根据第一和第二时钟控制信道压缩的第一和第二异步解包控制器。

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