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1. 发明申请

US20160329414A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20160329414A1
公开(公告)日：2016-11-10
申请号：US15093145
申请日：2016-04-07
申请人： Jae-Hwan LEE , Sangsu Kim , Sanghyuk Hong , Seung Mo Ha
发明人： Jae-Hwan LEE , Sangsu Kim , Sanghyuk Hong , Seung Mo Ha
IPC分类号： H01L29/66 , H01L21/02 , H01L21/311 , H01L29/40
CPC分类号： H01L29/66795 , H01L21/823821 , H01L29/0847 , H01L29/66545 , H01L29/7851
摘要： A method of fabricating a semiconductor device includes forming an active pattern protruding from a substrate, forming a liner layer on the active pattern, forming a sacrificial gate pattern on the liner layer and crossing the active pattern, forming source/drain regions on the active pattern and at both sides of the sacrificial gate pattern, forming an interlayer insulating layer to cover the source/drain regions, forming capping insulating patterns on the interlayer insulating layer to expose the sacrificial gate pattern, and removing the sacrificial gate pattern and the liner layer by an etching process using the capping insulating patterns as an etch mask to form a gap region exposing the active pattern. The active pattern includes a material having a lattice constant greater than a lattice constant of the substrate, and the capping insulating patterns include a material having an etch selectivity with respect to the liner layer.
摘要翻译：制造半导体器件的方法包括形成从衬底突出的有源图案，在有源图案上形成衬垫层，在衬垫层上形成牺牲栅极图案并与有源图案交叉，在活性图案上形成源极/漏极区域在牺牲栅极图案的两侧形成层间绝缘层以覆盖源极/漏极区域，在层间绝缘层上形成覆盖绝缘图案以暴露牺牲栅极图案，以及通过以下步骤去除牺牲栅极图案和衬底层：使用封盖绝缘图案作为蚀刻掩模的蚀刻工艺来形成暴露活性图案的间隙区域。活性图案包括晶格常数大于衬底的晶格常数的材料，并且封盖绝缘图案包括相对于衬垫层具有蚀刻选择性的材料。

2. 发明申请

US20150137263A1 SEMICONDUCTOR DEVICE HAVING FIN-TYPE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有微型场效应晶体管的半导体器件及其制造方法
公开(公告)号：US20150137263A1
公开(公告)日：2015-05-21
申请号：US14469615
申请日：2014-08-27
申请人： Jae-Hwan LEE , Sangsu KIM , Changjae YANG
发明人： Jae-Hwan LEE , Sangsu KIM , Changjae YANG
IPC分类号： H01L29/06 , H01L29/78
CPC分类号： H01L29/66795 , H01L21/02233 , H01L21/02255 , H01L21/02271 , H01L21/02337 , H01L21/02343 , H01L21/76224 , H01L29/0649 , H01L29/785
摘要： A field effect transistor includes a fin structure, having a sidewall, protruding from a substrate, and a device isolation structure on the substrate, the device isolation structure defining the sidewall of the fin structure, wherein the fin structure includes a buffer semiconductor pattern disposed on the substrate and a channel pattern disposed on the buffer semiconductor pattern, wherein the buffer semiconductor pattern has a lattice constant different from that of the channel pattern, and wherein the device isolation structure includes a gap-fill insulating layer, and includes an oxidation blocking layer pattern disposed between the buffer semiconductor pattern and the gap-fill insulating layer.
摘要翻译：场效应晶体管包括翅片结构，其具有从衬底突出的侧壁和衬底上的器件隔离结构，所述器件隔离结构限定鳍结构的侧壁，其中鳍结构包括布置在所述衬底和布置在所述缓冲半导体图案上的沟道图案，其中所述缓冲半导体图案具有与所述沟道图案不同的晶格常数，并且其中所述器件隔离结构包括间隙填充绝缘层，并且包括氧化阻挡层设置在缓冲半导体图案和间隙填充绝缘层之间的图案。

3. 发明申请

US20160163834A1 SEMICONDUCTOR DEVICE HAVING FIN-TYPE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：US20160163834A1
公开(公告)日：2016-06-09
申请号：US15009843
申请日：2016-01-29
申请人： Jae-Hwan LEE , Sangsu KIM , Changjae YANG
发明人： Jae-Hwan LEE , Sangsu KIM , Changjae YANG
IPC分类号： H01L29/66 , H01L21/762 , H01L29/06 , H01L21/02
CPC分类号： H01L29/66795 , H01L21/02233 , H01L21/02255 , H01L21/02271 , H01L21/02337 , H01L21/02343 , H01L21/76224 , H01L29/0649 , H01L29/785
摘要： A field effect transistor includes a fin structure, having a sidewall, protruding from a substrate, and a device isolation structure on the substrate, the device isolation structure defining the sidewall of the fin structure, wherein the fin structure includes a buffer semiconductor pattern disposed on the substrate and a channel pattern disposed on the buffer semiconductor pattern, wherein the buffer semiconductor pattern has a lattice constant different from that of the channel pattern, and wherein the device isolation structure includes a gap-fill insulating layer, and includes an oxidation blocking layer pattern disposed between the buffer semiconductor pattern and the gap-fill insulating layer.

4. 发明申请

US20160237981A1 TIDAL CURRENT POWER GENERATION STRUCTURE 审中-公开
标题翻译： TIDAL电流发电结构
公开(公告)号：US20160237981A1
公开(公告)日：2016-08-18
申请号：US15027005
申请日：2014-11-25
申请人： Jai-Hyuk LEE , Jae-Wook LEE , Jae-Hwan LEE
发明人： Jai-Hyuk LEE , Jae-Wook LEE , Jae-Hwan LEE
IPC分类号： F03B13/26 , E02B9/08
CPC分类号： F03B13/264 , E02B9/08 , F05B2240/124 , F05B2240/133 , Y02E10/28
摘要： A power generation structure according to an embodiment of the present invention comprises: terrain features spaced apart from each other at a first interval to thereby form a watercourse through which water can move in the front and rear directions; watercourse banks having a width narrower than the first interval and disposed on the watercourse to thereby respectively form equal-width watercourses having a constant width between the terrain features; a first water collecting bank disposed on the watercourse and formed in the shape of a tip extending from the front end of the watercourse bank on the basis of the moving direction of a tidal current, with the width being gradually decreased toward the front of the equal-width watercourse; and a second water collecting bank disposed on the watercourse and formed in the shape of a tip extending from the rear end of the watercourse bank on the basis of the moving direction of the tidal current, with the width being gradually decreased toward the rear of the equal-width watercourse.
摘要翻译：根据本发明的实施例的发电结构包括：在第一间隔彼此间隔开的地形特征，从而形成水可以沿前后方向移动的水道; 水道堤坝的宽度比第一间隔窄，并设置在水道上，从而分别形成在地形特征之间具有恒定宽度的等宽度的水道; 设置在水道上的第一集水组，其形成为基于潮汐流的移动方向从水道堤坝的前端延伸的尖端的形状，其宽度朝向相等的前方逐渐减小宽带水道以及设置在水道上的第二集水组，其形成为基于潮汐流的移动方向从水路堤的后端延伸的尖端的形状，其宽度朝向等宽水道。

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