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    • 4. 发明申请
    • GATE DRIVING CIRCUIT AND DISPLAY DEVICE HAVING THE SAME
    • 门驱动电路和具有该门的显示装置
    • US20100039363A1
    • 2010-02-18
    • US12507316
    • 2009-07-22
    • Min-Cheol LEEYong-Soon LEE
    • Min-Cheol LEEYong-Soon LEE
    • G09G3/36
    • G09G3/3674G02F1/13454G09G3/3266G09G2300/0408G09G2310/0267G09G2310/0286G09G2360/16G11C19/28
    • A gate driving circuit that may be capable of improving driving margin and maintaining reliability even after long use, and a display device having the gate driving circuit. The gate driving circuit includes a shift register having a plurality of stages dependently connected to one another, wherein each stage includes a pull-up unit outputting a first clock signal as a gate signal in response to a signal of a first node, to which a first input signal is applied, a pull-down unit discharging the gate signal to a gate-off voltage in response to a second input signal, a discharging unit discharging the signal of the first node to the gate-off voltage in response to the second input signal, and a holding unit maintaining the signal of the first node at the gate-off voltage in response to a delay signal of the first clock signal.
    • 一种能够在长时间使用后能够提高驱动余量并保持可靠性的栅极驱动电路,以及具有栅极驱动电路的显示装置。 栅极驱动电路包括具有相互依次连接的多个级的移位寄存器,其中每一级包括上拉单元,其响应于第一节点的信号而将第一时钟信号作为门信号输出, 施加第一输入信号,下拉单元响应于第二输入信号将门信号放电到栅极截止电压,放电单元响应于第二输入信号将第一节点的信号放电到栅极截止电压 输入信号和保持单元,其响应于第一时钟信号的延迟信号而将第一节点的信号保持在栅极截止电压。