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1. 发明申请

US20110116550A1 VIDEO DECODING APPARATUS AND METHOD BASED ON A DATA AND FUNCTION SPLITTING SCHEME 有权
标题翻译：基于数据和功能分割方案的视频解码设备和方法
公开(公告)号：US20110116550A1
公开(公告)日：2011-05-19
申请号：US12837022
申请日：2010-07-15
申请人： Jae Jin Lee , Moo Kyoung Chung , Kyung Su Kim , Jun Young Lee , Seong Mo Park , Nak Woong Eum
发明人： Jae Jin Lee , Moo Kyoung Chung , Kyung Su Kim , Jun Young Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： H04N11/02
CPC分类号： H04N19/436 , H04N19/44 , H04N19/61
摘要： A video decoding apparatus and method based on a data and function splitting scheme are disclosed. The video decoding apparatus based on a data and function splitting scheme includes a variable length decoding unit performing variable length decoding and parsing on a bit stream to acquire residual data and a decoding parameter, and splitting the residual data and the decoding parameter by row; and N (N is a natural number of 2 or larger) number of clusters splitting dequantization and inverse discrete cosine transform (IDCT), motion vector prediction, intra prediction and motion compensation, video restoration, and deblocking function into M number of functions, acquiring the residual data, the decoding parameter, and macroblock (MB) processing information of an upper cluster by column, and splitting the information acquired by column into M number of functions to process the same.
摘要翻译：公开了一种基于数据和功能分解方案的视频解码装置和方法。基于数据和功能分割方案的视频解码装置包括：可变长度解码单元，对比特流执行可变长度解码和解析以获取残差数据和解码参数，并且逐行分割残留数据和解码参数; 并且N（N是2或更大的自然数）将数量分解解量化和逆离散余弦变换（IDCT），运动矢量预测，帧内预测和运动补偿，视频恢复和去块功能的簇数分为M个函数，获取按照列逐列的残差数据，解码参数和宏块（MB）处理信息，并将通过列获取的信息拆分为M个函数以进行处理。

2. 发明申请

US20090138684A1 H.264 CAVLC DECODING METHOD BASED ON APPLICATION-SPECIFIC INSTRUCTION-SET PROCESSOR 失效
标题翻译：基于应用特定指令集处理器的H.264 CAVLC解码方法
公开(公告)号：US20090138684A1
公开(公告)日：2009-05-28
申请号：US12181769
申请日：2008-07-29
申请人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
发明人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
IPC分类号： G06F9/30
CPC分类号： H04N19/42 , H04N19/44 , H04N19/91
摘要： Provided is an H.264 Context Adaptive Variable Length Coding (CAVLC) decoding method based on an Application-Specific Instruction-set Processor (ASIP). The H.264 CAVLC decoding method includes determining a plurality of comparison bit strings on the basis of a table of a decoding coefficient, storing lengths of the comparison bit strings in a first register, storing code values of the comparison bit strings in a second register, comparing an input bit stream with the comparison bit strings based on the lengths and code values of the comparison bit strings, and determining value of the decoding coefficient according to a result of comparison between the input bit stream and the comparison bit strings. The method extracts a decoding coefficient using a register in an ASIP without accessing a memory and prevents a reduction in speed caused by memory access, thereby increasing the decoding speed of an H.264 decoder.
摘要翻译：提供了一种基于应用特定指令集处理器（ASIP）的H.264上下文自适应可变长度编码（CAVLC）解码方法。 H.264 CAVLC解码方法包括：基于解码系数的表确定多个比较比特串，将比较比特列的长度存储在第一寄存器中，将比较比特列的代码值存储在第二寄存器根据比较比特串的长度和码值比较输入比特流与比较比特串，并根据输入比特流和比较比特串之间的比较结果确定解码系数的值。该方法使用ASIP中的寄存器提取解码系数，而不访问存储器，并且防止由存储器访问引起的速度降低，从而提高H.264解码器的解码速度。

3. 发明申请

US20110085601A1 VIDEO DECODING APPARATUS AND METHOD BASED ON MULTIPROCESSOR 审中-公开
标题翻译：基于多处理器的视频解码设备和方法
公开(公告)号：US20110085601A1
公开(公告)日：2011-04-14
申请号：US12836979
申请日：2010-07-15
申请人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
发明人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
IPC分类号： H04N7/26
CPC分类号： H04N19/436 , H04N19/44
摘要： Disclosed are a multiprocessor-based video decoding apparatus and method. The multiprocessor-based video decoding apparatus includes: a stream parser dividing an input stream by row and parsing a skip counter and a quantization parameter of the input stream; and a plurality of processors acquiring the plurality of divided streams, the skip counter, and the quantization parameter generated by the stream parser, acquiring decoded information of an upper processor among neighboring processors by row, and parallel-decoding the plurality of divided streams by row. Decoding of an input stream can be parallel-processed by row.
摘要翻译：公开了一种基于多处理器的视频解码装置和方法。基于多处理器的视频解码装置包括：流分析器，其逐行分割输入流，解析跳过计数器和输入流的量化参数; 以及多个处理器，获取多个划分的流，跳过计数器和由流解析器生成的量化参数，通过行获取相邻处理器之间的上位处理器的解码信息，并且按行并行解码多个划分的流。输入流的解码可以由行并行处理。

4. 发明申请

US20100052955A1 TABLE GENERATION METHOD FOR DECODING VARIABLE-LENGTH CODES 失效
标题翻译：用于解码可变长度代码的表生成方法
公开(公告)号：US20100052955A1
公开(公告)日：2010-03-04
申请号：US12474957
申请日：2009-05-29
申请人： Seung Hyun CHO , Moo Kyoung Chung , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
发明人： Seung Hyun CHO , Moo Kyoung Chung , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： H03M7/40
CPC分类号： H03M7/425
摘要： Provided is a table generation method of decoding a variable-length code. The table generation method includes receiving a variable-length code table and a search width N, generating a K-ary tree from the variable-length code table and the search width N, and generating an N-bit code table from the K-ary tree.
摘要翻译：提供了对可变长度码进行解码的表生成方法。表生成方法包括从可变长度代码表和搜索宽度N接收可变长度代码表和搜索宽度N，生成K元树，并从K元生成N位代码表树。

5. 发明申请

US20090282215A1 MULTI-PROCESSOR SYSTEM AND MULTI-PROCESSING METHOD IN MULTI-PROCESSOR SYSTEM 审中-公开
标题翻译：多处理器系统中的多处理器系统和多处理方法
公开(公告)号：US20090282215A1
公开(公告)日：2009-11-12
申请号：US12346803
申请日：2008-12-30
申请人： Moo Kyoung CHUNG , Seong Hyun Cho , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
发明人： Moo Kyoung CHUNG , Seong Hyun Cho , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： G06F15/76 , G06F9/02
CPC分类号： G06F9/3885 , G06F9/38 , G06F15/17375
摘要： Provided are a multi-processor system and a multi-processing method in the multi-processor system. The multi-processor system comprises a plurality of processors each including a data core and a processing core; and switches connecting the data core to the processing core in each of the processors as a combination of a data core-processing core pair. Therefore, the multi-processor system may be useful to remove any overhead for communications and make programming easy and simple.
摘要翻译：在多处理器系统中提供多处理器系统和多处理方法。多处理器系统包括多个处理器，每个处理器包括数据核心和处理核心; 并且将数据核心连接到每个处理器中的处理核心，作为数据核心处理核心对的组合。因此，多处理器系统可能有助于消除通信的任何开销，并使编程变得简单和简单。

6. 发明授权

US08559524B2 Video decoding apparatus and method based on a data and function splitting scheme 有权
标题翻译：基于数据和功能分割方案的视频解码装置和方法
公开(公告)号：US08559524B2
公开(公告)日：2013-10-15
申请号：US12837022
申请日：2010-07-15
申请人： Jae Jin Lee , Moo Kyoung Chung , Kyung Su Kim , Jun Young Lee , Seong Mo Park , Nak Woong Eum
发明人： Jae Jin Lee , Moo Kyoung Chung , Kyung Su Kim , Jun Young Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： H04N7/26
CPC分类号： H04N19/436 , H04N19/44 , H04N19/61
摘要： A video decoding apparatus and method based on a data and function splitting scheme are disclosed. The video decoding apparatus based on a data and function splitting scheme includes a variable length decoding unit performing variable length decoding and parsing on a bit stream to acquire residual data and a decoding parameter, and splitting the residual data and the decoding parameter by row; and N (N is a natural number of 2 or larger) number of clusters splitting dequantization and inverse discrete cosine transform (IDCT), motion vector prediction, intra prediction and motion compensation, video restoration, and deblocking function into M number of functions, acquiring the residual data, the decoding parameter, and macroblock (MB) processing information of an upper cluster by column, and splitting the information acquired by column into M number of functions to process the same.
摘要翻译：公开了一种基于数据和功能分解方案的视频解码装置和方法。基于数据和功能分割方案的视频解码装置包括：可变长度解码单元，对比特流执行可变长度解码和解析以获取残差数据和解码参数，并且逐行分割残留数据和解码参数; 并且N（N是2或更大的自然数）将数量分解解量化和逆离散余弦变换（IDCT），运动矢量预测，帧内预测和运动补偿，视频恢复和去块功能的簇数分为M个函数，获取按照列逐列的残差数据，解码参数和宏块（MB）处理信息，并将通过列获取的信息拆分为M个函数以进行处理。

7. 发明授权

US07646318B2 H.264 CAVLC decoding method based on application-specific instruction-set processor 失效
标题翻译：基于应用特定指令集处理器的H.264 CAVLC解码方法
公开(公告)号：US07646318B2
公开(公告)日：2010-01-12
申请号：US12181769
申请日：2008-07-29
申请人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
发明人： Jae Jin Lee , Jun Young Lee , Moo Kyoung Chung , Seong Mo Park , Nak Woong Eum
IPC分类号： H03M7/00
CPC分类号： H04N19/42 , H04N19/44 , H04N19/91
摘要： Provided is an H.264 Context Adaptive Variable Length Coding (CAVLC) decoding method based on an Application-Specific Instruction-set Processor (ASIP). The H.264 CAVLC decoding method includes determining a plurality of comparison bit strings on the basis of a table of a decoding coefficient, storing lengths of the comparison bit strings in a first register, storing code values of the comparison bit strings in a second register, comparing an input bit stream with the comparison bit strings based on the lengths and code values of the comparison bit strings, and determining value of the decoding coefficient according to a result of comparison between the input bit stream and the comparison bit strings. The method extracts a decoding coefficient using a register in an ASIP without accessing a memory and prevents a reduction in speed caused by memory access, thereby increasing the decoding speed of an H.264 decoder.
摘要翻译：提供了一种基于应用特定指令集处理器（ASIP）的H.264上下文自适应可变长度编码（CAVLC）解码方法。 H.264 CAVLC解码方法包括：基于解码系数的表确定多个比较比特串，将比较比特列的长度存储在第一寄存器中，将比较比特列的代码值存储在第二寄存器根据比较比特串的长度和码值比较输入比特流与比较比特串，并根据输入比特流和比较比特串之间的比较结果确定解码系数的值。该方法使用ASIP中的寄存器提取解码系数，而不访问存储器，并且防止由存储器访问引起的速度降低，从而提高H.264解码器的解码速度。

8. 发明授权

US07994948B2 Table generation method for decoding variable-length codes 失效
标题翻译：用于解码可变长度代码的表生成方法
公开(公告)号：US07994948B2
公开(公告)日：2011-08-09
申请号：US12474957
申请日：2009-05-29
申请人： Seung Hyun Cho , Moo Kyoung Chung , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
发明人： Seung Hyun Cho , Moo Kyoung Chung , Kyung Su Kim , Jae Jin Lee , Jun Young Lee , Seong Mo Park , Nak Woong Eum
IPC分类号： H03M7/40
CPC分类号： H03M7/425
摘要： Provided is a table generation method of decoding a variable-length code. The table generation method includes receiving a variable-length code table and a search width N, generating a K-ary tree from the variable-length code table and the search width N, and generating an N-bit code table from the K-ary tree.
摘要翻译：提供了对可变长度码进行解码的表生成方法。表生成方法包括从可变长度代码表和搜索宽度N接收可变长度代码表和搜索宽度N，生成K元树，并从K元生成N位代码表树。

9. 发明授权

US08510513B2 Network load reducing method and node structure for multiprocessor system with distributed memory 失效
标题翻译：具有分布式存储器的多处理器系统的网络负载减少方法和节点结构
公开(公告)号：US08510513B2
公开(公告)日：2013-08-13
申请号：US12970909
申请日：2010-12-16
申请人： Sang Heon Lee , Moo Kyoung Chung , Kyoung Seon Shin , June Young Chang , Seong Mo Park , Nak Woong Eum
发明人： Sang Heon Lee , Moo Kyoung Chung , Kyoung Seon Shin , June Young Chang , Seong Mo Park , Nak Woong Eum
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0817 , G06F12/0813 , Y02D10/13
摘要： Provided are a network load reducing method and a node structure for a multiprocessor system with a distributed memory. The network load reducing method uses a multiprocessor system including a node having a distributed memory and an auxiliary memory storing a sharer history table. The network load reducing method includes recording the history of a sharer node in the sharer history table of the auxiliary memory, requesting share data with reference to the sharer history table of the auxiliary memory, and deleting share data stored in the distributed memory and updating the sharer history table of the auxiliary memory.
摘要翻译：提供了一种用于具有分布式存储器的多处理器系统的网络负载减小方法和节点结构。网络负载减少方法使用包括具有分布式存储器的节点和存储共享者历史表的辅助存储器的多处理器系统。网络负载减小方法包括在辅助存储器的共享者历史表中记录共享者节点的历史，参考辅助存储器的共享者历史表请求共享数据，以及删除存储在分布式存储器中的共享数据，并更新共享历史表的辅助存储器。

10. 发明授权

US08638859B2 Apparatus for decoding residual data based on bit plane and method thereof 失效
标题翻译：用于基于位平面解码残差数据的装置及其方法
公开(公告)号：US08638859B2
公开(公告)日：2014-01-28
申请号：US13226765
申请日：2011-09-07
申请人： Jae-Jin Lee , Kyung Su Kim , Jun Young Lee , Sang Heon Lee , Nak Woong Eum
发明人： Jae-Jin Lee , Kyung Su Kim , Jun Young Lee , Sang Heon Lee , Nak Woong Eum
IPC分类号： H04N7/12 , H04N11/02
CPC分类号： H04N19/436 , H04N19/176 , H04N19/184 , H04N19/44 , H04N19/61 , H04N19/91
摘要： An apparatus for decoding residual data based on a bit plane and a method thereof, capable of achieving a significant reduction in data traffic between a memory and a functional module in a parallel decoding system, include a variable length decoding module configured to generate residual data for each macroblock from a bit stream, divide the residual data into groups, and generate a bit plane regarding each of the groups, and a variable length decoding memory configured to store the bit plane generated from the variable length decoding module and store the residual data of the groups according to a value of the bit plane.
摘要翻译：一种用于解码基于位平面的残差数据的装置及其方法，其能够实现并行解码系统中的存储器与功能模块之间的数据流量的显着降低，包括：可变长度解码模块，被配置为产生残留数据，来自位流的每个宏块将残差数据分成组，并且生成关于每个组的位平面;以及可变长度解码存储器，被配置为存储从可变长度解码模块生成的位平面，并存储该组根据位平面的值。

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