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1. 发明授权

US07584009B2 Multi-chip PWM synchronization and communication 有权
标题翻译：多芯片PWM同步通讯
公开(公告)号：US07584009B2
公开(公告)日：2009-09-01
申请号：US10805593
申请日：2004-03-19
申请人： Jack B. Andersen , Daniel L. W. Chieng , Michael A. Kost , Jan A. Larson
发明人： Jack B. Andersen , Daniel L. W. Chieng , Michael A. Kost , Jan A. Larson
IPC分类号： G06F17/00
CPC分类号： H04L7/02 , H03F1/523 , H03F3/2171 , H03F3/2175 , H03F2200/331 , H03G7/007 , H04L7/005
摘要： Systems and methods for synchronizing multiple digital audio controller chips, wherein one of the chips is designated as a master and the other chips are designated as slaves. A common line connects all of the chips and is used to transmit synchronization signals from the master to the slaves. Each of the chips listens for an appropriate signal and, when the signal is detected, all of the chips simultaneously begin operation. In one embodiment, the synchronization signal comprises a transition on the shared line to an active state. The transition is repeated at fixed intervals and maintained in the active state for a fixed period in order to enable the chips to determine whether synchronization is being maintained. The signal may be sampled and/or filtered to improve reliability. The chips may be able to drive the shared line active to indicate that synchronization has been lost.
摘要翻译：用于同步多个数字音频控制器芯片的系统和方法，其中芯片之一被指定为主机，而其他芯片被指定为从机。一条公共线路连接所有芯片，并用于将同步信号从主机传输到从机。每个芯片侦听适当的信号，并且当检测到信号时，所有芯片同时开始运行。在一个实施例中，同步信号包括在共享线路上的转换到活动状态。以固定的间隔重复该转换，并将其保持在活动状态一段固定的时间段，以便芯片确定是否保持同步。信号可以被采样和/或滤波以提高可靠性。芯片可能能够驱动共享线路活动以指示同步已丢失。

2. 发明授权

US07729790B1 Phase alignment of audio output data in a multi-channel configuration 失效
标题翻译：音频输出数据在多通道配置中的相位对齐
公开(公告)号：US07729790B1
公开(公告)日：2010-06-01
申请号：US10805590
申请日：2004-03-19
申请人： Larry E. Hand , Jack B. Andersen , Daniel L. W. Chieng , Michael A. Kost , Wilson E. Taylor
发明人： Larry E. Hand , Jack B. Andersen , Daniel L. W. Chieng , Michael A. Kost , Wilson E. Taylor
IPC分类号： G06F17/00 , G06F1/04 , H03M7/00
CPC分类号： H03M5/08 , H03F3/217
摘要： Systems and methods for ensuring proper phase alignment of audio signals which are processed by separate hardware channels in an audio amplification system. In one embodiment, the phase alignment is controlled by determining the number of audio data samples which are stored in the input buffers of multiple audio amplification units and controlling reads from the input buffers to minimize the difference between an actual read-write pointer differential and a target differential. In a master unit, the target differential is a predetermined target value corresponding to a desired delay in the buffer. The actual pointer differential of the master unit is passed to one or more slave units. The actual pointer differential of the master unit is used as the target differential of the slave units. The pointer differentials of the slave units are thereby driven to track the pointer differential of the master unit, keeping the units synchronized.
摘要翻译：用于确保音频信号的适当相位对准的系统和方法，其由音频放大系统中的分开的硬件通道处理。在一个实施例中，通过确定存储在多个音频放大单元的输入缓冲器中的音频数据样本的数量来控制相位对准，并且控制来自输入缓冲器的读取以最小化实际读写指针差和目标差异。在主单元中，目标差分是与缓冲器中期望的延迟对应的预定目标值。主单元的实际指针差分传递给一个或多个从单元。主单元的实际指针差异用作从单元的目标差。因此，从属单元的指针差异被驱动以跟踪主单元的指针差，保持单元同步。

3. 发明授权

US07286009B2 Digital PWM amplifier with simulation-based feedback 有权
公开(公告)号：US07286009B2
公开(公告)日：2007-10-23
申请号：US11324132
申请日：2005-12-30
申请人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L. W. Chieng , Larry E. Hand , Wilson E. Taylor
发明人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L. W. Chieng , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/68
CPC分类号： H03F3/217 , H03F1/32 , H03F2200/331
摘要： Systems and methods for performance improvements in digital switching amplifiers using simulation-based feedback. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a simulator configured to model processing of audio signals by the plant. The outputs of the plant and the simulator are provided to a subtractor, the output of which is then added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal for input to the subtractor. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.

4. 发明授权

US07576606B2 Digital PWM amplifier having a low delay corrector 有权
标题翻译：数字PWM放大器具有低延迟校正器
公开(公告)号：US07576606B2
公开(公告)日：2009-08-18
申请号：US11782708
申请日：2007-07-25
申请人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L. W. Chieng , Larry E. Hand , Wilson E. Taylor
发明人： Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L. W. Chieng , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/38
CPC分类号： H03F3/217
摘要： Systems and methods for performance improvements in digital switching amplifiers using a low delay corrector. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a low delay corrector configured to receive signals output by the plant. The output of the low delay corrector is added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.
摘要翻译：使用低延迟校正器的数字开关放大器性能改进的系统和方法。在一个实施例中，数字脉宽调制（PWM）放大器包括被配置为接收和处理输入音频信号的信号处理设备。放大器还包括低延迟校正器，其被配置为接收由工厂输出的信号。低延迟校正器的输出作为反馈被添加到输入音频信号。该设备可以由调制器和电源开关，噪声整形器或任何其它类型的设备组成。可以提供模数转换器（ADC）以将输出音频信号转换为数字信号。可以在ADC之前或之后实现滤波，如果ADC是过采样ADC，则可以在ADC之后放置抽取器。

5. 发明申请

US20070194845A1 Power Supply Feed Forward Analog Input Filter Component Mismatch Correction 有权
标题翻译：电源前馈模拟输入滤波器组件不匹配校正
公开(公告)号：US20070194845A1
公开(公告)日：2007-08-23
申请号：US11672321
申请日：2007-02-07
申请人： Michael A. Kost , Jack B. Andersen , Daniel L. W. Chieng
发明人： Michael A. Kost , Jack B. Andersen , Daniel L. W. Chieng
IPC分类号： H03F3/38
CPC分类号： H03F3/217
摘要： Systems and methods for minimizing errors due to component variation in switching amplifiers utilizing power supply feed forward techniques. One embodiment comprises a digital PWM amplifier having an amplification subsystem for receiving a digital audio signal and producing an analog output signal. The amplifier includes a power supply feed-forward path configured to modify the digital audio signal based on a power supply measurement. The feed-forward path includes an analog filter configured to filter the power supply measurement, as well as correction circuitry configured to correct component mismatch errors introduced by the filter. The power supply measurement may be a power supply difference, a power supply common mode, or both. In either case, the power supply measurement is corrected by multiplying the measurement by an appropriately scaled power supply difference.
摘要翻译：利用电源前馈技术最小化开关放大器中元件变化的误差的系统和方法。一个实施例包括具有用于接收数字音频信号并产生模拟输出信号的放大子系统的数字PWM放大器。放大器包括配置为基于电源测量修改数字音频信号的电源前馈路径。前馈路径包括被配置为滤波电源测量的模拟滤波器以及被配置为校正由滤波器引入的组件失配错误的校正电路。电源测量可以是电源差异，电源共模或两者。在任一情况下，通过将测量乘以适当缩放的电源差异来校正电源测量。

6. 发明授权

US07286010B2 Systems and methods for over-current protection 有权
标题翻译：过流保护的系统和方法
公开(公告)号：US07286010B2
公开(公告)日：2007-10-23
申请号：US11340139
申请日：2006-01-26
申请人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
发明人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/38
CPC分类号： H03F1/52 , H03F3/2173
摘要： Systems and methods for over-current protection in all-digital amplifiers using low-cost current sensing mechanisms. An over-current hard clipping unit receives a digital audio signal, clips the signal according to a clip level, and provides the signal to a modulator. The modulator modulates the signal to produce, e.g., a PWM signal and provides the modulated signal to an output stage which generates an output current to drive a speaker. An over-current sensing unit is compares the output current to a threshold value and generates a binary signal indicating whether the output current exceeds the threshold value. The hard clipping unit receives the binary signal and ramps down the clip level during time periods in which the binary signal indicates that the output current exceeds the threshold. When the binary signal indicates that the output current does not exceed the threshold value, the hard clipping unit ramps up the clip level.
摘要翻译：使用低成本电流检测机制的全数字放大器中的过电流保护系统和方法。过流硬切割单元接收数字音频信号，根据剪辑电平剪辑信号，并将信号提供给调制器。调制器调制信号以产生例如PWM信号，并将调制信号提供给产生输出电流以驱动扬声器的输出级。过流感测单元将输出电流与阈值进行比较，并产生指示输出电流是否超过阈值的二进制信号。在二进制信号指示输出电流超过阈值的时间段期间，硬削波单元接收二进制信号并向下斜降电平。当二进制信号指示输出电流不超过阈值时，硬限幅单元上升剪辑电平。

7. 再颁专利

USRE44525E1 Systems and methods for over-current protection 有权
标题翻译：过流保护的系统和方法
公开(公告)号：USRE44525E1
公开(公告)日：2013-10-08
申请号：US13207232
申请日：2011-08-10
申请人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
发明人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/38
CPC分类号： H03F1/52 , H03F3/2173
摘要： Systems and methods for over-current protection in all-digital amplifiers using low-cost current sensing mechanisms. An over-current hard clipping unit receives a digital audio signal, clips the signal according to a clip level, and provides the signal to a modulator. The modulator modulates the signal to produce, e.g., a PWM signal and provides the modulated signal to an output stage which generates an output current to drive a speaker. An over-current sensing unit is compares the output current to a threshold value and generates a binary signal indicating whether the output current exceeds the threshold value. The hard clipping unit receives the binary signal and ramps down the clip level during time periods in which the binary signal indicates that the output current exceeds the threshold. When the binary signal indicates that the output current does not exceed the threshold value, the hard clipping unit ramps up the clip level.
摘要翻译：使用低成本电流检测机制的全数字放大器中的过电流保护系统和方法。过流硬切割单元接收数字音频信号，根据剪辑电平剪辑信号，并将信号提供给调制器。调制器调制信号以产生例如PWM信号，并将调制信号提供给产生输出电流以驱动扬声器的输出级。过流感测单元将输出电流与阈值进行比较，并产生指示输出电流是否超过阈值的二进制信号。在二进制信号指示输出电流超过阈值的时间段期间，硬削波单元接收二进制信号并向下斜降电平。当二进制信号指示输出电流不超过阈值时，硬限幅单元上升剪辑电平。

8. 发明授权

US07518444B2 PWM feedback/feed-forward protection 有权
标题翻译： PWM反馈/前馈保护
公开(公告)号：US07518444B2
公开(公告)日：2009-04-14
申请号：US11672191
申请日：2007-02-07
申请人： Jack B. Andersen , Peter G. Craven , Daniel L. W. Chieng , Michael A. Kost
发明人： Jack B. Andersen , Peter G. Craven , Daniel L. W. Chieng , Michael A. Kost
IPC分类号： H03F3/38
CPC分类号： H03F3/2171 , H03F1/32 , H03F1/52 , H03F1/523 , H03F3/2175 , H03F2200/03 , H03F2200/153 , H03F2200/351
摘要： Systems and methods for improving the stability of feedback and/or feed-forward subsystems in digital amplifiers. One embodiment comprises a digital pulse width modulation (PWM) controller. The controller includes an input for receiving a digital audio input signal and is configured to generate a PWM output signal based on the input signal at an output. The controller also has control inputs for receiving external audio correction signals such as feedback and power supply feed-forward signals. The controller has correction circuitry for processing the received external control signals and modifying the input signal based on these signals. Fault detectors monitor fault conditions at various locations within the correction circuitry, and a protection control unit receives fault signals from the fault detectors and modifies operation of the controller in response to the fault signals.
摘要翻译：用于提高数字放大器中反馈和/或前馈子系统稳定性的系统和方法。一个实施例包括数字脉宽调制（PWM）控制器。控制器包括用于接收数字音频输入信号的输入端，并且被配置为基于输出端的输入信号产生PWM输出信号。控制器还具有用于接收外部音频校正信号（如反馈和电源前馈信号）的控制输入。该控制器具有校正电路，用于处理所接收的外部控制信号，并根据这些信号修改输入信号。故障检测器监视校正电路内的各个位置的故障状况，保护控制单元从故障检测器接收故障信号，并根据故障信号修改控制器的操作。

9. 发明授权

US07482865B2 Systems and methods for correcting errors resulting from component mismatch in a feedback path 有权
标题翻译：用于校正由反馈路径中的组件不匹配引起的错误的系统和方法
公开(公告)号：US07482865B2
公开(公告)日：2009-01-27
申请号：US11672331
申请日：2007-02-07
申请人： Michael A. Kost , Jack B. Andersen , Daniel L. W. Chieng
发明人： Michael A. Kost , Jack B. Andersen , Daniel L. W. Chieng
IPC分类号： H03F3/38
CPC分类号： H03F3/2173 , H03F1/30 , H03F1/34 , H03F2200/03 , H03F2200/351
摘要： Systems and methods for minimizing performance degradation due to component mismatch in the feedback path of a digital PWM amplifier feedback loop. One embodiment comprises a digital pulse width modulated (PWM) amplifier with feedback. The amplification subsystem receives a digital audio signal and produces an analog output signal. The feedback loop produces a feedback signal based on the filtered analog output signal and modifies the digital audio signal based on the feedback signal. The feedback loop includes a filter configured to filter the analog output signal and correction circuitry configured to correct component mismatch errors introduced by the filter. In one embodiment, the correction circuitry receives a measurement of a power supply voltage, multiplies the measured voltage by a gain and adds the scaled measurement to the feedback signal to correct for the component mismatch errors.
摘要翻译：用于使数字PWM放大器反馈回路的反馈路径中的组件不匹配导致性能下降最小化的系统和方法。一个实施例包括具有反馈的数字脉宽调制（PWM）放大器。放大子系统接收数字音频信号并产生模拟输出信号。反馈回路基于滤波的模拟输出信号产生反馈信号，并且基于反馈信号修改数字音频信号。反馈回路包括被配置为过滤模拟输出信号的滤波器和被配置为校正由滤波器引入的元件失配误差的校正电路。在一个实施例中，校正电路接收电源电压的测量，将测量的电压乘以增益，并将缩放的测量值加到反馈信号上，以校正组件失配误差。

10. 发明授权

US07812666B2 Low delay corrector 有权
标题翻译：低延迟校正器
公开(公告)号：US07812666B2
公开(公告)日：2010-10-12
申请号：US12542634
申请日：2009-08-17
申请人： Daniel L. W. Chieng , Peter G. Craven , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
发明人： Daniel L. W. Chieng , Peter G. Craven , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/68
CPC分类号： H03F3/217
摘要： A low delay corrector (LDC) unit includes a non-linear function generator and a filter. The nonlinear function generator receives a first signal and outputs a second signal in dependence on the first signal and a transfer function of the nonlinear function generator. The filter is fed in dependence on the second signal output by the nonlinear function generator. The first signal received by the nonlinear function generator is derived in dependence on an input signal provided to an input of the LDC unit and an output of the filter. An output of the LDC unit is derived in dependence on the first signal received by the nonlinear function generator and the second signal output by the nonlinear function generator.
摘要翻译：低延迟校正器（LDC）单元包括非线性函数发生器和滤波器。非线性函数发生器接收第一信号并根据第一信号和非线性函数发生器的传递函数输出第二信号。滤波器根据由非线性函数发生器输出的第二信号进给。根据提供给LDC单元的输入的输入信号和滤波器的输出，导出由非线性函数发生器接收到的第一信号。根据由非线性函数发生器接收到的第一信号和由非线性函数发生器输出的第二信号，导出LDC单元的输出。

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