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    • 2. 发明申请
    • Radio signal analysis
    • 无线电信号分析
    • US20080171517A1
    • 2008-07-17
    • US11648849
    • 2006-12-29
    • Isaac AliDavid Albert SawyerNick Cowley
    • Isaac AliDavid Albert SawyerNick Cowley
    • G01S7/40H04B17/00
    • H04B17/21H04B17/0085H04B17/29
    • In some embodiments, a radio transmitter assembly comprises a test signal generator module to generate a first instance of a test signal, the test signal comprising a code, a test signal receiver module which receives the code, a signal combiner to combine the first instance of the test signal with a real signal to create a combined signal, a radio signal generator to generate a radio signal from the combined signal, a signal separator to separate a second instance of the test signal from the radio signal, and comparator logic in the test signal receiver module to compare the code with a code embedded in the second instance of the test signal in the test signal receiver module.
    • 在一些实施例中,无线电发射器组件包括测试信号发生器模块以产生测试信号的第一实例,测试信号包括代码,接收代码的测试信号接收器模块,组合信号的第一实例 具有实信号的测试信号以产生组合信号,无线电信号发生器从组合信号产生无线电信号,信号分离器将测试信号的第二个实例与无线电信号分开,以及测试中的比较器逻辑 信号接收器模块,用于将代码与嵌入在测试信号接收器模块中的测试信号的第二实例中的代码进行比较。
    • 5. 发明授权
    • Pulse generator, optical disk writer and tuner
    • 脉冲发生器,光盘刻录机和调谐器
    • US07327179B2
    • 2008-02-05
    • US11466242
    • 2006-08-22
    • David Albert SawyerNicholas Paul CowleyIsaac Ali
    • David Albert SawyerNicholas Paul CowleyIsaac Ali
    • G06F1/04
    • H03K5/135H03K5/133H03K5/15H03K5/1565H03K2005/00286H03L7/18
    • A pulse generator is provided for generating pulses with a selectable variable width and/or delay. The pulse generator comprises an oscillator and a selecting arrangement for selecting how many of a first group of delay elements are connected in series for delaying the oscillator signal. Identical delay elements are connected in series to form a second group. A measuring circuit repeatedly measures the delay provided by the second group, for example providing output pulses whose width or duration is equal to the delay. A reference pulse generator generates a series of reference pulses, each of which is a predetermined fraction of the oscillator period. A control circuit compares the measurement and reference pulses to generate an error signal that is fed back to timing delay control inputs of all the delay elements such that the widths of the measurement and reference pulses are made substantially equal to each other.
    • 提供脉冲发生器用于产生具有可选择的可变宽度和/或延迟的脉冲。 脉冲发生器包括振荡器和选择装置,用于选择串联连接多少第一组延迟元件以延迟振荡器信号。 相同的延迟元件串联连接以形成第二组。 测量电路重复测量由第二组提供的延迟,例如提供其宽度或持续时间等于延迟的输出脉冲。 参考脉冲发生器产生一系列参考脉冲,每个参考脉冲是振荡器周期的预定分数。 控制电路比较测量和参考脉冲以产生反馈到所有延迟元件的定时延迟控制输入的误差信号,使得测量和参考脉冲的宽度彼此基本相等。
    • 7. 发明授权
    • Variable signal delaying circuit, quadrature frequency converter and radio frequency tuner
    • 可变信号延迟电路,正交变频器和射频调谐器
    • US07606332B2
    • 2009-10-20
    • US11423015
    • 2006-06-08
    • Ali IsaacNicholas Paul CowleyDavid Albert Sawyer
    • Ali IsaacNicholas Paul CowleyDavid Albert Sawyer
    • H04L27/22H04L27/14
    • H03L7/0812H03D7/165
    • A variable signal delaying circuit comprising an analog delay line having a control input for controlling the variable delay. A phase detector compares the input and output signals of the delaying circuit and supplies an output signal to a charge pump and integrator. A pulse stream generating arrangement produces pulse streams of different pulse widths and pulse control logic controls a selector for selecting any one of the pulse streams. In a first mode of operation, the control logic monitors the charge pump/filter output and selects the pulse stream which minimizes change in the output. The selection is fixed and the output of the charge pump/filter is then supplied as a correction signal to the control input of the analog delay line. Such an arrangement may be used to maintain minimum phase imbalance in I and Q signal paths of a quadrature frequency converter.
    • 一种可变信号延迟电路,包括具有用于控制可变延迟的控制输入的模拟延迟线。 相位检测器比较延迟电路的输入和输出信号,并将输出信号提供给电荷泵和积分器。 脉冲流产生装置产生不同脉冲宽度的脉冲流,并且脉冲控制逻辑控制用于选择脉冲流中的任何一个的选择器。 在第一操作模式中,控制逻辑监视电荷泵/滤波器输出,并选择最小化输出变化的脉冲流。 选择是固定的,然后将电荷泵/滤波器的输出作为校正信号提供给模拟延迟线的控制输入。 这种布置可用于维持正交变频器的I和Q信号路径中的最小相位不平衡。