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1. 发明申请

US20170093270A1 LOW RIPPLE MECHANISM OF MODE CHANGE IN SWITCHED CAPACITOR VOLTAGE REGULATORS 有权
公开(公告)号：US20170093270A1
公开(公告)日：2017-03-30
申请号：US14866662
申请日：2015-09-25
申请人： Intel Corporation
发明人： George E. Matthew , Rinkle Jain , Vaibhav Vaidya
IPC分类号： H02M1/088 , G06F1/26
CPC分类号： G06F1/28 , G05F1/10 , G05F1/32 , G05F1/40 , G05F3/08 , G06F1/26 , G06F1/305 , H02M1/088 , H02M3/07 , H02M3/156 , H02M2001/0003
摘要： Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.

2. 发明授权

US11757357B2 Hybrid digital linear and switched capacitor voltage regulator 有权
公开(公告)号：US11757357B2
公开(公告)日：2023-09-12
申请号：US17714969
申请日：2022-04-06
申请人： Intel Corporation
发明人： Takao Oshita , Fabrice Paillet , Rinkle Jain , Jad Rizk , Danny Bronstein , Ahmad Arnaot
IPC分类号： H02M3/07 , G06F1/3234 , H03K5/24 , H02M1/00
CPC分类号： H02M3/073 , G06F1/3234 , H02M1/00 , H02M3/07 , H02M3/072 , H03K5/249 , H02M1/0012 , H02M1/0045 , H02M3/077
摘要： An on-die voltage regulator (VR) is provided that can deliver much higher conversion efficiency than the traditional solution (e.g., FIVR, LDO) during the standby mode of a system-on-chip (SOC), and it can save the power consumption significantly, during the connected standby mode. The VR operates as a switched capacitor VR under the low load current condition that is common during the standby mode of the SOC, while it automatically switches to the digital linear VR operation to handle a sudden high load current condition at the exit from the standby condition. A digital proportional-integral-derivative (PID) controller or a digital proportional-derivative-averaging (PDA) controller is used to achieve a very low power operation with stability and robustness. As such, the hybrid VR achieves much higher conversion efficiency than the linear voltage regulator (LVR) for low load current condition (e.g., lower than 500 mA).

3. 发明申请

US20210075316A1 HYBRID DIGITAL LINEAR AND SWITCHED CAPACITOR VOLTAGE REGULATOR 有权
公开(公告)号：US20210075316A1
公开(公告)日：2021-03-11
申请号：US16563495
申请日：2019-09-06
申请人： Intel Corporation
发明人： Takao Oshita , Fabrice Paillet , Rinkle Jain , Jad Rizk , Danny Bronstein , Ahmad Arnaot
IPC分类号： H02M3/07 , H02M1/00 , H03K5/24 , G06F1/3234
摘要： An on-die voltage regulator (VR) is provided that can deliver much higher conversion efficiency than the traditional solution (e.g., FIVR, LDO) during the standby mode of a system-on-chip (SOC), and it can save the power consumption significantly, during the connected standby mode. The VR operates as a switched capacitor VR under the low load current condition that is common during the standby mode of the SOC, while it automatically switches to the digital linear VR operation to handle a sudden high load current condition at the exit from the standby condition. A digital proportional-integral-derivative (PID) controller or a digital proportional-derivative-averaging (PDA) controller is used to achieve a very low power operation with stability and robustness. As such, the hybrid VR achieves much higher conversion efficiency than the linear voltage regulator (LVR) for low load current condition (e.g., lower than 500 mA).

4. 发明授权

US12095712B2 Wireless communication within a control plane and a data plane 有权
公开(公告)号：US12095712B2
公开(公告)日：2024-09-17
申请号：US17131862
申请日：2020-12-23
申请人： Intel Corporation
发明人： Brent R. Carlton , Asma Beevi Kuriparambil Thekkumpate , Renzhi Liu , Rinkle Jain
IPC分类号： H04L5/14 , H04B1/44 , H04L25/02 , H04L25/03 , H04W52/02 , H04W74/00 , H04W74/0808
CPC分类号： H04L5/1461 , H04B1/44 , H04L5/143 , H04L25/03834 , H04W52/0235 , H04W74/008
摘要： A transceiver may include a transmitter device, a receiver device, a secondary receiver device, and switching elements. The transmitter device may provide a transmit control signal on first and second channels. The receiver device may receive a receive control signal on the first and second channels. The secondary receiver device may monitor occupation of the first and second channels without decoding at least a portion of control signals concurrent with the receiver device receiving the receive control signal. The switching elements may control when the transmitter device provides the transmit control signal to one of and is electrically isolated from first and second antennas, the receiver device receives the receive control signal from one of and is electrically isolated from the first and second antennas, and the secondary receiver device monitors occupation of one of the first and second channels and is electrically isolated from the first and second antennas.

5. 发明授权

US11921529B2 Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators 有权
公开(公告)号：US11921529B2
公开(公告)日：2024-03-05
申请号：US16914174
申请日：2020-06-26
申请人： Intel Corporation
发明人： Yi-Chun Shih , Kaushik Mazumdar , Stephen T. Kim , Rinkle Jain , James W. Tschanz , Muhammad M. Khellah
IPC分类号： G05F1/46 , G05F1/56 , G05F1/563 , H02M3/15 , G05F1/00 , H02M3/156
CPC分类号： G05F1/563 , G05F1/46 , G05F1/00 , H02M3/156
摘要： Described is an apparatus which comprises: a plurality of transistors coupled to an input power supply and to a load; a first comparator with a first node coupled to the load, and a second node coupled to a first reference; a second comparator with a first node coupled to the load, and a second node coupled to a second reference, the second reference being different from the first reference; and a logic unit to receive output of the first comparator and output of the second comparator, the logic unit to turn on or off transistors of the plurality of transistors according to outputs of the first and second comparators.

6. 发明申请

US20220239222A1 HYBRID DIGITAL LINEAR AND SWITCHED CAPACITOR VOLTAGE REGULATOR 有权
公开(公告)号：US20220239222A1
公开(公告)日：2022-07-28
申请号：US17714969
申请日：2022-04-06
申请人： Intel Corporation
发明人： Takao Oshita , Fabrice Paillet , Rinkle Jain , Jad Rizk , Danny Bronstein , Ahmad Arnaot
IPC分类号： H02M3/07 , H02M1/00 , G06F1/3234 , H03K5/24
摘要： An on-die voltage regulator (VR) is provided that can deliver much higher conversion efficiency than the traditional solution (e.g., FIVR, LDO) during the standby mode of a system-on-chip (SOC), and it can save the power consumption significantly, during the connected standby mode. The VR operates as a switched capacitor VR under the low load current condition that is common during the standby mode of the SOC, while it automatically switches to the digital linear VR operation to handle a sudden high load current condition at the exit from the standby condition. A digital proportional-integral-derivative (PID) controller or a digital proportional-derivative-averaging (PDA) controller is used to achieve a very low power operation with stability and robustness. As such, the hybrid VR achieves much higher conversion efficiency than the linear voltage regulator (LVR) for low load current condition (e.g., lower than 500 mA).

7. 发明授权

US09958922B2 Low ripple mechanism of mode change in switched capacitor voltage regulators 有权
公开(公告)号：US09958922B2
公开(公告)日：2018-05-01
申请号：US15589656
申请日：2017-05-08
申请人： Intel Corporation
发明人： George E. Matthew , Rinkle Jain , Vaibhav Vaidya
IPC分类号： H02M3/07 , G06F1/28 , H02M3/156 , G05F1/40 , G06F1/26 , G05F1/10 , G05F3/08 , G05F1/32
CPC分类号： G06F1/28 , G05F1/10 , G05F1/32 , G05F1/40 , G05F3/08 , G06F1/26 , G06F1/305 , H02M1/088 , H02M3/07 , H02M3/156 , H02M2001/0003
摘要： Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.

8. 发明申请

US20170242468A1 LOW RIPPLE MECHANISM OF MODE CHANGE IN SWITCHED CAPACITOR VOLTAGE REGULATORS 审中-公开
公开(公告)号：US20170242468A1
公开(公告)日：2017-08-24
申请号：US15589656
申请日：2017-05-08
申请人： Intel Corporation
发明人： George E. Matthew , Rinkle Jain , Vaibhav Vaidya
IPC分类号： G06F1/28 , G05F1/40 , G05F1/32 , G05F1/10 , H02M3/07 , G05F3/08 , H02M3/156 , G06F1/26
CPC分类号： G06F1/28 , G05F1/10 , G05F1/32 , G05F1/40 , G05F3/08 , G06F1/26 , G06F1/305 , H02M1/088 , H02M3/07 , H02M3/156 , H02M2001/0003
摘要： Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.

9. 发明授权

US09680363B2 Low ripple mechanism of mode change in switched capacitor voltage regulators 有权
公开(公告)号：US09680363B2
公开(公告)日：2017-06-13
申请号：US14866662
申请日：2015-09-25
申请人： Intel Corporation
发明人： George E. Matthew , Rinkle Jain , Vaibhav Vaidya
IPC分类号： H02M1/088 , G06F1/26 , H02M1/00
CPC分类号： G06F1/28 , G05F1/10 , G05F1/32 , G05F1/40 , G05F3/08 , G06F1/26 , G06F1/305 , H02M1/088 , H02M3/07 , H02M3/156 , H02M2001/0003
摘要： Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.

10. 发明申请

US20160231761A1 LOW DROPOUT REGULATOR WITH HYSTERETIC CONTROL 审中-公开
标题翻译：具有滞后控制的低压差调节器
公开(公告)号：US20160231761A1
公开(公告)日：2016-08-11
申请号：US15133177
申请日：2016-04-19
申请人： Intel Corporation
发明人： Rinkle Jain , Yi-Chun Shih , Vaibhav Vaidya
IPC分类号： G05F1/56
CPC分类号： G05F1/56 , G05F1/565
摘要： Described is an apparatus comprising: an output stage having an input supply node to receive an input power supply and an output node to provide an output supply to a load; an amplifier to control current strength of the output stage according to the output supply and a reference voltage; and a hysteresis unit to monitor the output supply and operable to control the current strength of the output stage according to a voltage level of the output supply. Described is another apparatus which comprises: a plurality of charge pumps to adjust current strength of the output stage; and a logic unit to monitor the output supply and operable to control the plurality of charge pumps according to a voltage level of the output supply and one or more reference voltages.
摘要翻译：描述了一种装置，包括：输出级，其具有用于接收输入电源的输入电源节点和向负载提供输出电源的输出节点; 放大器，用于根据输出电源和参考电压来控制输出级的电流强度; 以及滞后单元，用于监视输出电源并且可操作以根据输出电源的电压电平来控制输出级的电流强度。描述了另一种装置，其包括：多个电荷泵，用于调节输出级的电流强度; 以及逻辑单元，用于监视输出电源并可操作以根据输出电源的电压电平和一个或多个参考电压来控制多个电荷泵。

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