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1. 发明公开

US20240012951A1 ENABLING SECURE COMMUNICATION VIA ATTESTATION OF MULTI-TENANT CONFIGURATION ON ACCELERATOR DEVICES 审中-公开
公开(公告)号：US20240012951A1
公开(公告)日：2024-01-11
申请号：US18474661
申请日：2023-09-26
申请人： Intel Corporation
发明人： Alpa Trivedi , Steffen Schulz , Patrick Koeberl
IPC分类号： G06F21/85 , G06F30/398 , G06N3/04 , H04L9/08 , G06F9/30 , G06F9/50 , G06F15/177 , G06F15/78 , H04L9/40 , G06F11/07 , G06F30/331 , G06F9/38 , G06F11/30
CPC分类号： G06F21/85 , G06F30/398 , G06N3/04 , H04L9/0877 , G06F9/30101 , G06F9/505 , G06F15/177 , G06F15/7825 , H04L63/0442 , H04L63/12 , H04L63/20 , G06F11/0709 , G06F11/0751 , G06F11/0793 , G06F30/331 , G06F9/3877 , G06F15/7867 , G06F11/0754 , G06F11/3058 , G06F2119/12
摘要： An apparatus to facilitate enabling secure communication via attestation of multi-tenant configuration on accelerator devices is disclosed. The apparatus includes a processor to: verify a base bitstream of an accelerator device, the base bitstream published by a cloud service provider (CSP); generate a partial reconfiguration (PR) bitstream based on the base bitstream, the PR bitstream to fit within at least one PR region of PR boundary setups of the accelerator device; inspect accelerator device attestation received from a secure device manager (SDM) of the accelerator device; and responsive to successful inspection of the accelerator device attestation, provide the PR bitstream to the CSP for PR reconfiguration of the accelerator device.

2. 发明申请

US20220006459A1 Circuits And Methods For Supply Voltage Detection And Timing Monitoring 有权
公开(公告)号：US20220006459A1
公开(公告)日：2022-01-06
申请号：US17479963
申请日：2021-09-20
申请人： Intel Corporation
发明人： Miguel Bautista Gabriel , Sriram Vangal , Patrick Koeberl , Pratik Patel , Muhammad Khellah , James Tschanz , Carlos Tokunaga , Suyoung Bang
IPC分类号： H03K19/17768 , H03K19/17784 , H03K19/0185 , H03K19/0175 , G01R31/28
摘要： A detection circuit includes a tunable delay circuit that generates a delayed signal and that receives a supply voltage. The detection circuit includes a control circuit that adjusts a delay provided by the tunable delay circuit to the delayed signal. The detection circuit includes a time-to-digital converter circuit that converts the delay provided by the tunable delay circuit to the delayed signal to a digital code and adjusts the digital code based on changes in the supply voltage. The control circuit causes the tunable delay circuit to maintain the delay provided to the delayed signal constant in response to the digital code reaching an alignment value. The detection circuit may continuously monitor timing margin of a data signal relative to a clock signal and update the digital code in every clock cycle. The detection circuit may be a security sensor that detects changes in the supply voltage.

3. 发明申请

US20210117268A1 RUNTIME FAULT DETECTION, FAULT LOCATION, AND CIRCUIT RECOVERY IN AN ACCELERATOR DEVICE 有权
公开(公告)号：US20210117268A1
公开(公告)日：2021-04-22
申请号：US17132221
申请日：2020-12-23
申请人： Intel Corporation
发明人： Patrick Koeberl , Scott Weber , Alpa Trivedi , Steffen Schulz , Sriram Vangal
IPC分类号： G06F11/07 , G06N20/00 , G06F21/71
摘要： An apparatus to facilitate runtime fault detection, fault location, and circuit recovery in an accelerator device is disclosed. In one implementation, the accelerator device comprises a sensor network comprising a plurality of sensors; a secure device manager (SDM); and a sensor aggregator communicably coupled to the sensor network and the SDM. In one implementation, the sensor aggregator can receive sensor data from the sensor network; analyze the sensor data to detect a fault condition; determine a spatial location of the fault condition based on the sensor data; and generate an event for the SDM to cause the SDM to mitigate the fault condition.

4. 发明申请

US20210110069A1 ENABLING SECURE STATE-CLEAN DURING CONFIGURATION OF PARTIAL RECONFIGURATION BITSTREAMS ON FPGA 有权
公开(公告)号：US20210110069A1
公开(公告)日：2021-04-15
申请号：US17129250
申请日：2020-12-21
申请人： Intel Corporation
发明人： Alpa Trivedi , Scott Weber , Steffen Schulz , Patrick Koeberl
IPC分类号： G06F21/76 , G06F21/57 , G06F21/53 , G06F21/30
摘要： An apparatus to facilitate enabling secure state-clean during configuration of partial reconfiguration bitstreams on accelerator devices is disclosed. The apparatus includes a security engine to receive an incoming partial reconfiguration (PR) bitstream corresponding to a new PR persona to configure a region of the apparatus; perform, as part of a PR configuration sequence for the new PR persona, a first clear operation to clear previously-set persona configuration bits in the region; perform, as part of the PR configuration sequence subsequent to the first clear operation, a set operation to set new persona configuration bits in the region; and perform, as part of the PR configuration sequence, a second clear operation to clear memory blocks of the region that became unfrozen subsequent to the set operation, the second clear operation performed using a persona-dependent mask corresponding to the new PR persona.

5. 发明申请

US20210109889A1 TRANSPARENT NETWORK ACCESS CONTROL FOR SPATIAL ACCELERATOR DEVICE MULTI-TENANCY 有权
公开(公告)号：US20210109889A1
公开(公告)日：2021-04-15
申请号：US17129254
申请日：2020-12-21
申请人： Intel Corporation
发明人： Steffen Schulz , Alpa Trivedi , Patrick Koeberl
IPC分类号： G06F15/78 , G06F15/177 , G06F21/85 , G06F9/30 , G06F9/50
摘要： An apparatus to facilitate transparent network access controls for spatial accelerator device multi-tenancy is disclosed. The apparatus includes a secure device manager (SDM) to: establish a network-on-chip (NoC) communication path in the apparatus, the NoC communication path comprising a plurality of NoC nodes for ingress and egress of communications on the NoC communication path; for each NoC node of the NoC communication path, configure a programmable register of the NoC node to indicate a node group that the NoC node is assigned, the node group corresponding to a persona configured on the apparatus; determine whether a prefix of received data at the NoC node matches the node group indicated by the programmable register of the NoC; and responsive to determining that the prefix does not match the node group, discard the data from the NoC node.

6. 发明申请

US20180157603A1 DYNAMIC CONFIGURATION AND PERIPHERAL ACCESS IN A PROCESSOR 审中-公开
公开(公告)号：US20180157603A1
公开(公告)日：2018-06-07
申请号：US15651886
申请日：2017-07-17
申请人： Intel Corporation
发明人： Steffen Schulz , Patrick Koeberl
IPC分类号： G06F12/14 , G06F11/30 , G06F11/07
摘要： In various implementations, a system includes a memory, a processor, and an execution-aware memory protection unit (EA-MPU). The EA-MPU is configured to regulate memory access by the processor based at least on the identity of a subject executable that requests access, and on the address to which access is requested, and on permissions information that identifies which subject executables are to be granted access to each of several memory regions. In various implementations, the permissions information itself is stored among the several memory regions. Various configurations of the permissions information can be used to provide shared memory regions for communication among two or more stand-alone trusted software modules, to protect access to devices accessible through memory-mapped I/O (MMIO), to implement a flexible watchdog timer, to provide security for software updates, to provide dynamic root of trust measurement services, and/or to support an operating system.

7. 发明申请

US20160283402A1 Dynamic Configuration and Peripheral Access in a Processor 有权
标题翻译：处理器中的动态配置和外设访问
公开(公告)号：US20160283402A1
公开(公告)日：2016-09-29
申请号：US14666087
申请日：2015-03-23
申请人： Intel Corporation
发明人： Steffen Schulz , Patrick Koeberl
IPC分类号： G06F12/14 , G06F11/07 , G06F11/30
CPC分类号： G06F12/145 , G06F11/073 , G06F11/0757 , G06F11/3034 , G06F11/3037 , G06F12/1483 , G06F21/00 , G06F2212/1052
摘要： In various implementations, a system includes a memory, a processor, and an execution-aware memory protection unit (EA-MPU). The EA-MPU is configured to regulate memory access by the processor based at least on the identity of a subject executable that requests access, and on the address to which access is requested, and on permissions information that identifies which subject executables are to be granted access to each of several memory regions. In various implementations, the permissions information itself is stored among the several memory regions. Various configurations of the permissions information can be used to provide shared memory regions for communication among two or more stand-alone trusted software modules, to protect access to devices accessible through memory-mapped I/O (MMIO), to implement a flexible watchdog timer, to provide security for software updates, to provide dynamic root of trust measurement services, and/or to support an operating system.
摘要翻译：在各种实现中，系统包括存储器，处理器和执行感知存储器保护单元（EA-MPU）。 EA-MPU被配置为基于至少基于请求访问的主体可执行文件的身份以及请求访问的地址以及用于识别要授予哪个主体可执行文件的许可信息来调节处理器的存储器访问访问几个内存区域中的每一个。在各种实现中，权限信息本身存储在几个存储区域中。可以使用许可信息的各种配置来提供用于在两个或更多个独立的可信软件模块之间进行通信的共享存储器区域，以保护对通过存储器映射I / O（MMIO）可访问的设备的访问，以实现灵活的看门狗定时器为软件更新提供安全性，提供信任度量服务的动态根，和/或支持操作系统。

8. 发明申请

US20150189509A1 APPARATUS, SYSTEM AND METHOD OF PROTECTING DOMAINS OF A MULTIMODE WIRELESS RADIO TRANSCEIVER 有权
标题翻译：多模无线无线电收发器保护域的装置，系统及方法
公开(公告)号：US20150189509A1
公开(公告)日：2015-07-02
申请号：US14141477
申请日：2013-12-27
申请人： Intel Corporation
发明人： Farhana Asrar Sheikh , Patrick Koeberl , Jesse Walker , Hossein Alavi , Men Long , Ram Kumar Krishnamurthy , Alpa T. Narendra Trivedi
IPC分类号： H04W12/08 , H04L29/06 , H04W24/04 , H04W88/06
CPC分类号： H04W12/08 , H04L63/10 , H04L67/025 , H04L67/04 , H04W24/04 , H04W88/06
摘要： Some demonstrative embodiments include apparatuses, systems and/or methods of protecting domains of a multimode wireless radio transceiver. For example, an apparatus may include a protection domain controller (PDC) to restrict access of a configuration software to a protection domain of a plurality of protection domains of a multimode wireless radio transceiver based on a security level of the configuration software, wherein the protection domain includes one or more radio configuration parameters of the multimode wireless radio transceiver.
摘要翻译：一些演示实施例包括保护多模无线电收发机的域的设备，系统和/或方法。例如，设备可以包括保护域控制器（PDC），其基于配置软件的安全级别来限制配置软件到多模无线无线电收发器的多个保护域的保护域的访问，其中保护域包括多模无线收发器的一个或多个无线电配置参数。

9. 发明授权

US09048834B2 Grouping of physically unclonable functions 有权
标题翻译：分组身体不可克隆的功能
公开(公告)号：US09048834B2
公开(公告)日：2015-06-02
申请号：US13997268
申请日：2013-01-16
申请人： Intel Corporation
发明人： Jiangtao Li , Patrick Koeberl , Sanu K. Mathew , Wei Wu
IPC分类号： H03K19/00 , H03K19/003 , G06F1/26 , H03K19/177
CPC分类号： H03K19/17768 , G06F21/72 , H04L9/3247 , H04L9/3278
摘要： A physically unclonable function (PUF) includes a plurality of PUF elements to generate an N-bit PUF signature. For each bit in the N-bit PUF signature, a PUF group of K number of individual PUF elements indicating a single-bit PUF value is used to generate a group bit. The group bits are more repeatable than the individual PUF elements. The value K may be selected such that (K+1)/2 is an odd number.
摘要翻译：物理上不可克隆的功能（PUF）包括多个PUF元件以产生N位PUF签名。对于N位PUF签名中的每个比特，使用指示单位PUF值的K个个体PUF元素的PUF组来生成组比特。组位比PUF单个元件更可重复。可以选择值K使得（K + 1）/ 2是奇数。

10. 发明公开

US20240314213A1 PROGRAMMABLE INTEGRATED CIRCUIT CONFIGURED AS A REMOTE TRUST ANCHOR TO SUPPORT MULTITENANCY 审中-公开
公开(公告)号：US20240314213A1
公开(公告)日：2024-09-19
申请号：US18410707
申请日：2024-01-11
申请人： Intel Corporation
发明人： Steffen Schulz , Patrick Koeberl , Alpa Narendra Trivedi , Scott Weber
IPC分类号： H04L67/51 , H04L9/40 , H04L67/00
CPC分类号： H04L67/51 , H04L63/08 , H04L67/00
摘要： A multitenancy system that includes a host provider, a programmable device, and multiple tenants is provided. The host provider may publish a multitenancy mode sharing and allocation policy that includes a list of terms to which the programmable device and tenants can adhere. The programmable device may include a secure device manager configured to operate in a multitenancy mode to load a tenant persona into a given partial reconfiguration (PR) sandbox region on the programmable device. The secure device manager may be used to enforce spatial isolation between different PR sandbox regions and temporal isolation between successive tenants in one PR sandbox region.

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