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    • 6. 发明申请
    • Semiconductor Arrangement with a Load, a Sense and a Start-Up Transistor
    • 具有负载,感应和启动晶体管的半导体布置
    • US20140070323A1
    • 2014-03-13
    • US13774492
    • 2013-02-22
    • Infineon Technologies AG
    • Armin WillmerothMarc Fahlenkamp
    • H01L27/088
    • H01L27/088H02M1/36
    • A semiconductor arrangement includes a semiconductor body with a first active region, a second active region and an isolation region arranged between the first and the second active regions. At least one source region and at least one body region of a first transistor are integrated in the first active region. At least one source region and at least one body region of a second transistor are integrated in the second active region. Source and body regions of a third transistor are integrated in the second active region. The second transistor and the third transistor have a common source electrode. The first transistor, the second transistor and the third transistor have a common drain electrode.
    • 半导体装置包括具有第一有源区的半导体本体,第二有源区和布置在第一和第二有源区之间的隔离区。 第一晶体管的至少一个源极区域和至少一个体区域集成在第一有源区域中。 第二晶体管的至少一个源极区域和至少一个体区域集成在第二有源区域中。 第三晶体管的源极和体区集成在第二有源区中。 第二晶体管和第三晶体管具有公共源电极。 第一晶体管,第二晶体管和第三晶体管具有公共漏电极。
    • 8. 发明授权
    • Semiconductor arrangement with a load, a sense and a start-up transistor
    • 具有负载,感测和启动晶体管的半导体装置
    • US09385119B2
    • 2016-07-05
    • US13774492
    • 2013-02-22
    • Infineon Technologies AG
    • Armin WillmerothMarc Fahlenkamp
    • H01L27/088H02M1/36
    • H01L27/088H02M1/36
    • A semiconductor arrangement includes a semiconductor body with a first active region, a second active region and an isolation region arranged between the first and the second active regions. At least one source region and at least one body region of a first transistor are integrated in the first active region. At least one source region and at least one body region of a second transistor are integrated in the second active region. Source and body regions of a third transistor are integrated in the second active region. The second transistor and the third transistor have a common source electrode. The first transistor, the second transistor and the third transistor have a common drain electrode.
    • 半导体装置包括具有第一有源区的半导体本体,第二有源区和布置在第一和第二有源区之间的隔离区。 第一晶体管的至少一个源极区域和至少一个体区域集成在第一有源区域中。 第二晶体管的至少一个源极区域和至少一个体区域集成在第二有源区域中。 第三晶体管的源极和体区集成在第二有源区中。 第二晶体管和第三晶体管具有公共源电极。 第一晶体管,第二晶体管和第三晶体管具有公共漏电极。