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1. 发明申请

US20140325247A1 CONTROLLING POWER AND PERFORMANCE IN A SYSTEM AGENT OF A PROCESSOR 有权
标题翻译：控制处理器系统代理的功率和性能
公开(公告)号：US20140325247A1
公开(公告)日：2014-10-30
申请号：US13870195
申请日：2013-04-25
申请人： Inder Sodhi , Sanjeev Jahagirdar , Ryan Wells , Zeev Offen , Shalini Sharma , Ken Drottar
发明人： Inder Sodhi , Sanjeev Jahagirdar , Ryan Wells , Zeev Offen , Shalini Sharma , Ken Drottar
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F1/32 , G06F1/26 , G06F1/3206 , G06F1/324 , G06F1/3243 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/172
摘要： In an embodiment, a processor includes a core to execute instructions, an agent to perform an operation independently of the core, a fabric to couple the core and agent and including a plurality of domains and a logic to receive isochronous parameter information from the agent and environmental information of a platform and to generate first and second values, and a power controller to control a frequency of the domains based at least in part on the first and second values. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括执行指令的核心，独立于核心执行操作的代理，耦合核心和代理的结构，并且包括多个域以及从代理接收等时参数信息的逻辑，以及平台的环境信息并产生第一和第二值，以及功率控制器，至少部分地基于第一和第二值来控制域的频率。描述和要求保护其他实施例。

2. 发明授权

US07436215B2 Transmitter 有权
标题翻译：发射机
公开(公告)号：US07436215B2
公开(公告)日：2008-10-14
申请号：US10676712
申请日：2003-09-30
申请人： Ken Drottar , Zale T Schoenborn
发明人： Ken Drottar , Zale T Schoenborn
IPC分类号： H03K19/094 , H03K19/0175 , H03K19/20
CPC分类号： H03F3/3055 , H03F3/24 , H03F3/60 , H03F2200/423 , H04B2001/0408
摘要： In some embodiments, a transmitter includes a first circuit coupled to an input port of the transmitter, and a second circuit coupled to the first circuit and to an output port of the transmitter, wherein the first circuit is sized with respect to the second circuit such that for a pulse signal applied to the input port, the transmitter generates an output signal having a rise-time and a fall-time that are substantially equal at the output port.
摘要翻译：在一些实施例中，发射机包括耦合到发射机的输入端口的第一电路和耦合到第一电路和发射机的输出端口的第二电路，其中第一电路的尺寸相对于第二电路的尺寸如对于施加到输入端口的脉冲信号，发射器产生具有在输出端口处基本相等的上升时间和下降时间的输出信号。

3. 发明申请

US20080231331A1 Spread spectrum clock generator 有权
标题翻译：扩频时钟发生器
公开(公告)号：US20080231331A1
公开(公告)日：2008-09-25
申请号：US11726911
申请日：2007-03-22
申请人： Vishnu Balraj , Terry Baucom , Amir Bashir , Huimin Chen , Ken Drottar , Naveed Khan , Duane Quiet , Andrew M. Volk
发明人： Vishnu Balraj , Terry Baucom , Amir Bashir , Huimin Chen , Ken Drottar , Naveed Khan , Duane Quiet , Andrew M. Volk
IPC分类号： H03L7/00
CPC分类号： H03L7/08 , G06F1/04 , H03K5/156 , H03K7/06
摘要： Disclosed are embodiments of methods and circuits to generate spread spectrum clocks.
摘要翻译：公开了用于产生扩频时钟的方法和电路的实施例。

4. 发明授权

US07227414B2 Apparatus for receiver equalization 有权
标题翻译：接收机均衡装置
公开(公告)号：US07227414B2
公开(公告)日：2007-06-05
申请号：US10607799
申请日：2003-06-27
申请人： Ken Drottar
发明人： Ken Drottar
IPC分类号： H03F3/16
CPC分类号： H03F1/42 , H03F1/086 , H03F1/34 , H03F1/342 , H03F3/16 , H03F3/45237 , H03F2200/36 , H03K19/018528
摘要： In some embodiments an apparatus includes an amplifier, a first inverter having an input coupled to an output of the amplifier, and a second inverter having an input coupled to an output of the first inverter and an output, where the output of the second inverter is fed back to an input of the amplifier. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，一种装置包括放大器，具有耦合到放大器的输出的输入的第一反相器和具有耦合到第一反相器的输出的输入的第二反相器和输出，其中第二反相器的输出反馈到放大器的输入。描述和要求保护其他实施例。

5. 发明授权

US07203853B2 Apparatus and method for low latency power management on a serial data link 有权
标题翻译：串行数据链路上低延迟电源管理的装置和方法
公开(公告)号：US07203853B2
公开(公告)日：2007-04-10
申请号：US10302295
申请日：2002-11-22
申请人： Andrew W. Martwick , Ken Drottar , David S. Dunning , Zale T. Schoenborn , Andrew M. Volk , Ronald W. Swartz , Dennis J. Miller
发明人： Andrew W. Martwick , Ken Drottar , David S. Dunning , Zale T. Schoenborn , Andrew M. Volk , Ronald W. Swartz , Dennis J. Miller
IPC分类号： G06F12/00
CPC分类号： G06F1/3209 , G06F1/325 , G06F1/3253 , Y02D10/151
摘要： An apparatus and method for low latency power management on a serial data link are described. In one embodiment, the method includes the detection of an electrical idle exit condition during receiver operation in an electrical idle state. Once detected, data synchronization is performed according to one or more received data synchronization training patterns. Finally, when the synchronization is performed within a determined synchronization re-establishment period, the receiver will resume operation according to a normal power state. Accordingly, the embodiment described illustrates an open loop, low latency power resumption operation for power management within 3GIO links.
摘要翻译：描述了串行数据链路上的低延迟功率管理的装置和方法。在一个实施例中，该方法包括在电气空闲状态期间在接收机操作期间检测电空闲出口状况。一旦检测到，则根据一个或多个接收到的数据同步训练模式执行数据同步。最后，当在确定的同步重建周期内执行同步时，接收机将根据正常功率状态恢复操作。因此，所描述的实施例示出了3GIO链路内的电源管理的开环低延迟功率恢复操作。

6. 发明授权

US06687840B1 Multi-link extensions and bundle skew management 失效
标题翻译：多链接扩展和捆绑偏移管理
公开(公告)号：US06687840B1
公开(公告)日：2004-02-03
申请号：US09557099
申请日：2000-04-21
申请人： Ken Drottar , David S. Dunning
发明人： Ken Drottar , David S. Dunning
IPC分类号： G06F1342
CPC分类号： H04L47/10 , H04L69/14 , H04L69/324 , Y02D50/30
摘要： A method, apparatus, and system are provided for multi-link extensions and bundle skew management. According to one embodiment, multiple parallel links between two or more devices are combined into a single channel, and cells on the various links are received in a round-robin order, and variations in flight time between the various links are compensated through a timer at each receive port of the bundle.
摘要翻译：提供了一种方法，装置和系统用于多链路扩展和捆绑偏移管理。根据一个实施例，两个或多个设备之间的多个并行链路被组合成单个信道，并且以循环次序接收各个链路上的小区，并且通过定时器在各个链路之间的飞行时间的变化被补偿每个接收端口的捆绑。

7. 发明授权

US6094683A Link bundling in a network 有权
标题翻译：链接捆绑在网络中
公开(公告)号：US6094683A
公开(公告)日：2000-07-25
申请号：US137168
申请日：1998-08-20
申请人： Ken Drottar , David S. Dunning
发明人： Ken Drottar , David S. Dunning
IPC分类号： H04L1/00 , H04L1/16 , H04L12/24 , H04L29/06 , H04L29/08 , G06F15/173 , G06F15/16
CPC分类号： H04L69/22 , H04L69/14 , H04L1/16 , H04L2001/0092 , H04L2001/0096 , H04L41/0654 , H04L69/324 , Y02B60/33
摘要： A technique for bundling links is provided for increasing bandwidth and reducing latency. Two nodes in a network are configured to bundle two or more links connected between the two nodes. Data is transmitted between the two nodes by striping data over each link of the bundle. Data is transmitted in cells, and one or more cells are transmitted over each link of the bundle. The cells transmitted on one or more of the links include routing information.
摘要翻译：提供捆绑链接的技术用于增加带宽并减少延迟。网络中的两个节点被配置为捆绑连接在两个节点之间的两个或多个链路。通过在捆绑的每个链路上分条数据，在两个节点之间传输数据。数据在单元中传输，并且一个或多个单元通过该组的每个链路传输。在一个或多个链路上发送的小区包括路由信息。

8. 发明申请

US20140359311A1 Controlling Power Delivery To A Processor Via A Bypass 有权
标题翻译：通过旁路控制处理器的电力输送
公开(公告)号：US20140359311A1
公开(公告)日：2014-12-04
申请号：US13906652
申请日：2013-05-31
申请人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G06F1/3243 , G06F1/3296 , G06F9/5094 , Y02D10/152 , Y02D10/172 , Y02D10/22
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括多个域，每个域以独立可控的电压和频率工作，多个线性稳压器各自接收来自芯片外源的第一电压并可控制以将调节电压提供给至少一个以及多个选择器，每个选择器都耦合到所述域中的一个，其中每个选择器被配置为从所述线性调节器之一提供调节电压或将旁路电压提供给相应的域。描述和要求保护其他实施例。

9. 发明授权

US07474714B2 Phase/frequency detector for tracking receivers 有权
标题翻译：用于跟踪接收器的相位/频率检测器
公开(公告)号：US07474714B2
公开(公告)日：2009-01-06
申请号：US10334935
申请日：2002-12-31
申请人： Chamath Abhayagunawardhana , Dave Dunning , Sanjay Dabral , Ken Drottar
发明人： Chamath Abhayagunawardhana , Dave Dunning , Sanjay Dabral , Ken Drottar
IPC分类号： H04L27/00
CPC分类号： H04L7/033
摘要： A receiving device within a digital electronic system includes a sampling unit, a voter block, and a local clock phase adjustment unit. The sampling unit samples an input line at three points in time at intervals of one half of a bit period. The sampling unit delivers the values obtained in the sampling process to the voter block. The voter block determines whether to deliver an up or a down vote to the local clock phase adjustment unit. The voter block communicates with the local clock phase adjustment unit via up and down control signals. The local clock phase adjustment unit determines whether the local clock phase should be adjusted, and if so, whether to advance or delay the local clock phase. If certain meta-stable conditions are observed by the voter block, the voter block will vote in one direction in order to push the system out of the meta-stable condition.
摘要翻译：数字电子系统内的接收装置包括采样单元，选举块和本地时钟相位调整单元。采样单元在三个时间点以一个位周期的一半的间隔对输入行进行采样。采样单元将采样过程中获得的值传递给选举块。选民块决定是否向本地时钟相位调整单位输出向上或向下的投票。选举块通过上下控制信号与本地时钟相位调整单元进行通信。本地时钟相位调整单元确定是否应调整本地时钟相位，如果是，是否提前或延迟本地时钟相位。如果选民块观察到某些元稳定条件，则选民块将以一个方向投票，以将该制度推出元稳定状态。

10. 发明申请

US20080122463A1 Testing microelectronic devices using electro-optic modulator probes 审中-公开
标题翻译：使用电光调制器探针测试微电子器件
公开(公告)号：US20080122463A1
公开(公告)日：2008-05-29
申请号：US11479888
申请日：2006-06-30
申请人： Sanjay Dabral , Mohiuddin Mazumder , Ken Drottar , Larry Tate , John Critchlow
发明人： Sanjay Dabral , Mohiuddin Mazumder , Ken Drottar , Larry Tate , John Critchlow
IPC分类号： G01R31/308
CPC分类号： G01R1/071 , G01R31/311 , G01R31/31728 , G01R31/3177
摘要： Testing microelectronic devices using electro-optic modulator probes is disclosed. In one aspect, a testing apparatus may include an electrical signaling medium to exchange electrical signals with a microelectronic device. The testing apparatus may include an electro-optic modulator probe to provide optical signals that are modulated by the electrical signals. An optoelectronic transducer may be included to convert the modulated optical signals to modulated electrical signals. The testing apparatus may further include a logic analyzer module to receive and analyze the modulated electrical signals. Other testing apparatus are disclosed, as well as systems incorporating such apparatus, and various methods of testing microelectronic devices.
摘要翻译：公开了使用电光调制器探针测试微电子器件。在一个方面，测试装置可以包括用于与微电子装置交换电信号的电信令介质。测试装置可以包括电光调制器探针，以提供由电信号调制的光信号。可以包括光电转换器以将经调制的光信号转换成调制的电信号。测试装置还可以包括用于接收和分析调制的电信号的逻辑分析器模块。公开了其它测试装置，以及结合这种装置的系统以及测试微电子装置的各种方法。

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