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1. 发明授权

US08816459B2 Image sensor having wave guide and method for manufacturing the same 有权
标题翻译：具有波导的图像传感器及其制造方法
公开(公告)号：US08816459B2
公开(公告)日：2014-08-26
申请号：US13563620
申请日：2012-07-31
申请人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
发明人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
IPC分类号： H01L31/0232 , H01L27/146
CPC分类号： H01L27/14627 , H01L27/14621 , H01L27/14632 , H01L27/14643 , H01L27/14685 , H01L27/14687
摘要： An image sensor having a wave guide includes a semiconductor substrate formed with a photodiode and a peripheral circuit region; an anti-reflective layer formed on the semiconductor substrate; an insulation layer formed on the anti-reflective layer; a wiring layer formed on the insulation layer and connected to the semiconductor substrate; at least one interlayer dielectric stacked on the wiring layer; and a wave guide connected to the insulation layer by passing through the interlayer dielectric and the wiring layer which are formed over the photodiode.
摘要翻译：具有波导的图像传感器包括形成有光电二极管和外围电路区域的半导体基板; 形成在半导体衬底上的抗反射层; 形成在所述抗反射层上的绝缘层; 形成在所述绝缘层上并连接到所述半导体衬底的布线层; 堆叠在所述布线层上的至少一层间电介质; 以及通过穿过形成在光电二极管上的层间电介质和布线层与绝缘层连接的波导。

2. 发明申请

US20110207258A1 METHOD FOR FORMING PAD IN WAFER WITH THREE-DIMENSIONAL STACKING STRUCTURE 有权
标题翻译：用三维堆叠结构形成垫片的方法
公开(公告)号：US20110207258A1
公开(公告)日：2011-08-25
申请号：US13026963
申请日：2011-02-14
申请人： Heui-Gyun Ahn , Se-Jung Oh , In-Gyun Jeon , Jun-Ho Won
发明人： Heui-Gyun Ahn , Se-Jung Oh , In-Gyun Jeon , Jun-Ho Won
IPC分类号： H01L31/0232 , H01L21/30 , H01L31/18
CPC分类号： H01L24/03 , H01L21/6835 , H01L23/481 , H01L24/05 , H01L27/1462 , H01L27/14636 , H01L27/1464 , H01L2221/68372 , H01L2224/05093 , H01L2924/01046 , H01L2924/01078
摘要： A method for forming a pad in a wafer with a three-dimensional stacking structure includes: (a) a first process of bonding a device wafer and a handling wafer; (b) a second process of thinning a back side of an Si substrate which is formed on the device wafer, after the first process; (c) a third process of forming an anti-reflective layer and a PMD (preferential metal deposition) dielectric layer, after the second process; (d) a fourth process of forming vias on back sides of super contacts which are formed on the Si substrate, after the third process; and (e) a fifth process of forming a pad, after the fourth process.
摘要翻译：用于在具有三维堆叠结构的晶片中形成焊盘的方法包括：（a）接合器件晶片和处理晶片的第一工艺; （b）在第一工序之后，使形成在器件晶片上的Si衬底的背面变薄的第二工序; （c）在第二工序之后形成抗反射层和PMD（优先金属沉积）介质层的第三工艺; （d）在第三工序之后在Si衬底上形成的超级触点的背面上形成通孔的第四工序; 和（e）在第四处理之后形成垫的第五工序。

3. 发明授权

US08368158B2 Image sensor having wave guide and method for manufacturing the same 有权
标题翻译：具有波导的图像传感器及其制造方法
公开(公告)号：US08368158B2
公开(公告)日：2013-02-05
申请号：US12758646
申请日：2010-04-12
申请人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
发明人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
IPC分类号： H01L31/0232
CPC分类号： H01L27/14627 , H01L27/14621 , H01L27/14632 , H01L27/14643 , H01L27/14685 , H01L27/14687
摘要： An image sensor having a wave guide includes a semiconductor substrate formed with a photodiode and a peripheral circuit region; an anti-reflective layer formed on the semiconductor substrate; an insulation layer formed on the anti-reflective layer; a wiring layer formed on the insulation layer and connected to the semiconductor substrate; at least one interlayer dielectric stacked on the wiring layer; and a wave guide connected to the insulation layer by passing through the interlayer dielectric and the wiring layer which are formed over the photodiode.
摘要翻译：具有波导的图像传感器包括形成有光电二极管和外围电路区域的半导体基板; 形成在半导体衬底上的抗反射层; 形成在所述抗反射层上的绝缘层; 形成在所述绝缘层上并连接到所述半导体衬底的布线层; 堆叠在所述布线层上的至少一层间电介质; 以及通过穿过形成在光电二极管上的层间电介质和布线层与绝缘层连接的波导。

4. 发明申请

US20120301996A1 BACK SIDE ILLUMINATION IMAGE SENSOR REDUCED IN SIZE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：尺寸缩小的背面照明图像传感器及其制造方法
公开(公告)号：US20120301996A1
公开(公告)日：2012-11-29
申请号：US13563655
申请日：2012-07-31
申请人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
发明人： In-Gyun Jeon , Se-Jung Oh , Heui-Gyun Ahn , Jun-Ho Won
IPC分类号： H01L31/18
CPC分类号： H01L27/1464 , H01L27/14634
摘要： A back side illumination image sensor reduced in chip size has a capacitor disposed in a vertical upper portion of a pixel region in the back side illumination image sensor in which light is illuminated from a back side of a subscriber, thereby reducing a chip size, and a method for manufacturing the back side illumination image sensor. The capacitor of the back side illumination image sensor reduced in chip size is formed in the vertical upper portion of the pixel region, not in the outside of a pixel region, so that the outside area of the pixel region for forming the capacitor is not required, thereby reducing a chip size.
摘要翻译：减小芯片尺寸的背面照明图像传感器具有设置在后侧照明图像传感器中的像素区域的垂直上部的电容器，其中光从用户的背面被照射，从而减小了芯片尺寸，并且背面照明图像传感器的制造方法。减少芯片尺寸的背面照明图像传感器的电容器形成在像素区域的垂直上部，而不是在像素区域的外侧，使得不需要用于形成电容器的像素区域的外部区域，从而减小芯片尺寸。

5. 发明申请

US20070077723A1 Method of forming shallow trench isolation in a semiconductor device 审中-公开
标题翻译：在半导体器件中形成浅沟槽隔离的方法
公开(公告)号：US20070077723A1
公开(公告)日：2007-04-05
申请号：US11320725
申请日：2005-12-30
申请人： Heui-Gyun Ahn
发明人： Heui-Gyun Ahn
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： An exemplary method of forming a shallow trench isolation layer in a semiconductor device according to an embodiment of the present invention includes depositing a silicon nitride layer as a hard mask layer on a silicon substrate, forming a first moat pattern in the silicon nitride layer by a photolithography process, patterning the silicon nitride layer by a dry etching process using the first moat pattern as an etching mask, forming a shallow trench by dry-etching the substrate that is exposed by the patterned silicon nitride layer, removing the first moat pattern after forming the shallow trench, removing the patterned silicon nitride layer, filling the shallow trench with a gap-fill insulation layer, forming a second moat pattern, removing the gap-fill insulation layer by a dry etching process using the second moat pattern as an etching mask, and removing the second moat pattern.
摘要翻译：根据本发明的实施例的在半导体器件中形成浅沟槽隔离层的示例性方法包括在硅衬底上沉积氮化硅层作为硬掩模层，在氮化硅层中形成第一沟槽图案光刻工艺，通过使用第一护套图案作为蚀刻掩模的干蚀刻工艺对氮化硅层进行图案化，通过干蚀刻由图案化的氮化硅层曝光的衬底形成浅沟槽，在形成之后去除第一沟槽图案浅沟槽，去除图案化的氮化硅层，用间隙填充绝缘层填充浅沟槽，形成第二沟槽图案，通过使用第二沟槽图案作为蚀刻掩模的干蚀刻工艺去除间隙填充绝缘层，并且移除第二护城河图案。

6. 发明授权

US08193023B2 Unit pixel of image sensor having three-dimensional structure and method for manufacturing the same 有权
标题翻译：具有三维结构的图像传感器的单位像素及其制造方法
公开(公告)号：US08193023B2
公开(公告)日：2012-06-05
申请号：US12756696
申请日：2010-04-08
申请人： Heui-Gyun Ahn
发明人： Heui-Gyun Ahn
IPC分类号： H01L23/02 , H01L29/40 , H01L21/00
CPC分类号： H01L27/14636 , H01L23/535 , H01L24/03 , H01L24/05 , H01L24/81 , H01L27/14609 , H01L27/14632 , H01L27/14634 , H01L27/1464 , H01L27/14687 , H01L27/14689 , H01L27/1469 , H01L31/02005 , H01L2223/5446 , H01L2224/0401 , H01L2224/05551 , H01L2224/05552 , H01L2224/05553 , H01L2224/05568 , H01L2224/06051 , H01L2224/13021 , H01L2224/16237 , H01L2224/81141 , H01L2224/81191 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01077 , H01L2924/12042 , H01L2924/12043 , H01L2924/00012 , H01L2924/00
摘要： A unit pixel of an image sensor having a three-dimensional structure includes a first chip and a second chip which are stacked, one of the first chip and the second chip having a photodiode, and the other of the first chip and the second chip having a circuit for receiving information from the photodiode and outputting received information. The first chip includes a first pad which is projectedly disposed on an upper surface of the first chip in such a way as to define a concavo-convex structure, and the second chip includes a second pad which is depressedly disposed on an upper surface of the second chip in such a way as to define a concavo-convex structure corresponding to the concavo-convex structure of the first chip. The first chip and the second chip are mated with each other through bonding of the first pad and the second pad.
摘要翻译：具有三维结构的图像传感器的单位像素包括堆叠的第一芯片和第二芯片，第一芯片和第二芯片中的一个具有光电二极管，并且第一芯片和第二芯片中的另一个具有用于从光电二极管接收信息并输出接收信息的电路。第一芯片包括以限定凹凸结构的方式突出地设置在第一芯片的上表面上的第一焊盘，并且第二芯片包括第二焊盘，第二焊盘被按压地设置在第二焊盘的上表面上第二芯片以限定与第一芯片的凹凸结构相对应的凹凸结构的方式。通过第一焊盘和第二焊盘的接合，第一芯片和第二芯片彼此配合。

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