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1. 发明授权

US09074513B2 Non-intrusive exhaust gas sensor monitoring 有权
标题翻译：非侵入式废气传感器监测
公开(公告)号：US09074513B2
公开(公告)日：2015-07-07
申请号：US13352885
申请日：2012-01-18
申请人： Imad Hassan Makki , Pankaj Kumar , James Michael Kerns , Hassene Jammoussi
发明人： Imad Hassan Makki , Pankaj Kumar , James Michael Kerns , Hassene Jammoussi
IPC分类号： G01N33/00 , F01N11/00 , F02D41/14 , F02D41/28
CPC分类号： F01N11/00 , F02D41/1441 , F02D41/1474 , F02D41/1495 , F02D2041/1431 , F02D2041/286
摘要： A method for monitoring an exhaust gas sensor coupled in an engine exhaust is provided. In one embodiment, the method comprises indicating exhaust gas sensor degradation based on characteristics of a distribution of extreme values of a plurality of sets of lambda differentials collected during selected operating conditions. In this way, the exhaust gas sensor may be monitored in a non-intrusive manner.
摘要翻译：提供一种用于监测联接在发动机排气中的废气传感器的方法。在一个实施例中，该方法包括基于在选择的操作条件期间收集的多组λ差分的极值的分布的特性来指示废气传感器劣化。以这种方式，废气传感器可以以非侵入的方式被监视。

2. 发明申请

US20130180509A1 NON-INTRUSIVE EXHAUST GAS SENSOR MONITORING 有权
标题翻译：非浸入式气体传感器监测
公开(公告)号：US20130180509A1
公开(公告)日：2013-07-18
申请号：US13352885
申请日：2012-01-18
申请人： Imad Hassan Makki , Pankaj Kumar , James Michael Kerns , Hassene Jammoussi
发明人： Imad Hassan Makki , Pankaj Kumar , James Michael Kerns , Hassene Jammoussi
IPC分类号： F02D41/04 , G01N33/00
CPC分类号： F01N11/00 , F02D41/1441 , F02D41/1474 , F02D41/1495 , F02D2041/1431 , F02D2041/286
摘要： A method for monitoring an exhaust gas sensor coupled in an engine exhaust is provided. In one embodiment, the method comprises indicating exhaust gas sensor degradation based on characteristics of a distribution of extreme values of a plurality of sets of lambda differentials collected during selected operating conditions. In this way, the exhaust gas sensor may be monitored in a non-intrusive manner.
摘要翻译：提供一种用于监测联接在发动机排气中的废气传感器的方法。在一个实施例中，该方法包括基于在选择的操作条件期间收集的多组λ差分的极值的分布的特性来指示废气传感器劣化。以这种方式，废气传感器可以以非侵入的方式被监视。

3. 发明授权

US08800356B2 Engine catalyst diagnostics 有权
标题翻译：发动机催化剂诊断
公开(公告)号：US08800356B2
公开(公告)日：2014-08-12
申请号：US13247640
申请日：2011-09-28
申请人： Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith , Pankaj Kumar , Adam Banker
发明人： Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith , Pankaj Kumar , Adam Banker
IPC分类号： G01M15/10
CPC分类号： F01N11/00 , F01N2550/02 , G01N33/007 , G06N99/005 , Y02T10/47
摘要： Embodiments for predicting catalyst function are disclosed. One example embodiment includes applying a set of parameter readings for a given sample to a support vector machine to generate a classification output, recording a plurality of classification outputs for a plurality of successive samples over a first duration, and indicating catalyst degradation if a threshold percentage of the classification outputs indicates degraded catalyst performance. In this way, catalyst degradation may be indicated using a simplified model that does not require extensive calibration.
摘要翻译：公开了用于预测催化剂功能的实施方案。一个示例性实施例包括将给定样本的一组参数读数应用于支持向量机以产生分类输出，在第一持续时间内记录多个连续样本的多个分类输出，并且如果阈值百分比的分类输出表明催化剂性能下降。以这种方式，可以使用不需要大量校准的简化模型来指示催化剂降解。

4. 发明申请

US20130078725A1 ENGINE CATALYST DIAGNOSTICS 有权
标题翻译：发动机催化剂诊断
公开(公告)号：US20130078725A1
公开(公告)日：2013-03-28
申请号：US13247640
申请日：2011-09-28
申请人： Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith , Pankaj Kumar , Adam Banker
发明人： Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith , Pankaj Kumar , Adam Banker
IPC分类号： G01N31/10
CPC分类号： F01N11/00 , F01N2550/02 , G01N33/007 , G06N99/005 , Y02T10/47
摘要： Embodiments for predicting catalyst function are disclosed. One example embodiment includes applying a set of parameter readings for a given sample to a support vector machine to generate a classification output, recording a plurality of classification outputs for a plurality of successive samples over a first duration, and indicating catalyst degradation if a threshold percentage of the classification outputs indicates degraded catalyst performance. In this way, catalyst degradation may be indicated using a simplified model that does not require extensive calibration.
摘要翻译：公开了用于预测催化剂功能的实施方案。一个示例性实施例包括将给定样本的一组参数读数应用于支持向量机以产生分类输出，在第一持续时间内记录多个连续样本的多个分类输出，并且如果阈值百分比的分类输出表明催化剂性能下降。以这种方式，可以使用不需要大量校准的简化模型来指示催化剂降解。

5. 发明申请

US20130245919A1 LOW DIMENSIONAL THREE WAY CATALYST MODEL FOR CONTROL AND DIAGNOSTICS 审中-公开
标题翻译：用于控制和诊断的低维三维催化剂模型
公开(公告)号：US20130245919A1
公开(公告)日：2013-09-19
申请号：US13424208
申请日：2012-03-19
申请人： Pankaj Kumar , Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith
发明人： Pankaj Kumar , Imad Hassan Makki , James Michael Kerns , Michael James Uhrich , Stephen B. Smith
IPC分类号： F01N3/10 , F02D41/26 , F01N11/00
CPC分类号： F02D41/0235 , F01N11/007 , F01N2550/02 , F01N2560/025 , F01N2560/14 , F01N2900/1402 , F01N2900/1621 , F01N2900/1624 , F02D41/0295 , F02D41/1441 , F02D41/1454 , F02D41/1456 , F02D41/1458 , F02D41/182 , F02D2200/0814 , F02D2200/0816 , Y02T10/22 , Y02T10/47
摘要： Embodiments for an engine exhaust are provided. In one example, a method comprises adjusting a fuel injection amount based on a fractional oxidation state of a catalyst, the fractional oxidation state based on reaction rates of a plurality of exhaust gas species throughout a catalyst longitudinal axis and a set of axially-averaged mass balance and energy balance equations for a fluid phase and a washcoat of the catalyst. In this way, a simplified catalyst model may be used to control air-fuel ratio.
摘要翻译：提供了用于发动机排气的实施例。在一个实例中，一种方法包括基于催化剂的分数氧化态调节燃料喷射量，基于多个排气物质在催化剂纵向轴线上的反应速率和一组轴向平均质量的分数氧化态平衡和能量平衡方程，用于催化剂的流体相和修补基面涂层。以这种方式，可以使用简化的催化剂模型来控制空燃比。

6. 发明授权

US09417821B2 Presentation of direct accessed storage under a logical drive model 有权
标题翻译：在逻辑驱动器模型下呈现直接访问存储
公开(公告)号：US09417821B2
公开(公告)日：2016-08-16
申请号：US13976262
申请日：2011-09-30
申请人： Thomas M. Slaight , Sivakumar Radhakrishnan , Mark Schmisseur , Pankaj Kumar , Saptarshi Mondal , Sin S. Tan , David C. Lee , Marc T. Jones , Geetani R. Edirisooriya , Bradley A. Burres , Brian M. Leitner , Kenneth C. Haren , Michael T. Klinglesmith , Matthew R. Wilcox , Eric J. Dahlen
发明人： Thomas M. Slaight , Sivakumar Radhakrishnan , Mark Schmisseur , Pankaj Kumar , Saptarshi Mondal , Sin S. Tan , David C. Lee , Marc T. Jones , Geetani R. Edirisooriya , Bradley A. Burres , Brian M. Leitner , Kenneth C. Haren , Michael T. Klinglesmith , Matthew R. Wilcox , Eric J. Dahlen
IPC分类号： G06F3/06 , G06F13/28 , G06F11/10 , G06F12/08
CPC分类号： G06F13/28 , G06F3/061 , G06F3/0613 , G06F3/0619 , G06F3/0626 , G06F3/064 , G06F3/0646 , G06F3/065 , G06F3/0659 , G06F3/0688 , G06F3/0689 , G06F11/1068 , G06F12/0866 , G06F13/102 , G06F13/1668 , G06F13/4068 , G06F13/4282 , G06F2212/262 , G06F2213/0026 , G06F2213/0032
摘要： In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme.
摘要翻译：根据本文公开的实施例，提供了用于在逻辑驱动器模型下呈现直接访问存储的方法，系统，机制，技术和装置; 实现用于协作NVM数据保护的分布式架构; 数据镜像，以保持一致的SSD延迟; 通过并发RAID处理来提升控制器的性能和支持DIF的RAS; 执行门铃机制的仲裁和资源计划，包括门铃仲裁以公平和防止冲突拥堵; 并且通过使用中断合并方案在控制器中实现使用消息传送单元和NTB的多个中断生成。

7. 发明授权

US08816748B2 Jitter reduction in high speed low core voltage level shifter 有权
标题翻译：高速低电压电平转换器的抖动降低
公开(公告)号：US08816748B2
公开(公告)日：2014-08-26
申请号：US13494188
申请日：2012-06-12
申请人： Pankaj Kumar , Pramod Parameswaran , Makeshwar Kothandaraman
发明人： Pankaj Kumar , Pramod Parameswaran , Makeshwar Kothandaraman
IPC分类号： H03L5/00
CPC分类号： H03K3/356113 , H03K3/013
摘要： An apparatus comprising a level shifter circuit and a control circuit. The level shifter circuit may be configured to generate a differential output in response to (i) a first differential input, (ii) a second differential input and (iii) a first supply. The level shifter circuit comprises a first pull down transistor pair operating with the first supply. The control circuit may be configured to generate the second differential input in response to (i) the first differential input and (ii) a second supply. The control circuit generally comprises a second pull down transistor pair operating with the second supply. The first supply has a higher voltage than the second supply.
摘要翻译：一种包括电平移位器电路和控制电路的装置。电平移位器电路可以被配置为响应于（i）第一差分输入，（ii）第二差分输入和（iii）第一电源而产生差分输出。电平移位器电路包括与第一电源一起工作的第一下拉晶体管对。控制电路可以被配置为响应于（i）第一差分输入和（ii）第二电源而产生第二差分输入。控制电路通常包括与第二电源一起工作的第二下拉晶体管对。第一个电源具有比第二个电源更高的电压。

8. 发明申请

US20130328611A1 JITTER REDUCTION IN HIGH SPEED LOW CORE VOLTAGE LEVEL SHIFTER 有权
标题翻译：高速低电压电平变换器中的抖动减少
公开(公告)号：US20130328611A1
公开(公告)日：2013-12-12
申请号：US13494188
申请日：2012-06-12
申请人： Pankaj Kumar , Pramod Parameswaran , Makeshwar Kothandaraman
发明人： Pankaj Kumar , Pramod Parameswaran , Makeshwar Kothandaraman
IPC分类号： H03L5/00
CPC分类号： H03K3/356113 , H03K3/013
摘要： An apparatus comprising a level shifter circuit and a control circuit. The level shifter circuit may be configured to generate a differential output in response to (i) a first differential input, (ii) a second differential input and (iii) a first supply. The level shifter circuit comprises a first pull down transistor pair operating with the first supply. The control circuit may be configured to generate the second differential input in response to (i) the first differential input and (ii) a second supply. The control circuit generally comprises a second pull down transistor pair operating with the second supply. The second supply has a higher voltage than the first supply.
摘要翻译：一种包括电平移位器电路和控制电路的装置。电平移位器电路可以被配置为响应于（i）第一差分输入，（ii）第二差分输入和（iii）第一电源而产生差分输出。电平移位器电路包括与第一电源一起工作的第一下拉晶体管对。控制电路可以被配置为响应于（i）第一差分输入和（ii）第二电源而产生第二差分输入。控制电路通常包括与第二电源一起工作的第二下拉晶体管对。第二个电源具有比第一个电源更高的电压。

9. 发明授权

US08598941B2 Hybrid impedance compensation in a buffer circuit 有权
标题翻译：缓冲电路中的混合阻抗补偿
公开(公告)号：US08598941B2
公开(公告)日：2013-12-03
申请号：US13165195
申请日：2011-06-21
申请人： Dipankar Bhattacharya , Ashish V. Shukla , John Christopher Kriz , Makeshwar Kothandaraman , Pankaj Kumar , Pramod Parameswaran
发明人： Dipankar Bhattacharya , Ashish V. Shukla , John Christopher Kriz , Makeshwar Kothandaraman , Pankaj Kumar , Pramod Parameswaran
IPC分类号： H01L37/00
CPC分类号： H03F3/3022 , H03F1/308 , H03F1/56 , H03F2200/447
摘要： A compensation circuit for controlling a variation in output impedance of at least one buffer circuit includes a monitor circuit and a control circuit coupled with the monitor circuit. The monitor circuit includes a pull-up portion including at least one PMOS transistor and a pull-down portion comprising at least one NMOS transistor. The monitor circuit is configured to track an operation of an output stage of the buffer circuit and is operative to generate at least a first control signal indicative of a status of at least one characteristic of corresponding pull-up and pull-down portions in the output stage of the buffer circuit over variations in PVT conditions to which the buffer circuit may be subjected. The control circuit is operative to generate a set of digital control bits as a function of the first control signal. The set of digital control bits is operative to compensate the pull-up and pull-down portions in the output stage of the buffer circuit over prescribed variations in PVT conditions.
摘要翻译：用于控制至少一个缓冲电路的输出阻抗变化的补偿电路包括监视电路和与监视器电路耦合的控制电路。监视器电路包括上拉部分，其包括至少一个PMOS晶体管和包括至少一个NMOS晶体管的下拉部分。监视器电路被配置为跟踪缓冲电路的输出级的操作，并且可操作地产生至少第一控制信号，该第一控制信号指示输出中相应的上拉和下拉部分的至少一个特性的状态缓冲电路的阶段与缓冲电路可能受到的PVT条件的变化有关。控制电路用于产生作为第一控制信号的函数的一组数字控制位。该组数字控制位可用来补偿缓冲电路的输出级中的上拉和下拉部分超过规定的PVT条件变化。

10. 发明授权

US08515075B1 Method of and system for malicious software detection using critical address space protection 有权
标题翻译：使用关键地址空间保护的恶意软件检测方法和系统
公开(公告)号：US08515075B1
公开(公告)日：2013-08-20
申请号：US12322220
申请日：2009-01-29
申请人： Suman Saraf , Sharad Agrawal , Pankaj Kumar
发明人： Suman Saraf , Sharad Agrawal , Pankaj Kumar
IPC分类号： G06F21/00
CPC分类号： G06F21/566
摘要： A method of identifying malicious code based on identifying software executing out of writable memory of the computer system. In one embodiment, the identification of the malicious code occurs when the code accesses a predetermined memory address. This address can reside in the address space of an application, a library, or an operating system component. In one embodiment, the access to the predetermined address generates an exception invoking exception handling code. The exception handling code checks the memory attributes of the code that caused the exception and determines whether the code was running in writeable memory.
摘要翻译：基于识别从计算机系统的可写入存储器执行的软件来识别恶意代码的方法。在一个实施例中，当代码访问预定的存储器地址时，发生恶意代码的识别。该地址可以驻留在应用程序，库或操作系统组件的地址空间中。在一个实施例中，对预定地址的访问生成异常调用异常处理代码。异常处理代码检查导致异常的代码的内存属性，并确定代码是否在可写内存中运行。

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