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1. 发明申请

US20090022203A1 METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT 有权
标题翻译：集成电路供电方法与系统
公开(公告)号：US20090022203A1
公开(公告)日：2009-01-22
申请号：US11780530
申请日：2007-07-20
申请人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, JR. , Joseph A. Iandanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
发明人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, JR. , Joseph A. Iandanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
IPC分类号： G01J5/00
CPC分类号： G05D23/20 , G05D23/1934
摘要： Method and systems of powering on an integrated circuit (IC) are disclosed. In one embodiment, the system includes a region in the IC including functional logic, a temperature sensor for sensing a temperature in the region when the IC is powered up and a heating element therefor; a processing unit including: a comparator for comparing the temperature against a predetermined temperature value, a controller, which in the case that the temperature is below the predetermined temperature value, delays functional operation of the IC and controls heating of the region of the IC, and a monitor for monitoring the temperature in the region; and wherein the controller, in the case that the temperature rises above the predetermined temperature value, ceases the heating and initiates functional operation of the IC.
摘要翻译：公开了对集成电路（IC）供电的方法和系统。在一个实施例中，该系统包括IC中的包括功能逻辑的区域，用于感测IC上电时该区域中的温度的温度传感器及其加热元件; 处理单元，包括：用于将温度与预定温度值进行比较的比较器，在温度低于预定温度值的情况下的控制器，延迟IC的功能操作并控制IC的区域的加热，以及监测该区域的温度的监测器; 并且其中所述控制器在所述温度升高到所述预定温度值以上的情况下停止所述加热并且启动所述IC的功能操作。

2. 发明申请

US20090021085A1 DESIGN STRUCTURES, METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT 失效
标题翻译：集成电路供电的设计结构，方法和系统
公开(公告)号：US20090021085A1
公开(公告)日：2009-01-22
申请号：US11866537
申请日：2007-10-03
申请人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, JR. , Joseph A. Iadanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
发明人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, JR. , Joseph A. Iadanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
IPC分类号： H01H37/32
CPC分类号： G06F1/206 , Y02D10/16 , Y10T307/773
摘要： Design structures, method and systems of powering on an integrated circuit (IC) are disclosed. In one embodiment, the system includes a region in the IC including functional logic, a temperature sensor for sensing a temperature in the region when the IC is powered up and a heating element therefor; a processing unit including: a comparator for comparing the temperature against a predetermined temperature value, a controller, which in the case that the temperature is below the predetermined temperature value, delays functional operation of the IC and controls heating of the region of the IC, and a monitor for monitoring the temperature in the region; and wherein the controller, in the case that the temperature rises above the predetermined temperature value, ceases the heating and initiates functional operation of the IC.
摘要翻译：公开了对集成电路（IC）供电的设计结构，方法和系统。在一个实施例中，该系统包括IC中的包括功能逻辑的区域，用于感测IC上电时该区域中的温度的温度传感器及其加热元件; 处理单元，包括：用于将温度与预定温度值进行比较的比较器，在温度低于预定温度值的情况下的控制器，延迟IC的功能操作并控制IC的区域的加热，以及监测该区域的温度的监测器; 并且其中所述控制器在所述温度升高到所述预定温度值以上的情况下停止所述加热并且启动所述IC的功能操作。

3. 发明申请

US20090108869A1 Design Structure for a Flexible Multimode Logic Element For Use In A Configurable Mixed-Logic Signal Distribution Path 失效
标题翻译：用于可配置混合逻辑信号分配路径的灵活多模逻辑元件的设计结构
公开(公告)号：US20090108869A1
公开(公告)日：2009-04-30
申请号：US11931626
申请日：2007-10-31
申请人： Igor Arsovski , Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Pradeep Thiagarajan , Sebastian T. Ventrone
发明人： Igor Arsovski , Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Pradeep Thiagarajan , Sebastian T. Ventrone
IPC分类号： H03K19/00
CPC分类号： H03K19/09432 , H03K19/018528
摘要： A design structure for a multimode circuit that is configured to operate in one of multiple operating modes is disclosed. In particular, an exemplary multimode circuit may be configured to operating in one of a full-swing mode, a limited-swing mode, a full-swing to limited-swing converter mode, and a limited-swing to full-swing converter mode. The operating modes of the multimode circuit may be dynamically selectable. One or more multimode circuits may be part of a configurable distribution path for controlling the performance of a signal distribution path or tree of an integrated circuit.
摘要翻译：公开了一种被配置为以多种操作模式之一操作的多模电路的设计结构。特别地，示例性多模电路可以被配置为以全摆动模式，限制摆动模式，全摆幅至限定摆动转换器模式和限定摆动至全摆幅转换器模式之一进行操作。多模电路的工作模式可以动态地选择。一个或多个多模电路可以是用于控制集成电路的信号分配路径或树的性能的可配置分配路径的一部分。

4. 发明申请

US20090051420A1 INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES 失效
标题翻译：用于噪声滤波的模拟电源的内部RC功率分配
公开(公告)号：US20090051420A1
公开(公告)日：2009-02-26
申请号：US12196718
申请日：2008-08-22
申请人： Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Sebastian T. Ventrone , Stephen D. Wyatt
发明人： Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Sebastian T. Ventrone , Stephen D. Wyatt
IPC分类号： H03K5/00
CPC分类号： G05F1/46
摘要： Analog supply for an analog circuit and process for supplying an analog signal to an analog circuit. The analog supply includes a noise filter having a variable resistor, and a control device coupled to adjust the variable resistor. The control device is structured and arranged to set the resistance of the variable resistor to maximize noise filtering and optimize performance of the analog circuit.
摘要翻译：用于模拟电路的模拟电源和用于向模拟电路提供模拟信号的过程。模拟电源包括具有可变电阻器的噪声滤波器和耦合以调节可变电阻器的控制装置。控制装置被构造和布置成设置可变电阻器的电阻以最大化噪声滤波并优化模拟电路的性能。

5. 发明申请

US20100031067A1 Adaptive Noise Suppression Using a Noise Look-up Table 有权
标题翻译：使用噪声查找表的自适应噪声抑制
公开(公告)号：US20100031067A1
公开(公告)日：2010-02-04
申请号：US12183099
申请日：2008-07-31
申请人： Igor Arsovski , Hayden C. Cranford, JR. , Sebastian T. Ventrone
发明人： Igor Arsovski , Hayden C. Cranford, JR. , Sebastian T. Ventrone
IPC分类号： G06F1/03
CPC分类号： G06F1/03 , G06F1/26
摘要： A proactive noise suppression system and method for a power supply network of an integrated circuit. The system and method include receiving an IC event sequence to a memory element, correlating the IC event sequence to a storage location in a second memory element, the storage location including an anti-noise response signature, and utilizing the anti-noise response signature to proactively generate an anti-noise response in a power supply network in at least a portion of the integrated circuit at about the time of execution of the first IC event sequence. Anti-noise response signatures may be adaptively updated and/or created based on noise measurements made corresponding to execution of an IC event sequence by the integrated circuit.
摘要翻译：一种用于集成电路的电源网络的主动噪声抑制系统和方法。该系统和方法包括：向存储元件接收IC事件序列，将IC事件序列与第二存储器元件中的存储位置相关联，存储位置包括抗噪声响应签名，并将抗噪声响应签名在执行第一IC事件序列时，在集成电路的至少一部分中，主动地在电力供应网络中产生抗噪声响应。基于通过集成电路执行IC事件序列进行的噪声测量可以自适应地更新和/或创建抗噪声响应签名。

6. 发明申请

US20100228861A1 ENVIRONMENTAL AND COMPUTING COST REDUCTION WITH IMPROVED RELIABILITY IN WORKLOAD ASSIGNMENT TO DISTRIBUTED COMPUTING NODES 有权
标题翻译：环境和计算成本降低，在分配计算节点的工作量分配中具有改进的可靠性
公开(公告)号：US20100228861A1
公开(公告)日：2010-09-09
申请号：US12397897
申请日：2009-03-04
申请人： Igor Arsovski , Anthony Richard Bonaccio , Hayden C. Cranford, JR. , Alfred Degbotse , Joseph Andrew Iadanza , Todd Edwin Leonard , Pradeep Thiagarajan , Sebastian Theodore Ventrone
发明人： Igor Arsovski , Anthony Richard Bonaccio , Hayden C. Cranford, JR. , Alfred Degbotse , Joseph Andrew Iadanza , Todd Edwin Leonard , Pradeep Thiagarajan , Sebastian Theodore Ventrone
IPC分类号： G06F9/50 , G06F9/46 , G06F15/16 , G06F15/173
CPC分类号： G06F9/5027 , G06F9/5094 , G06F2209/508 , Y02D10/22
摘要： A system and method of allocating a job submission for a computational task to a set of distributed server farms each having at least one processing entity comprising; receiving a workload request from at least one processing entity for submission to at least one of the set of distributed server farms; using at least one or more conditions associated with the computational task for accepting or rejecting at least one of the server farms to which the job submission is to be allocated; determining a server farm that can optimize the one or more conditions; and dispatching the job submission to the server farm which optimizes the at least one of the one or more conditions associated with the computational task and used for selecting the at least one of the server farms.
摘要翻译：一种将计算任务的作业提交分配给每个具有至少一个处理实体的分布式服务器场集合的系统和方法; 从至少一个处理实体接收工作负载请求以提交给所述一组分布式服务器场中的至少一个; 使用与计算任务相关联的至少一个或多个条件来接受或拒绝要分配作业提交的至少一个服务器场; 确定可优化一个或多个条件的服务器场; 以及将所述作业提交分发到所述服务器场，所述服务器场优化与所述计算任务相关联并用于选择所述至少一个所述服务器场的所述一个或多个条件中的至少一个。

7. 发明申请

US20110057727A1 ADAPTIVE COMMON MODE BIAS FOR DIFFERENTIAL AMPLIFIER INPUT CIRCUITS 有权
标题翻译：用于差分放大器输入电路的自适应通用模式偏置
公开(公告)号：US20110057727A1
公开(公告)日：2011-03-10
申请号：US12557139
申请日：2009-09-10
申请人： Hayden C. Cranford, JR. , Todd M. Rasmus , Joseph M. Stevens
发明人： Hayden C. Cranford, JR. , Todd M. Rasmus , Joseph M. Stevens
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/3211 , H03F3/45632 , H03F2203/45008 , H03F2203/45078 , H03F2203/45292 , H03F2203/45342
摘要： A method and apparatus for extending the common mode range of a differential amplifier. A circuit has a common mode detection circuit, a common mode voltage inversion circuit, and a differential amplifier. The common mode detection circuit receives a differential signal and detects a common mode voltage. The common mode voltage inversion circuit is coupled to the common mode detection circuit. The common mode voltage inversion circuit has an input node that receives the common mode voltage and an output node that outputs body voltage, wherein the common mode voltage inversion circuit creates an inverse relationship between the common mode voltage and the body voltage. The differential amplifier includes a differential pair of transistors that have a pair of body terminals coupled to the output node of the common mode voltage inversion circuit.
摘要翻译：一种用于扩展差分放大器的共模范围的方法和装置。电路具有共模检测电路，共模电压反相电路和差分放大器。共模检测电路接收差分信号并检测共模电压。共模电压反相电路耦合到共模检测电路。共模电压反相电路具有接收共模电压的输入节点和输出体电压的输出节点，其中共模电压反相电路在共模电压和体电压之间产生反向关系。差分放大器包括具有耦合到共模电压反相电路的输出节点的一对主体端子的差分对晶体管。

8. 发明申请

US20100030503A1 SYSTEM AND CIRCUIT FOR DETERMINING DATA SIGNAL JITTER VIA ASYNCHRONOUS SAMPLING 有权
标题翻译：用于通过异步采样确定数据信号抖动的系统和电路
公开(公告)号：US20100030503A1
公开(公告)日：2010-02-04
申请号：US12103689
申请日：2008-04-15
申请人： Hayden C. Cranford, JR. , Fadi H. Gebara , Jeremy D. Schaub
发明人： Hayden C. Cranford, JR. , Fadi H. Gebara , Jeremy D. Schaub
IPC分类号： G06F19/00 , G06F17/18
CPC分类号： G01R31/31725 , G01R29/26 , G01R31/31709 , H04L1/205
摘要： A system and circuit for determining data signal jitter via asynchronous sampling provides a low cost and production-integrable mechanism for measuring data signal jitter. The data signal is edge-detected and sampled by a sampling clock of unrelated frequency the sampled values are collected in a histogram according to a folding of the samples around a timebase. The timebase is determined by sweeping to detect a minimum jitter for the folded data. The histogram for the correct estimated timebase period is representative of the probability density function of the location of data signal edges and the jitter characteristics are determined by the width and shape of the density function peaks. Frequency drift can be corrected by adjusting the timebase used to fold the data across the sample set.
摘要翻译：用于通过异步采样确定数据信号抖动的系统和电路提供了用于测量数据信号抖动的低成本和生产可集成机制。数据信号被边缘检测并通过不相关频率的采样时钟采样，采样值根据时基上的样本的折叠而被收集在直方图中。通过扫描确定时基以检测折叠数据的最小抖动。正确的估计时基周期的直方图代表数据信号边缘位置的概率密度函数，抖动特性由密度函数峰的宽度和形状决定。可以通过调整用于在整个样本集中折叠数据的时基来纠正频率漂移。

9. 发明申请

US20130064326A1 SERIAL LINK RECEIVER FOR HANDLING HIGH SPEED TRANSMISSIONS 有权
标题翻译：串行接收器用于处理高速传输
公开(公告)号：US20130064326A1
公开(公告)日：2013-03-14
申请号：US13228512
申请日：2011-09-09
申请人： Minhan Chen , Hayden C. Cranford, JR.
发明人： Minhan Chen , Hayden C. Cranford, JR.
IPC分类号： H04L27/00
CPC分类号： H04L25/0276 , H04L25/0298
摘要： A serial link receiver comprises first and second input terminals for receiving positive and negative inputs of a serial data signal, first and second broadband matching T-coils coupled to the first and second input terminals, first and second AC/DC coupling networks coupled to the first and second broadband matching T-coils, and a common mode level shifter coupled to the outputs from the first and second AC/DC coupling networks. This receiver architecture combines the ability to have a wide bandwidth input and pass through data signals at both low and high frequencies. This AC and DC coupled front end also incorporates the feature of a common mode level shifting network to place the common mode of the signal at the optimum point for the first active amplifier stage.
摘要翻译：串行链路接收机包括用于接收串行数据信号的正和负输入的第一和第二输入端，耦合到第一和第二输入端的第一和第二宽带匹配T型线圈，耦合到第一和第二AC / DC耦合网络第一和第二宽带匹配T型线圈，以及耦合到来自第一和第二AC / DC耦合网络的输出的共模电平移位器。该接收机架构结合了具有宽带宽输入和通过低频和高频数据信号的能力。该AC和DC耦合前端还结合了共模电平转换网络的特征，以将信号的共模放置在第一有源放大器级的最佳点。

10. 发明申请

US20090129485A1 Structure for transmitter bandwidth optimization circuit 有权
标题翻译：发射机带宽优化电路的结构
公开(公告)号：US20090129485A1
公开(公告)日：2009-05-21
申请号：US11985963
申请日：2007-11-19
申请人： Louis L. Hsu , Hayden C. Cranford, JR. , Joseph Natonio , James D. Rockrohr , Huihao Xu , Steven J. Zier
发明人： Louis L. Hsu , Hayden C. Cranford, JR. , Joseph Natonio , James D. Rockrohr , Huihao Xu , Steven J. Zier
IPC分类号： H04B3/00 , H04L27/00
CPC分类号： H04L25/0286 , H04L25/03343
摘要： A design structure embodied in a machine-readable medium used in a design process provides a transmitter having a frequency response controllable in accordance with an operational parameter, and may include a storage operable to store operational parameters for controlling a frequency response of the transmitter under each of a plurality of corresponding operating conditions. A sensor can be used to detect an operating condition. In response to a change in the detected operating condition, a stored operational parameter corresponding to the detected operating condition can be used to control the frequency response of the transmitter.
摘要翻译：体现在设计过程中使用的机器可读介质中的设计结构提供具有根据操作参数可控的频率响应的发射机，并且可以包括可操作地存储用于控制每个发射机的频率响应的操作参数的存储器的多个相应的操作条件。可以使用传感器来检测操作状态。响应于检测到的操作条件的变化，可以使用与检测到的操作条件对应的存储的操作参数来控制发送器的频率响应。

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