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1. 发明授权

US07393247B1 Architectures for external SATA-based flash memory devices 失效
标题翻译：用于外部SATA闪存设备的体系结构
公开(公告)号：US07393247B1
公开(公告)日：2008-07-01
申请号：US11076514
申请日：2005-03-08
申请人： I-Kang Yu , Jim Ni , Charles C. Lee
发明人： I-Kang Yu , Jim Ni , Charles C. Lee
IPC分类号： H01R33/00
CPC分类号： G06F13/409 , G06F2213/0032 , H01R12/716 , H01R12/79
摘要： A Serial Advanced Technology Attachment-based (SATA-based) flash memory device configured for coupling with a host machine. The device includes semiconductor memory configured for storing data and a plug having therein a plug cavity, the plug cavity having a generally L shape cavity for housing a set of SATA industry-standard signal pins in respective industry-standard positions with respect to the plug cavity. The plug additionally has a set of power pins that includes at least a first power pin. The SATA-based flash memory device employs a SATA protocol for exchanging the data with the host machine using the set of SATA industry-standard signal pins, the SATA-based flash memory device obtaining power via the set of power pins.
摘要翻译：配置为与主机耦合的串行高级技术基于附件（基于SATA）的闪存设备。该装置包括被配置用于存储数据的半导体存储器和其中具有插塞腔的插头，该插塞腔具有大致L形的腔体，用于将一组SATA工业标准信号引脚相对于插塞腔容纳在相应的工业标准位置。插头还具有一组电源引脚，其包括至少第一电源引脚。基于SATA的闪存设备采用SATA协议，使用SATA工业标准信号引脚与主机交换数据，SATA闪存设备通过一组电源引脚获得电力。

2. 发明申请

US20080038877A1 Light-Weight Flash Hard Drive With Plastic Frame 审中-公开
标题翻译：轻型闪存硬盘与塑料框架
公开(公告)号：US20080038877A1
公开(公告)日：2008-02-14
申请号：US11872685
申请日：2007-10-15
申请人： Kuang-Yu Wang , Jim Ni , Ren-Kang Chiou , I-Kang Yu
发明人： Kuang-Yu Wang , Jim Ni , Ren-Kang Chiou , I-Kang Yu
IPC分类号： H01L21/00
CPC分类号： H05K5/0269 , G06F12/1416 , G06F21/32 , G06F21/78 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087 , H05K5/026 , Y10T29/49128
摘要： A light-weight flash hard drive includes a printed circuit board assembly (PCBA) mounted in a housing formed by a plastic frame and a pair of metal panels that are mounted on the plastic frame over the PCBA. The PCBA includes a PC board and a plug connector that is mounted on a front edge of the PCB. The plastic frame includes first and second parallel side rails and a back end rail extending between back ends of the first and second side rails. The frame defines an open front end and a longitudinal platform for receiving and supporting the PCBA such that the plug connector is exposed through the open front end. The metal panels are either snap-coupled to the plastic frame or to each other. Alternatively, or in addition, an adhesive or insulating film is provided between the metal panels and the IC devices mounted on the PCBA.
摘要翻译：重量轻的闪存硬盘驱动器包括安装在由塑料框架形成的壳体中的印刷电路板组件（PCBA）和安装在PCBA上的塑料框架上的一对金属板。 PCBA包括安装在PCB前端的PC板和插头连接器。塑料框架包括第一和第二平行侧轨道和在第一和第二侧轨道的后端之间延伸的后端轨道。框架限定了开放的前端和用于接收和支撑PCBA的纵向平台，使得插头连接器通过敞开的前端露出。金属面板或者卡扣联接到塑料框架或彼此。或者或另外，在金属板和安装在PCBA上的IC器件之间提供粘合剂或绝缘膜。

3. 发明申请

US20070293088A1 Molding Methods To Manufacture Single-Chip Chip-On-Board USB Device 有权
标题翻译：制造单芯片片上USB设备的成型方法
公开(公告)号：US20070293088A1
公开(公告)日：2007-12-20
申请号：US11773830
申请日：2007-07-05
申请人： Siew Hiew , Jim Ni , Charles Lee , I-Kang Yu , Ming-Shiang Shen
发明人： Siew Hiew , Jim Ni , Charles Lee , I-Kang Yu , Ming-Shiang Shen
IPC分类号： H01R13/648 , G06F3/00
CPC分类号： G06F1/1632 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01074 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2924/14 , H01L2924/19041 , H05K1/117 , H05K3/0052 , H05K3/284 , H05K5/0278 , H05K2203/1316 , H01L2924/00014 , H01L2224/85
摘要： A low-profile Universal-Serial-Bus (USB) device includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips include, for example, a USB controller chip and a flash memory chip, or a single-chip (combined USB controller/flash memory) chip. Multiple flash IC chips are optionally stacked to increase storage capacity. The IC chip(s) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. A molded housing is then formed over the IC chips and passive components such that the device has a uniform thickness. The low-profile USB device is optionally used as a modular insert that is mounted onto a metal case to provide a USB assembly having a plug shell similar to a standard USB male connector.
摘要翻译：一个低调的通用串行总线（USB）设备包括一个PCBA，其中所有无源组件和未封装的IC芯片都连接到与金属触点相对的PCB的单面。 IC芯片例如包括USB控制器芯片和闪存芯片，或单芯片（组合的USB控制器/闪存）芯片。可选择堆叠多个闪存IC芯片以增加存储容量。 IC芯片通过引线接合或其他芯片上（COB）芯片技术连接到PCB。无源元件通过传统的表面贴装技术（SMT）技术连接起来。然后在IC芯片和无源部件上形成模制外壳，使得该装置具有均匀的厚度。低调USB设备可选地用作安装在金属外壳上的模块化插件，以提供具有类似于标准USB公连接器的插头外壳的USB组件。

4. 发明授权

US07301776B1 Light-weight flash hard drive with plastic frame 失效
标题翻译：重量轻的闪存硬盘与塑料框架
公开(公告)号：US07301776B1
公开(公告)日：2007-11-27
申请号：US10990887
申请日：2004-11-16
申请人： Kuang-Yu Wang , Jim Ni , Ren-Kang Chiou , I-Kang Yu
发明人： Kuang-Yu Wang , Jim Ni , Ren-Kang Chiou , I-Kang Yu
IPC分类号： H05K1/14
CPC分类号： H05K5/0269 , G06F12/1416 , G06F21/32 , G06F21/78 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087 , H05K5/026 , Y10T29/49128
摘要： A light-weight flash hard drive includes a printed circuit board assembly (PCBA) mounted in a housing formed by a plastic frame and a pair of metal panels that are mounted on the plastic frame over the PCBA. The PCBA includes a PC board and a plug connector that is mounted on a front edge of the PCB. The plastic frame includes first and second parallel side rails and a back end rail extending between back ends of the first and second side rails. The frame defines an open front end and a longitudinal platform for receiving and supporting the PCBA such that the plug connector is exposed through the open front end. The metal panels are either snap-coupled to the plastic frame or to each other. Alternatively, or in addition, an adhesive or insulating film is provided between the metal panels and the IC devices mounted on the PCBA.
摘要翻译：重量轻的闪存硬盘驱动器包括安装在由塑料框架形成的壳体中的印刷电路板组件（PCBA）和安装在PCBA上的塑料框架上的一对金属板。 PCBA包括安装在PCB前端的PC板和插头连接器。塑料框架包括第一和第二平行侧轨道和在第一和第二侧轨道的后端之间延伸的后端轨道。框架限定了开放的前端和用于接收和支撑PCBA的纵向平台，使得插头连接器通过敞开的前端露出。金属面板或者卡扣联接到塑料框架或彼此。或者或另外，在金属板和安装在PCBA上的IC器件之间提供粘合剂或绝缘膜。

5. 发明授权

US07009846B1 13-Pin socket for combination SD/MMC flash memory system 失效
标题翻译：用于组合SD / MMC闪存系统的13针插座
公开(公告)号：US07009846B1
公开(公告)日：2006-03-07
申请号：US10903939
申请日：2004-07-30
申请人： Kuang-Yu Wang , Jim Ni , I-Kang Yu
发明人： Kuang-Yu Wang , Jim Ni , I-Kang Yu
IPC分类号： H05K7/02
CPC分类号： H05K5/0286 , Y10S439/945
摘要： A socket having thirteen contact springs arranged in a manner that supports existing MMC and SD form factors, and also supports a combination SD/MMC flash memory card. The combination memory card includes a PCB assembly that is consistent with existing 13-pad MMC mechanical form factors, and a housing that is consistent with the SD mechanical form factor, thereby providing a single PCBA and housing arrangement that can be used to produce both MMC and SD memory cards. The thirteen contact pads support all MMC and SD contact pad patterns, but are modified to facilitate a write protect switch. The contacts springs of the socket are arranged to make contact with the modified pad pattern, but to also be backward compatible with existing SD and MMC form factors. A system including the socket and combination SD/MMC flash memory card is also disclosed.
摘要翻译：具有十三个接触弹簧的插座，其以支持现有MMC和SD形状因子的方式布置，并且还支持SD / MMC组合闪存卡。组合存储卡包括与现有13焊盘MMC机械外形尺寸一致的PCB组件，以及与SD机械外形尺寸一致的外壳，从而提供可用于生产MMC的单个PCBA和外壳布置和SD存储卡。十三个接触垫支持所有MMC和SD接触焊盘图案，但是被修改以便于写保护开关。插座的接触弹簧被布置成与修改的焊盘图案接触，但也向下兼容现有的SD和MMC外形。还公开了一种包括插座和组合SD / MMC闪存卡的系统。

6. 发明授权

US07953931B2 High endurance non-volatile memory devices 有权
标题翻译：高耐久性非易失性存储器件
公开(公告)号：US07953931B2
公开(公告)日：2011-05-31
申请号：US12035398
申请日：2008-02-21
申请人： I-Kang Yu , David Q. Chow , Charles C. Lee , Abraham Chih-Kang Ma , Ming-Shiang Shen
发明人： I-Kang Yu , David Q. Chow , Charles C. Lee , Abraham Chih-Kang Ma , Ming-Shiang Shen
IPC分类号： G06F12/12
CPC分类号： G06F13/161 , G06F12/0246 , G06F12/0862 , G06F12/123 , G06F2212/7203 , G11C11/5621 , G11C11/5678 , G11C13/0004 , G11C2211/5641 , G11C2211/5643
摘要： High endurance non-volatile memory devices (NVMD) are described. A high endurance NVMD includes an I/O interface, a NVM controller, a CPU along with a volatile memory subsystem and at least one non-volatile memory (NVM) module. The volatile memory cache subsystem is configured as a data cache subsystem. The at least one NVM module is configured as a data storage when the NVMD is adapted to a host computer system. The I/O interface is configured to receive incoming data from the host to the data cache subsystem and to send request data from the data cache subsystem to the host. The at least one NVM module may comprise at least first and second types of NVM. The first type comprises SLC flash memory while the second type MLC flash. The first type of NVM is configured as a buffer between the data cache subsystem and the second type of NVM.
摘要翻译：描述了高耐久性非易失性存储器件（NVMD）。高耐久性NVMD包括I / O接口，NVM控制器，CPU以及易失性存储器子系统和至少一个非易失性存储器（NVM）模块。易失性存储器缓存子系统被配置为数据高速缓存子系统。当NVMD适用于主机系统时，至少一个NVM模块被配置为数据存储器。 I / O接口被配置为从主机接收数据缓存子系统的传入数据，并将请求数据从数据缓存子系统发送到主机。至少一个NVM模块可以包括至少第一和第二类型的NVM。第一种类型包括SLC闪存，而第二种类型的MLC闪存。 NVM的第一种类型被配置为数据高速缓存子系统和第二类NVM之间的缓冲区。

7. 发明申请

US20110093653A1 MEMORY ADDRESS MANAGEMENT SYSTEMS IN A LARGE CAPACITY MULTI-LEVEL CELL (MLC) BASED FLASH MEMORY DEVICE 有权
标题翻译：基于大容量多级电池（MLC）的闪存存储器件中的存储器地址管理系统
公开(公告)号：US20110093653A1
公开(公告)日：2011-04-21
申请号：US12980591
申请日：2010-12-29
申请人： Charles C. Lee , I-Kang Yu , David Nguyen , Abraham Chih-Kang Ma , Ming-Shiang Shen
发明人： Charles C. Lee , I-Kang Yu , David Nguyen , Abraham Chih-Kang Ma , Ming-Shiang Shen
IPC分类号： G06F12/00
CPC分类号： H05K1/182 , G06F12/00 , H01R13/447 , H05K1/181 , H05K5/0278 , H05K2201/10189 , H05K2201/10446 , H05K2203/1572
摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.
摘要翻译：描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。闪存被分为N组。每个集合包括多个条目（即，块）。对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

8. 发明授权

US07890846B2 Electronic data flash card with Reed Solomon error detection and correction capability 失效
标题翻译：电子数据闪存卡，具有Reed Solomon错误检测和校正功能
公开(公告)号：US07890846B2
公开(公告)日：2011-02-15
申请号：US11739613
申请日：2007-04-24
申请人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
发明人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： H03M13/00
CPC分类号： H03M13/1545 , G06F11/1068 , G06F11/1076 , H03M13/153 , H03M13/1535 , H03M13/6561
摘要： One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.
摘要翻译：本发明的一个实施例包括具有Reed Solomon（RS）解码器的电子数据存储卡，该解码器具有响应于信息页的校正子计算器块，该页被组织成多个数据段，并且开销被组织成多个架空部分。综合征计算器为每个数据部分产生综合征。解码器还包括响应于所计算的校正子并用于生成至少两个根的根取景器块，响应于至少两个根并且可操作地生成至少一个错误地址的多项式计算器块，识别数据中的位置，其中，并且错误符号值计算器块耦合到根查找器和多项式计算器块，并用于产生第二错误地址，识别错误所在的数据中的第二位置。

9. 发明授权

US07827348B2 High performance flash memory devices (FMD) 有权
标题翻译：高性能闪存设备（FMD）
公开(公告)号：US07827348B2
公开(公告)日：2010-11-02
申请号：US12017249
申请日：2008-01-21
申请人： Charles C. Lee , I-Kang Yu , David Q. Chow , Abraham Chih-Kang Ma , Ming-Shiang Shen
发明人： Charles C. Lee , I-Kang Yu , David Q. Chow , Abraham Chih-Kang Ma , Ming-Shiang Shen
IPC分类号： G06F12/00
CPC分类号： G06F11/1068 , G11C5/04
摘要： High performance flash memory devices (FMD) are described. According to one exemplary embodiment of the invention, a high performance FMD includes an I/O interface, a FMD controller, and at least one non-volatile memory module along with corresponding at least one channel controller. The I/O interface is configured to connect the high performance FMD to a host computing device The FMD contoller is configured to control data transfer (e.g., data reading, data writing/programming, and data erasing) operations between the host computing device and the non-volatile memory module. The at least one non-volatile memory module, comprising one or more non-volatile memory chips, is configured as a secondary storage for the host computing device. The at least one channel controller is configured to ensure proper and efficient data transfer between a set of data buffers located in the FMD controller and the at least one non-volatile memory module.
摘要翻译：描述了高性能闪存设备（FMD）。根据本发明的一个示例性实施例，高性能FMD包括I / O接口，FMD控制器以及至少一个非易失性存储器模块以及对应的至少一个通道控制器。 I / O接口被配置为将高性能FMD连接到主机计算设备FMD控制器被配置为控制主计算设备和主计算设备之间的数据传输（例如，数据读取，数据写入/编程和数据擦除）操作非易失性内存模块。包括一个或多个非易失性存储器芯片的至少一个非易失性存储器模块被配置为主计算设备的辅助存储器。至少一个通道控制器被配置为确保位于FMD控制器和至少一个非易失性存储器模块中的一组数据缓冲器之间的适当和有效的数据传输。

10. 发明授权

US07702831B2 Flash memory controller for electronic data flash card 失效
标题翻译：闪存控制器，用于电子数据闪存卡
公开(公告)号：US07702831B2
公开(公告)日：2010-04-20
申请号：US11466759
申请日：2006-08-23
申请人： Abraham C. Ma , Charles C. Lee , I-Kang Yu , Edward W. Lee , Ming-Shiang Shen
发明人： Abraham C. Ma , Charles C. Lee , I-Kang Yu , Edward W. Lee , Ming-Shiang Shen
IPC分类号： G06F13/12
CPC分类号： G06F12/0246 , G06F12/1416 , G06F21/32 , G06F21/78 , G06F21/79 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087
摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.
摘要翻译：电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

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