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1. 发明申请

US20130036261A1 METHOD FOR OPERATING MEMORY CONTROLLER, AND MEMORY SYSTEM INCLUDING THE SAME 有权
标题翻译：用于操作存储器控制器的方法，以及包括其的存储器系统
公开(公告)号：US20130036261A1
公开(公告)日：2013-02-07
申请号：US13564076
申请日：2012-08-01
申请人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
发明人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
IPC分类号： G06F12/00
CPC分类号： G06F13/16 , G06F11/00 , G06F11/1048 , G06F11/1076 , G11C16/26 , G11C16/349
摘要： A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.
摘要翻译：公开了一种用于操作能够控制读取重试操作的最大计数的存储器控制器的方法。该方法包括编程第一实时时钟（RTC）值，其指示在将数据编程到非易失性存储器的存储区域的程序操作时执行程序操作的时间，获得用于存储的信息通过使用从非易失性存储器读取的第一RTC值和表示执行读取操作的时间的第二RTC值，执行对存储区域的编程的数据的读取操作，并且减少当对存储区域执行读取重试操作时，通过使用该信息的重试操作的最大计数。

2. 发明申请

US20130080858A1 METHOD OF READING DATA FROM A NON-VOLATILE MEMORY AND DEVICES AND SYSTEMS TO IMPLEMENT SAME 审中-公开
标题翻译：从非易失性存储器读取数据的方法及其实现的设备和系统
公开(公告)号：US20130080858A1
公开(公告)日：2013-03-28
申请号：US13429326
申请日：2012-03-24
申请人： Sang Hoon Lee , Sung-Hwan Bae , Jong-Nam Baek , Hyun Seok Kim , Sung Bin Kim
发明人： Sang Hoon Lee , Sung-Hwan Bae , Jong-Nam Baek , Hyun Seok Kim , Sung Bin Kim
IPC分类号： G11C29/04 , G06F11/16 , G06F12/00
CPC分类号： G11C11/5642 , G11C16/10 , G11C16/26 , G11C16/349
摘要： Methods of performing a read retry, including reading a non-volatile memory with new read parameters, and devices for performing such methods are disclosed. The read retry operation and/or subsequent read retry operation may be initiated and/or completed before it is determined that such read retry operation is warranted. For example, a page of a NAND flash memory may be read in a read retry operation with new read voltage levels applied to a word line of the page. For example, a read retry operation may be performed on a target page prior to determining errors of a previous read page of data of the target page are uncorrectable via an ECC operation.
摘要翻译：公开了执行读取重试的方法，包括读取具有新的读取参数的非易失性存储器以及用于执行这些方法的设备。在确定这样的重试操作是有必要的之前，可以启动和/或完成读取重试操作和/或后续读取重试操作。例如，可以在读取重试操作中读取NAND闪存的页面，其中新的读取电压电平施加到页面的字线。例如，可以在确定目标页面的先前读取页面的数据的错误经由ECC操作不可校正之前，在目标页面上执行读取重试操作。

3. 发明授权

US08990535B2 Method for operating memory controller, and memory system including the same 有权
标题翻译：操作存储器控制器的方法，以及包含其的存储器系统
公开(公告)号：US08990535B2
公开(公告)日：2015-03-24
申请号：US13564076
申请日：2012-08-01
申请人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
发明人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
IPC分类号： G06F12/00 , G06F13/16 , G06F11/00 , G06F11/10 , G11C16/26 , G11C16/34
CPC分类号： G06F13/16 , G06F11/00 , G06F11/1048 , G06F11/1076 , G11C16/26 , G11C16/349
摘要： A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.
摘要翻译：公开了一种用于操作能够控制读取重试操作的最大计数的存储器控制器的方法。该方法包括编程第一实时时钟（RTC）值，其指示在将数据编程到非易失性存储器的存储区域的程序操作时执行程序操作的时间，获得用于存储的信息通过使用从非易失性存储器读取的第一RTC值和表示执行读取操作的时间的第二RTC值，执行对存储区域的编程的数据的读取操作，并且减少当对存储区域执行读取重试操作时，通过使用该信息的重试操作的最大计数。

4. 发明授权

US08705275B2 Non-volatile memory device and method for programming non-volatile memory device 有权
标题翻译：用于编程非易失性存储器件的非易失性存储器件和方法
公开(公告)号：US08705275B2
公开(公告)日：2014-04-22
申请号：US13599022
申请日：2012-08-30
申请人： Hyun-Seok Kim , Sung-Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang-Hoon Lee
发明人： Hyun-Seok Kim , Sung-Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang-Hoon Lee
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/04 , G11C11/5628 , G11C16/10 , G11C2211/5646
摘要： A method for programming a non-volatile memory device includes: providing a non-volatile memory device including data cells capable of storing N-bit data (N is a natural number) and a monitoring cell capable of monitoring whether the N-bit data has been programmed into the data cells; performing a first programming operation for the data cells while inhibiting programming of the monitoring cell; and performing a second programming operation for the monitoring cell while inhibiting programming of the data cells, wherein the second programming operation is performed differently from the first programming.
摘要翻译：一种用于编程非易失性存储器件的方法包括：提供包括能够存储N位数据（N为自然数）的数据单元的非易失性存储器件以及能够监视N位数据是否具有被编程到数据单元中; 对所述数据单元执行第一编程操作，同时禁止所述监视单元的编程; 以及在禁止所述数据单元的编程的同时对所述监视单元执行第二编程操作，其中所述第二编程操作与所述第一编程不同。

5. 发明申请

US20130135932A1 NON-VOLATILE MEMORY, METHOD OF OPERATING THE SAME, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SYSTEM 有权
公开(公告)号：US20130135932A1
公开(公告)日：2013-05-30
申请号：US13618604
申请日：2012-09-14
申请人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
发明人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
IPC分类号： G11C16/04
CPC分类号： G11C16/04 , G11C16/0483 , G11C16/06 , G11C16/26 , G11C29/00
摘要： A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

6. 发明授权

US08885409B2 Non-volatile memory, method of operating the same, memory system including the same, and method of operating the system 有权
标题翻译：非易失性存储器，操作方法，包括相同的存储器系统以及操作系统的方法
公开(公告)号：US08885409B2
公开(公告)日：2014-11-11
申请号：US13618604
申请日：2012-09-14
申请人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
发明人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
IPC分类号： G11C16/04
CPC分类号： G11C16/04 , G11C16/0483 , G11C16/06 , G11C16/26 , G11C29/00
摘要： A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.
摘要翻译：非易失性存储器件包括非易失性存储器单元的阵列和多个页缓冲器，其被配置为使用不同的读取电压条件从阵列中的同一页面接收多页数据。提供了一种控制电路，其电耦合到多个页面缓冲器。控制电路被配置为通过用控制信号驱动多个页面缓冲器来执行测试操作，该控制信号导致非易失性存储器件内的异或数据位串的产生，这是从多个页面中的至少两个的比较导出的使用不同的读取电压条件从同一页的非易失性存储单元读取数据。提供了一种输入/输出设备，其被配置为将从XOR数据位串导出的测试数据输出到位于非易失性存储器件外部的另一个设备。

7. 发明授权

US07773185B2 Thin film transistor array panel and display apparatus having the same 有权
标题翻译：薄膜晶体管阵列面板及其显示装置
公开(公告)号：US07773185B2
公开(公告)日：2010-08-10
申请号：US11846234
申请日：2007-08-28
申请人： Sung-Hwan Bae , Kyung-Wook Kim
发明人： Sung-Hwan Bae , Kyung-Wook Kim
IPC分类号： G02F1/1343 , G02F1/136 , G09G3/36
CPC分类号： G09G3/3607 , G09G3/3648 , G09G2300/0426 , G09G2300/0443 , G09G2300/0447 , G09G2320/0233 , G09G2320/028
摘要： A thin film transistor (TFT) array panel and a display device having the same are provided. The TFT array panel includes a substrate, an n−1th and an nth gate line formed on the substrate, a data line intersected with the n−1th gate line, a first source electrode overlapped with at least one portion of the n−1th gate line and connected to the data line, a first and a second drain electrode overlapped with at least one portion of the n−1th gate line and facing the first source electrode, a first sub pixel electrode electrically connected to the first drain electrode, a second sub pixel electrode electrically connected to the second drain electrode, a second source electrode overlapped with at least one portion of the nth gate line and electrically connected to the second sub pixel electrode, a third drain electrode overlapped with at least one portion of the nth gate line and facing the second source electrode, a third source electrode overlapped with at least one portion of the nth gate line, a fourth drain electrode overlapped with at least one portion of the nth gate line and facing the third source electrode, a third sub pixel electrode electrically connected to the fourth drain electrode; and a fourth sub pixel electrode capacitively coupled with the third sub pixel electrode.
摘要翻译：提供了一种薄膜晶体管（TFT）阵列面板及其显示装置。 TFT阵列面板包括衬底，形成在衬底上的第n至第n和第n栅极线，与第n-1个栅极线交叉的数据线，与第n-1个栅极的至少一部分重叠的第一源电极并且与数据线连接，第一和第二漏电极与第n-1栅极线的至少一部分重叠并面向第一源电极，与第一漏电极电连接的第一子像素电极，第二漏极电极子像素电极，电连接到第二漏电极，第二源电极与第n栅极线的至少一部分重叠并电连接到第二子像素电极;第三漏电极，与第n栅极的至少一部分重叠并且面对第二源极，与第n栅极线的至少一部分重叠的第三源电极，与第n栅极的至少一部分重叠的第四漏电极 e线并且面对第三源电极，电连接到第四漏电极的第三子像素电极; 以及与第三子像素电极电容耦合的第四子像素电极。

8. 发明授权

US07847874B2 Display panel and method of manufacturing a display substrate of the display panel 有权
标题翻译：显示面板和显示面板的显示基板的制造方法
公开(公告)号：US07847874B2
公开(公告)日：2010-12-07
申请号：US12174022
申请日：2008-07-16
申请人： Yeo-Geon Yoon , Sung-Hwan Bae , Jae-Ho Lee , Seung-Sok Son
发明人： Yeo-Geon Yoon , Sung-Hwan Bae , Jae-Ho Lee , Seung-Sok Son
IPC分类号： G02F1/136
CPC分类号： G02F1/133512 , G02F2001/133388
摘要： A display panel includes n gate lines, a data line, a first pixel and a second pixel. The gate lines extend in a first direction. The data line extends in a second direction transverse to the first direction. The first pixel includes a first pixel electrode connected to one of the (n−1) gate lines to receive a data voltage through the data line. The second pixel includes a second pixel electrode and a light-blocking pattern. The second pixel electrode is connected to the (n)-th gate line to receive the data voltage through the data line. The first light-blocking pattern overlaps with the second pixel electrode to possibly reduce a luminance difference between the first and second pixels.
摘要翻译：显示面板包括n条栅极线，数据线，第一像素和第二像素。栅极线在第一方向上延伸。数据线沿横向于第一方向的第二方向延伸。第一像素包括连接到（n-1）个栅极线之一以通过数据线接收数据电压的第一像素电极。第二像素包括第二像素电极和遮光图案。第二像素电极连接到第（n）栅极线以通过数据线接收数据电压。第一遮光图案与第二像素电极重叠以可能地减小第一和第二像素之间的亮度差。

9. 发明授权

US09646704B2 Operating method for nonvolatile memory and operating method for storage device including the nonvolatile memory 有权
公开(公告)号：US09646704B2
公开(公告)日：2017-05-09
申请号：US14800038
申请日：2015-07-15
申请人： Sangkwon Moon , Sung-Hwan Bae , Seungkyung Ro
发明人： Sangkwon Moon , Sung-Hwan Bae , Seungkyung Ro
IPC分类号： G11C16/04 , G11C16/14 , G11C16/10 , G11C16/20 , G11C16/34 , H01L27/115
CPC分类号： G11C16/14 , G11C16/0483 , G11C16/10 , G11C16/20 , G11C16/3459 , H01L27/115
摘要： An operation method of a storage device including a nonvolatile memory and a memory controller controlling the nonvolatile memory, includes transmitting a multi-program command to the nonvolatile memory by the memory controller; and programming memory cells connected to two or more word lines by the nonvolatile memory in response to the multi-program command.

10. 发明授权

US07714961B2 Display panel and method of manufacturing the same 有权
标题翻译：显示面板及其制造方法
公开(公告)号：US07714961B2
公开(公告)日：2010-05-11
申请号：US12045232
申请日：2008-03-10
申请人： Sung-Hwan Bae , Jae-Ho Lee , Su-Jeong Kim
发明人： Sung-Hwan Bae , Jae-Ho Lee , Su-Jeong Kim
IPC分类号： G02F1/1335
CPC分类号： G02F1/1341 , G02F2001/133311 , G02F2001/133388
摘要： A display panel includes: a first substrate including a gate line and a data line crossing the gate line, a pixel portion formed in a display region and electrically connected to the gate and the data line and a gate driving part formed on a first peripheral region and electrically connected to the gate line; a second substrate having a light blocking layer formed on an area of the second substrate corresponding to the first peripheral region; and a seal line formed between the first substrate and the second substrate to confine a liquid crystal layer therebetween, the seal line being formed in an area outside an outer peripheral edge of the display region, the area outside the outer peripheral edge of the display region being closer to an outer peripheral edge of the light blocking layer than to the outer peripheral edge of the display region.
摘要翻译：显示面板包括：第一基板，包括栅极线和与栅极线交叉的数据线;形成在显示区域中并电连接到栅极和数据线的像素部分，以及形成在第一周边区域上的栅极驱动部分并电连接到栅极线; 第二基板，具有形成在所述第二基板对应于所述第一周边区域的区域上的遮光层; 以及形成在所述第一基板和所述第二基板之间以将液晶层限制在其间的密封线，所述密封线形成在所述显示区域的外周边缘外侧的区域中，所述显示区域的外周边缘外侧的区域更靠近遮光层的外周边缘而不是显示区域的外周边缘。

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