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1. 发明授权

US08729622B2 Three dimensional semiconductor memory devices and methods of fabricating the same 有权
标题翻译：三维半导体存储器件及其制造方法
公开(公告)号：US08729622B2
公开(公告)日：2014-05-20
申请号：US13276682
申请日：2011-10-19
申请人： Hui-Chang Moon , Sung-Min Hwang , Woonkyung Lee
发明人： Hui-Chang Moon , Sung-Min Hwang , Woonkyung Lee
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L27/11556 , H01L29/7926
摘要： A three dimensional semiconductor memory device has a stacked structure including cell gates stacked therein that are insulated from each other and first string selection gates laterally separated from each other, vertical active patterns extending through the first string selection gates, multi-layered dielectric layers between sidewalls of the vertical active patterns and the cell gates and between the sidewalls of the vertical active patterns and the first string selection gates, and at least one first supplement conductive pattern. The first string selection gates are disposed over an uppermost cell gate of the cell gates. Each vertical active pattern extends through each of the cell gates stacked under the first string selection gates. The first supplement conductive pattern is in contact with a sidewall of one of the first string selection gates.
摘要翻译：三维半导体存储器件具有层叠结构，其包括彼此绝缘的单元栅极和彼此横向分离的第一串选择栅极，延伸穿过第一串选择栅极的垂直有源图案，侧壁之间的多层电介质层垂直有源图案和单元栅极之间以及垂直有源图案和第一串选择栅极的侧壁之间以及至少一个第一补充导电图案。第一串选择栅极设置在单元栅极的最上面的单元栅极上。每个垂直有源图案延伸穿过堆叠在第一串选择门下的每个单元门。第一补充导电图案与第一串选择门之一的侧壁接触。

2. 发明申请

US20120256253A1 Vertical Memory Devices 审中-公开
标题翻译：垂直存储器件
公开(公告)号：US20120256253A1
公开(公告)日：2012-10-11
申请号：US13432485
申请日：2012-03-28
申请人： Sung-Min Hwang , Woon-Kyung Lee , Young-Jin Kwon , Tae-Hee Lee , Hui-Chang Moon
发明人： Sung-Min Hwang , Woon-Kyung Lee , Young-Jin Kwon , Tae-Hee Lee , Hui-Chang Moon
IPC分类号： H01L29/78
CPC分类号： H01L27/11582 , H01L27/1157 , H01L29/7827
摘要： Vertical memory devices include a channel, a ground selection line (GSL), a word line, a string selection line (SSL), a pad and an etch-stop layer. The channel extends in a first direction on a substrate. The channel includes an impurity region and the first direction is perpendicular to a top surface of the substrate. At least one GSL, a plurality of the word lines and at least one SSL are spaced apart from each other in the first direction on a sidewall of the channel. The pad is disposed on a top surface of the channel. The etch-stop layer contacts the pad.
摘要翻译：垂直存储器件包括通道，接地选择线（GSL），字线，串选择线（SSL），焊盘和蚀刻停止层。通道在基板上沿第一方向延伸。通道包括杂质区，第一方向垂直于衬底的顶表面。至少一个GSL，多个字线和至少一个SSL在信道的侧壁上沿第一方向彼此间隔开。衬垫设置在通道的顶表面上。蚀刻停止层接触焊盘。

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