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    • 1. 发明申请
    • Method to monitor critical dimension of IC interconnect
    • 监测IC互连关键尺寸的方法
    • US20070247167A1
    • 2007-10-25
    • US11398980
    • 2006-04-06
    • Hua QianChing Chung
    • Hua QianChing Chung
    • G01R31/02
    • G01R31/2853
    • An example method of monitoring and measuring the line width of interconnects comprising the following steps. First, we measure an I-V profile of a sample interconnect structure to obtain a sample I-V profile. The I-V profile is comprised of leakage current measurements at two or more voltages. The sample interconnect structure is comprised of spaced lines having a line spacing. Next we compare the sample I-V profile with a reference I-V profile at a reference line spacing to determine if sample interconnect structure is not defective. If the sample I-V profile is similar to the reference I-V profile, then leakage currents for the sample interconnect structure are derived from the I-V profiles at a selected voltages. Then we calculate the line spacing of the sample interconnect structure using the sample I-V profile.
    • 监视和测量互连线宽的示例方法,包括以下步骤。 首先,我们测量样品互连结构的I-V轮廓以获得样品I-V轮廓。 I-V曲线由两个或多个电压下的漏电流测量组成。 样品互连结构由具有线间隔的间隔线组成。 接下来,我们将样本I-V剖面与参考线间距的参考I-V剖面进行比较,以确定样本互连结构是否没有缺陷。 如果样品I-V剖面图与参考I-V剖面相似,则样品互连结构的漏电流在选定电压下从I-V剖面得出。 然后我们使用样品I-V曲线计算样品互连结构的线间距。
    • 2. 发明申请
    • Low power module for a station of a wireless communication system and related method
    • 用于无线通信系统站的低功率模块及相关方法
    • US20070076683A1
    • 2007-04-05
    • US11241743
    • 2005-09-30
    • Ching ChungShih-Chung Yin
    • Ching ChungShih-Chung Yin
    • H04J3/06
    • H04W52/0216H04W52/0293Y02D70/142
    • The invention relates to a low power module, and in particular, to a low power module applied in a station of a wireless communication system. A low power module includes a first MAC module, a second MAC module, a low power switch register, a control register unit, a slow clock generator, and a multiplexer (MUX) The first and second MAC module transmits and receives packets in a normal operational mode and a power save mode, respectively. The low power switch register switches a current mode to another mode. The control register unit controls the RF/BB module and the clock generator under the control of the low power switch register. The slow clock generator generates a slow operational clock for the second MAC module in the power save mode. The MUX chooses the normal operational or the slow operational clock periodically as a clock of the second MAC module according to the control register unit.
    • 本发明涉及一种低功率模块,特别涉及应用于无线通信系统的站中的低功率模块。 低功率模块包括第一MAC模块,第二MAC模块,低功率开关寄存器,控制寄存器单元,慢时钟发生器和多路复用器(MUX)。第一和第二MAC模块以正常的方式发送和接收分组 操作模式和省电模式。 低功率开关寄存器将当前模式切换到另一种模式。 控制寄存器单元在低功率开关寄存器的控制下控制RF / BB模块和时钟发生器。 在省电模式下,慢时钟发生器为第二个MAC模块生成一个缓慢的工作时钟。 MUX根据控制寄存器单元周期性地选择正常操作或慢操作时钟作为第二MAC模块的时钟。