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1. 发明申请

US20070108431A1 I-shaped phase change memory cell 有权
标题翻译： I形相变存储单元
公开(公告)号：US20070108431A1
公开(公告)日：2007-05-17
申请号：US11348848
申请日：2006-02-07
申请人： Shih Chen , Hsiang Lung
发明人： Shih Chen , Hsiang Lung
IPC分类号： H01L47/00
CPC分类号： H01L27/2436 , G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/148 , H01L45/1666
摘要： A memory device includes two electrodes, vertically separated and having mutually opposed contact surfaces, between which lies a phase change cell. The phase change cell includes an upper phase change member, having a contact surface in electrical contact with the first electrode; a lower phase change member, having a contact surface in electrical contact with the second electrode; and a kernel member disposed between and in electrical contact with the upper and lower phase change members. The phase change cell is formed of material having at least two solid phases, and the lateral extent of the upper and lower phase change members is substantially greater than that of the kernel member. An intermediate insulating layer is disposed between the upper and lower phase change members adjacent to the kernel member.
摘要翻译：存储器件包括垂直分离并具有相互相对的接触表面的两个电极，它们位于相变单元之间。相变单元包括上相变构件，具有与第一电极电接触的接触表面; 下部相变构件，具有与第二电极电接触的接触表面; 以及设置在上部和下部相变构件之间并与之电连接的内部构件。相变单元由具有至少两个固相的材料形成，并且上下相变构件的横向范围基本上大于内核构件的横向范围。中间绝缘层设置在与内核构件相邻的上下相变构件之间。

2. 发明申请

US20070108077A1 Spacer Electrode Small Pin Phase Change Memory RAM and Manufacturing Method 有权
标题翻译：间隔电极小引脚相变存储器RAM和制造方法
公开(公告)号：US20070108077A1
公开(公告)日：2007-05-17
申请号：US11424123
申请日：2006-06-14
申请人： Hsiang Lung , Shih Chen
发明人： Hsiang Lung , Shih Chen
IPC分类号： B65D85/575
CPC分类号： H01L27/2436 , G11C13/0004 , G11C13/0007 , G11C13/0014 , G11C13/0016 , G11C2213/31 , G11C2213/79 , H01L45/04 , H01L45/06 , H01L45/1226 , H01L45/14 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1675
摘要： A memory device comprising a first pan-shaped electrode having a side wall with a top side, a second pan-shaped electrode having a side wall with a top side and an insulating wall between the first side wall and the second side wall. The insulating wall has a thickness between the first and second side walls near the respective top sides. A bridge of memory material crosses the insulating wall, and defines an inter-electrode path between the first and second electrodes across the insulating wall. An array of such memory cells is provided. The bridges of memory material have sub-lithographic dimensions.
摘要翻译：一种存储装置，包括具有顶侧的侧壁的第一盘形电极，具有顶侧的侧壁和在第一侧壁和第二侧壁之间的绝缘壁的第二盘形电极。绝缘壁在相应顶面附近的第一和第二侧壁之间具有厚度。记忆材料桥跨越绝缘壁，并且在绝缘壁之间限定第一和第二电极之间的电极间路径。提供这样的存储单元阵列。记忆材料的桥梁具有亚光刻尺寸。

3. 发明申请

US20060284279A1 Thin film fuse phase change RAM and manufacturing method 有权
公开(公告)号：US20060284279A1
公开(公告)日：2006-12-21
申请号：US11155067
申请日：2005-06-17
申请人： Hsiang Lung , Shih Chen
发明人： Hsiang Lung , Shih Chen
IPC分类号： H01L29/00
CPC分类号： H01L45/1226 , G11C13/0004 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/144 , H01L45/1675 , H01L45/1691
摘要： A memory device comprising a first electrode having a top side, a second electrode having a top side and an insulating member between the first electrode and the second electrode. The insulating member has a thickness between the first and second electrodes near the top side of the first electrode and the top side of the second electrode. A bridge of memory material crosses the insulating member, and defines an inter-electrode path between the first and second electrodes across the insulating member. An array of such memory cells is provided. In the array, a plurality of electrode members and insulating members therebetween comprise an electrode layer on an integrated circuit. The bridges of memory material have sub-lithographic dimensions.

4. 发明申请

US20070224726A1 THIN FILM PLATE PHASE CHANGE RAM CIRCUIT AND MANUFACTURING METHOD 有权
标题翻译：薄膜相位变化RAM电路和制造方法
公开(公告)号：US20070224726A1
公开(公告)日：2007-09-27
申请号：US11754559
申请日：2007-05-29
申请人： Shih Chen , Hsiang Lung
发明人： Shih Chen , Hsiang Lung
IPC分类号： H01L21/4763 , H01L21/06
CPC分类号： H01L45/06 , H01L27/2436 , H01L27/2463 , H01L45/1226 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675 , H01L45/1691
摘要： A memory device comprising a access circuits, an electrode layer over the access circuits, an array of phase change memory bridges over the electrode layer, and a plurality of bit lines over the array of phase change memory bridges. The electrode layer includes electrode pairs. Electrode pairs include a first electrode having a top side, a second electrode having a top side and an insulating member between the first electrode and the second electrode. A bridge of memory material crosses the insulating member, and defines an inter-electrode path between the first and second electrodes across the insulating member.
摘要翻译：一种存储器件，包括存取电路，存取电路上的电极层，电极层上的相变存储器阵列，以及相变存储器桥阵列上的多个位线。电极层包括电极对。电极对包括具有顶侧的第一电极，具有顶侧的第二电极和在第一电极和第二电极之间的绝缘构件。记忆材料桥跨越绝缘构件，并且在绝缘构件之间限定了第一和第二电极之间的电极间路径。

5. 发明申请

US20060286709A1 Manufacturing methods for thin film fuse phase change ram 有权
公开(公告)号：US20060286709A1
公开(公告)日：2006-12-21
申请号：US11155451
申请日：2005-06-17
申请人： Hsiang Lung , Shih Chen
发明人： Hsiang Lung , Shih Chen
IPC分类号： H01L21/06
CPC分类号： H01L45/06 , H01L27/2436 , H01L27/2463 , H01L45/1226 , H01L45/144 , H01L45/1625 , H01L45/1675
摘要： A method for manufacturing a memory device comprises forming an electrode layer on a substrate which comprises circuitry made using front-end-of-line procedures. The electrode layer includes a first electrode and a second electrode, and an insulating member between the first and second electrodes for each phase change memory cell to be formed. A bridge of memory material is formed on the top surface of the electrode layer across the insulating member for each memory cell to be formed. An access structure over the electrode layer is made by forming a patterned conductive layer over said bridge, and forming a contact between said first electrode and said patterned conductive layer.

6. 发明申请

US20070131980A1 Vacuum jacket for phase change memory element 有权
标题翻译：相变存储元件真空护套
公开(公告)号：US20070131980A1
公开(公告)日：2007-06-14
申请号：US11408802
申请日：2006-04-21
申请人： Hsiang Lung
发明人： Hsiang Lung
IPC分类号： H01L29/768
CPC分类号： H01L45/148 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675 , Y10S438/90
摘要： A memory device including a phase change element and a vacuum jacket. The device includes a first electrode element; a phase change element in contact with the first electrode element; an upper electrode element in contact with the phase change element; a bit line electrode in contact with the upper electrode element; and a dielectric fill layer surrounding the phase change element and the upper electrode element, spaced from the same and sealed by the bit line electrode to define a vacuum jacket around the phase change element and upper electrode element.
摘要翻译：一种包括相变元件和真空护套的存储器件。该装置包括第一电极元件; 与所述第一电极元件接触的相变元件; 与所述相变元件接触的上电极元件; 与上电极元件接触的位线电极; 以及围绕所述相变元件和所述上电极元件的介电填充层，与所述相位元件和所述上电极元件间隔开并且由所述位线电极密封以在所述相变元件和上电极元件周围限定真空护套。

7. 发明申请

US20050093022A1 Spacer chalcogenide memory device 有权
标题翻译：间隔硫属化物记忆装置
公开(公告)号：US20050093022A1
公开(公告)日：2005-05-05
申请号：US10983437
申请日：2004-11-08
申请人： Hsiang Lung
发明人： Hsiang Lung
IPC分类号： H01L27/24 , H01L45/00 , G11B7/24
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/124 , H01L45/144 , H01L45/1691 , Y10S438/90
摘要： The present invention includes devices and methods to form memory cell devices including a spacer comprising a programmable resistive material alloy. Particular aspects of the present invention are described in the claims, specification and drawings.
摘要翻译：本发明包括用于形成包括可编程电阻材料合金的间隔物的存储单元器件的器件和方法。在权利要求书，说明书和附图中描述了本发明的特定方面。

8. 发明申请

US20090053886A9 High density chalcogenide memory cells 有权
公开(公告)号：US20090053886A9
公开(公告)日：2009-02-26
申请号：US11433539
申请日：2006-05-11
申请人： Hsiang Lung
发明人： Hsiang Lung
IPC分类号： H01L21/44
CPC分类号： H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1226 , H01L45/1273 , H01L45/144 , H01L45/16
摘要： A non-volatile memory cell is constructed from a chalcogenide alloy structure and an associated electrode side wall. The electrode is manufactured with a predetermined thickness and juxtaposed against a side wall of the chalcogenide alloy structure, wherein at least one of the side walls is substantially perpendicular to a planar surface of the substrate. The thickness of the electrode is used to control the size of the active region created within the chalcogenide alloy structure. Additional memory cells can be created along rows and columns to form a memory matrix. The individual memory cells are accessed through address lines and address circuitry created during the formation of the memory cells. A computer can thus read and write data to particular non-volatile memory cells within the memory matrix.

9. 发明申请

US20070264812A1 High density chalcogenide memory cells 有权
标题翻译：高密度硫族化物记忆细胞
公开(公告)号：US20070264812A1
公开(公告)日：2007-11-15
申请号：US11433539
申请日：2006-05-11
申请人： Hsiang Lung
发明人： Hsiang Lung
IPC分类号： H01L21/44
CPC分类号： H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1226 , H01L45/1273 , H01L45/144 , H01L45/16
摘要： A non-volatile memory cell is constructed from a chalcogenide alloy structure and an associated electrode side wall. The electrode is manufactured with a predetermined thickness and juxtaposed against a side wall of the chalcogenide alloy structure, wherein at least one of the side walls is substantially perpendicular to a planar surface of the substrate. The thickness of the electrode is used to control the size of the active region created within the chalcogenide alloy structure. Additional memory cells can be created along rows and columns to form a memory matrix. The individual memory cells are accessed through address lines and address circuitry created during the formation of the memory cells. A computer can thus read and write data to particular non-volatile memory cells within the memory matrix.
摘要翻译：非易失性存储单元由硫属化物合金结构和相关联的电极侧壁构成。制造具有预定厚度并且与硫族化物合金结构的侧壁并置的电极，其中至少一个侧壁基本上垂直于衬底的平坦表面。电极的厚度用于控制在硫属化物合金结构内产生的有源区的尺寸。可以沿着行和列创建附加的存储单元以形成存储器矩阵。通过在存储单元形成期间创建的地址线和地址电路访问各个存储单元。因此，计算机可以将数据读取和写入存储器矩阵内的特定非易失性存储器单元。

10. 发明申请

US20060110878A1 Side wall active pin memory and manufacturing method 有权
公开(公告)号：US20060110878A1
公开(公告)日：2006-05-25
申请号：US11285473
申请日：2005-11-21
申请人： Hsiang Lung , Shih-Hung Chen , Yi-Chou Chen
发明人： Hsiang Lung , Shih-Hung Chen , Yi-Chou Chen
IPC分类号： H01L21/8242 , H01L21/20 , H01L21/302
CPC分类号： H01L27/112 , G11C2213/52 , H01L21/0337 , H01L21/0338 , H01L27/115 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/124 , H01L45/144 , H01L45/1691
摘要： A method of forming a memory cell comprises forming a stack comprising a first electrode, an insulating layer over the first electrode, and a second electrode over the insulating layer, with a side wall on the stack. A side wall spacer comprising a programmable resistive material in electrical communication with the first and second electrodes is formed. The side wall spacer is formed by depositing a layer of programmable resistive material over the side wall of the stack, anisotropically etching the layer of programmable resistive material to remove it in areas away from the side wall, and selectively etching the programmable resistive material according to a pattern to define the width of the side wall spacer. In embodiments described herein, the width is about 40 nanometers or less.

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