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1. 发明授权

US6009496A Microcontroller with programmable embedded flash memory 失效
标题翻译：具有可编程嵌入式闪存的微控制器
公开(公告)号：US6009496A
公开(公告)日：1999-12-28
申请号：US959
申请日：1997-12-30
申请人： Hsi-Jung Tsai
发明人： Hsi-Jung Tsai
IPC分类号： G11C16/06 , G06F9/06 , G06F15/78 , G11C16/10 , G06F12/00 , G11C8/00
CPC分类号： G11C16/102
摘要： An architecture for microcontroller with embedded flash memory is provided. The microcontroller allows the reprogramming of data into the embedded flash memory of the microcontroller to be performed on-board without having to dismount the entire IC package of the microcontroller from the circuit board and then use a dedicated writer to perform the write operation. The reprogramming operation can be initiated either by an external reprogramming-enable signal or an internal reprogramming-enable signal. When either of these two signals is generated, it causes an OR gate to output a high-voltage logic signal to a multiplexer to thereby cause the multiplexer to select a ROM unit for connection to the microprocessor unit. This allows the microprocessor unit to execute a reprogramming control routine stored in the ROM unit. The flash memory unit further stores a reprogramming detection/initialization routine which checks whether a flash reprogramming request signal is issued from the main-unit interface. With this microcontroller architecture, the reprogramming of data into the embedded flash memory can be performed on-board without having to laboriously dismount the microcontroller from the circuit board. The reprogramming operation is therefore quite easy and quick to perform, thus more cost-effective than the prior art.
摘要翻译：提供了具有嵌入式闪存的微控制器架构。微控制器允许将数据重新编程到微控制器的嵌入式闪存中以在板上执行，而无需将微控制器的整个IC封装从电路板卸下，然后使用专用写入器执行写入操作。重编程操作可以由外部重编程使能信号或内部重编程使能信号启动。当产生这两个信号中的任一个时，它使OR门向多路复用器输出高电压逻辑信号，从而使多路复用器选择用于连接到微处理器单元的ROM单元。这允许微处理器单元执行存储在ROM单元中的重新编程控制程序。闪存单元还存储重新编程检测/初始化程序，其检查是否从主单元接口发出闪速重新编程请求信号。利用这种微控制器架构，可以在板上执行将数据重新编程到嵌入式闪存中，而无需花费大量的时间将微控制器从电路板上卸下。因此，重新编程操作非常容易和快速地执行，因此比现有技术更具成本效益。

2. 发明申请

US20100246049A1 COMPUTER HAVING FUNCTION FOR DISPLAYING STATUS OF OPERATION AND FLOPPY MODULE 有权
标题翻译：具有显示操作状态的功能的计算机和游戏模块
公开(公告)号：US20100246049A1
公开(公告)日：2010-09-30
申请号：US12564054
申请日：2009-09-22
申请人： Hsi-Jung Tsai , Chi-Hung Lin , Shih-Hao Yeh
发明人： Hsi-Jung Tsai , Chi-Hung Lin , Shih-Hao Yeh
IPC分类号： G11B15/18
CPC分类号： G11B17/0436
摘要： A floppy module includes a floppy disk controller (FDC), a control circuit, and a display. The FDC has a first control terminal, a second control terminal, and a plurality of third control terminals. Wherein, the first control terminal and the second control terminal may respectively output a first control signal and a second control signal, and the first and second control signals having the same statuses are used for controlling a floppy disk. The display has a fourth control terminal and a plurality of data terminals respectively coupled to a portion of the third control terminals. Additionally, the control circuit may use the first control signal to replace the second control signal for controlling the floppy disk, and transmit the second control signal to the fourth control terminal such that a status information is shown on the display as the floppy disk being idle.
摘要翻译：软盘模块包括软盘控制器（FDC），控制电路和显示器。 FDC具有第一控制终端，第二控制终端和多个第三控制终端。其中，第一控制终端和第二控制终端可以分别输出第一控制信号和第二控制信号，并且具有相同状态的第一和第二控制信号用于控制软盘。显示器具有分别耦合到第三控制端子的一部分的第四控制端子和多个数据端子。此外，控制电路可以使用第一控制信号来替换用于控制软盘的第二控制信号，并且将第二控制信号发送到第四控制终端，使得在软盘空闲时在显示器上显示状态信息。

3. 发明授权

US06425089B1 Method for generating a clock signal for universal asynchronous receiver transmitter by utilizing a PCI-standardized clock signal 失效
标题翻译：通过使用PCI标准化的时钟信号来产生通用异步接收机发射机的时钟信号的方法
公开(公告)号：US06425089B1
公开(公告)日：2002-07-23
申请号：US09299718
申请日：1999-04-26
申请人： Hsi-Jung Tsai
发明人： Hsi-Jung Tsai
IPC分类号： G06F108
CPC分类号： G06F13/423 , G06F1/04
摘要： A method is provided for use on a PCI-compliant (Peripheral Component Inter-connection) interface card having a UART (Universal Asynchronous Receiver-Transmitter) unit to generate a near-1.8432 MHz clock signal for clocking the UART unit. This method includes a first step of dividing a selected PCI clock signals, such as the 33 MHz PCI clock signal, from the PCI local bus by a predetermined integer frequency divisor; and a second step of multiplying the resulted frequency from the division by a predetermined integer frequency multiplier that allows the resulted frequency to be substantially close to 1.8432 MHz to serve as the intended clock signal to the UART unit. Preferably, the integer frequency multiplier is in the range equal to or greater than 8. This method can generate a more precise clock signal for the UART unit on the PCI-compliant interface card without having to use an external crystal oscillator. Moreover, the method requires only a frequency divider without a frequency multiplier to implement. The method allows the resulted frequency deviation to be smaller than the prior art and also allows a reduction in the implementation cost as compared to the prior art.
摘要翻译：提供了一种用于具有UART（通用异步收发器）单元的PCI兼容（外围组件互连）接口卡的方法，用于产生用于为UART单元计时的近1.8432MHz时钟信号。该方法包括将来自PCI本地总线的所选PCI时钟信号（例如33MHz PCI时钟信号）除以预定的整数倍频器的第一步骤; 以及将得到的频率从除法乘以预定的整数倍频器的第二步骤，其允许所得到的频率基本上接近1.8432MHz，以用作到UART单元的预期时钟信号。优选地，整数倍频器在等于或大于8的范围内。该方法可以在PCI兼容接口卡上为UART单元产生更精确的时钟信号，而不必使用外部晶体振荡器。此外，该方法仅需要没有倍频器的分频器来实现。该方法允许所得到的频率偏差小于现有技术，并且与现有技术相比还允许降低实施成本。

4. 发明授权

US5513302A Dual purpose printer interface device capable of connecting a printer and a joystick to a portable host computer 失效
标题翻译：双用途打印机接口设备，能够将打印机和操纵杆连接到便携式主机
公开(公告)号：US5513302A
公开(公告)日：1996-04-30
申请号：US342866
申请日：1994-11-21
申请人： Hsi-Jung Tsai
发明人： Hsi-Jung Tsai
IPC分类号： G06F3/038 , G06F3/12 , G06K15/00
CPC分类号： G06F3/038 , G06F3/1293
摘要： A dual purpose printer interface device includes a printer interface circuit connected to a host computer and a printer connector to which a printer is to be connected. An adaptor can connect removably a joystick to the connector. A joystick interface circuit is connected to the computer and the connector. A first selecting unit connects electrically the computer to the printer and joystick interface circuits and is operable selectively in a first mode, wherein the printer interface circuit is connected electrically to the computer and the joystick interface circuit is disconnected from the computer, and in a second mode, wherein the joystick interface circuit is connected electrically to the computer and the printer interface circuit is disconnected from the computer. A second selecting unit connects electrically the connector to the printer and joystick interface circuits. The second selecting unit is operable to connect electrically the printer interface circuit to the connector and to disconnect the joystick interface circuit from the connector when the first selecting unit is operated in the first mode and to connect electrically the joystick interface circuit to the connector and to disconnect the printer interface circuit from the connector when the first selecting unit is operated in the second mode.
摘要翻译：双用途打印机接口设备包括连接到主计算机的打印机接口电路和要连接打印机的打印机连接器。适配器可以将操纵杆可拆卸地连接到连接器。操纵杆接口电路连接到计算机和连接器。第一选择单元将计算机电连接到打印机和操纵杆接口电路，并且可以在第一模式中选择性地操作，其中打印机接口电路电连接到计算机，并且操纵杆接口电路与计算机断开连接，并且在第二模式中模式，其中操纵杆接口电路电连接到计算机，并且打印机接口电路与计算机断开连接。第二选择单元将连接器电连接到打印机和操纵杆接口电路。当第一选择单元在第一模式下操作时，第二选择单元可操作以将打印机接口电路电连接到连接器并且将操纵杆接口电路与连接器断开连接，并且将操纵杆接口电路电连接到连接器，并且当第二选择单元在第二模式下运行时，断开打印机接口电路与连接器的连接。

5. 发明授权

US09201650B2 Super I/O module and control method thereof 有权
标题翻译：超级I / O模块及其控制方法
公开(公告)号：US09201650B2
公开(公告)日：2015-12-01
申请号：US13617837
申请日：2012-09-14
申请人： Hsi-Jung Tsai , Yueh-Yao Nain , Hao-Yang Chang
发明人： Hsi-Jung Tsai , Yueh-Yao Nain , Hao-Yang Chang
IPC分类号： G06F13/20 , G06F9/06
CPC分类号： G06F9/06 , G06F13/20 , G06F13/385
摘要： A super input/output (I/O) module for controlling a universal serial bus (USB) port of a computer system is provided. The super I/O module includes a USB host, a switch and a processor. The switch selectively couples the USB port of the computer system to the USB host or a controller of the computer system according to a switching signal. When a trigger event occurs, the processor provides the switching signal to control the switch, so as to couple the USB port of the computer system to the USB host and to transmit a basic input/output system (BIOS) code to a flash memory of the computer system via the switch and the USB port.
摘要翻译：提供了一种用于控制计算机系统的通用串行总线（USB）端口的超级输入/输出（I / O）模块。超级I / O模块包括USB主机，交换机和处理器。开关根据切换信号选择性地将计算机系统的USB端口耦合到USB主机或计算机系统的控制器。当发生触发事件时，处理器提供切换信号来控制开关，以将计算机系统的USB端口耦合到USB主机，并将基本输入/输出系统（BIOS）代码传送到闪存计算机系统通过开关和USB端口。

6. 发明授权

US08725917B2 Chip and computer system 有权
标题翻译：芯片和计算机系统
公开(公告)号：US08725917B2
公开(公告)日：2014-05-13
申请号：US13193622
申请日：2011-07-29
申请人： Hsi-Jung Tsai , Chi-Hung Lin
发明人： Hsi-Jung Tsai , Chi-Hung Lin
IPC分类号： G06F13/12 , G06F3/038
CPC分类号： G06F11/3058 , G06F11/2284 , G06F11/3031 , G06F11/3041 , G06F11/3055 , G06F11/328
摘要： A computer system is provided. The computer system comprises system and peripheral hardware devices, a display device and a chip. The display device comprises a display panel and an on-screen display (OSD) control module. The chip comprises a computer system environment information monitoring module, a control connection interface and a control module. The computer system environment information monitoring module monitors computer system environment information according to the system and peripheral hardware devices. The control connection interface is electrically connected to the OSD control module. The control module is electrically connected to the computer system environment information monitoring module and the control connection interface to control the OSD control module through the control connection interface according to the computer system environment information to further control the display function of the display panel.
摘要翻译：提供计算机系统。计算机系统包括系统和外围硬件设备，显示设备和芯片。显示装置包括显示面板和屏幕显示（OSD）控制模块。该芯片包括计算机系统环境信息监控模块，控制连接接口和控制模块。计算机系统环境信息监控模块根据系统和外围硬件设备监控计算机系统环境信息。控制连接接口与OSD控制模块电连接。控制模块电连接到计算机系统环境信息监控模块和控制连接接口，根据计算机系统环境信息通过控制连接接口控制OSD控制模块，进一步控制显示面板的显示功能。

7. 发明授权

US06199764B1 UART with an IC card reading interface and IC card reading system using the same 有权
标题翻译： UART带有IC卡阅读界面和IC卡读卡系统使用相同
公开(公告)号：US06199764B1
公开(公告)日：2001-03-13
申请号：US09250635
申请日：1999-02-16
申请人： Hsi-Jung Tsai
发明人： Hsi-Jung Tsai
IPC分类号： G06K1906
CPC分类号： G06K7/0008
摘要： A UART having an IC card reading interface comprises a universal asynchronous communication core, a multiplexer and a 3-state control I/O buffer. The universal asynchronous communication core is responsible for an asynchronous serial communication. The multiplexer and the 3-state control I/O buffer enable serial output signal and serial input signal pins have different functions during an IC card reading mode and a universal asynchronous receive/transmit mode. An IC card reading system includes an IC card reader having an IC card socket and a smart card interface and a computer system having the UART with the IC card reading interface. Since the UART with an IC card reading interface can be directly electrically connected to the smart card interface of the IC card reader, a micro-controller and a receiver-transmitter can be saved in the IC card reader.
摘要翻译：具有IC卡读取接口的UART包括通用异步通信内核，多路复用器和3状态控制I / O缓冲器。通用异步通信核心负责异步串行通信。多路复用器和3态控制I / O缓冲器使串行输出信号和串行输入信号引脚在IC卡读取模式和通用异步接收/发送模式下具有不同的功能。 IC卡读取系统包括具有IC卡插座和智能卡接口的IC卡读卡器以及具有带有IC卡读取接口的UART的计算机系统。由于具有IC卡读取接口的UART可以直接电连接到IC卡读卡器的智能卡接口，因此可将微控制器和接收器 - 发送器保存在IC卡读卡器中。

8. 发明授权

US08055811B2 Computer having function for displaying status of operation and floppy module 有权
标题翻译：具有显示操作状态和软盘模块功能的计算机
公开(公告)号：US08055811B2
公开(公告)日：2011-11-08
申请号：US12564054
申请日：2009-09-22
申请人： Hsi-Jung Tsai , Chi-Hung Lin , Shih-Hao Yeh
发明人： Hsi-Jung Tsai , Chi-Hung Lin , Shih-Hao Yeh
IPC分类号： G06F3/00
CPC分类号： G11B17/0436
摘要： A floppy module includes a floppy disk controller (FDC), a control circuit, and a display. The FDC has a first control terminal, a second control terminal, and a plurality of third control terminals. Wherein, the first control terminal and the second control terminal may respectively output a first control signal and a second control signal, and the first and second control signals having the same statuses are used for controlling a floppy disk. The display has a fourth control terminal and a plurality of data terminals respectively coupled to a portion of the third control terminals. Additionally, the control circuit may use the first control signal to replace the second control signal for controlling the floppy disk, and transmit the second control signal to the fourth control terminal such that a status information is shown on the display as the floppy disk being idle.
摘要翻译：软盘模块包括软盘控制器（FDC），控制电路和显示器。 FDC具有第一控制终端，第二控制终端和多个第三控制终端。其中，第一控制终端和第二控制终端可以分别输出第一控制信号和第二控制信号，并且具有相同状态的第一和第二控制信号用于控制软盘。显示器具有分别耦合到第三控制端子的一部分的第四控制端子和多个数据端子。此外，控制电路可以使用第一控制信号来替换用于控制软盘的第二控制信号，并且将第二控制信号发送到第四控制终端，使得在软盘空闲时在显示器上显示状态信息。

9. 发明申请

US20100185797A1 KEYBOARD-MOUSE SWITCH AND SWITCHING METHOD THEREOF 审中-公开
标题翻译：键盘鼠标开关及其切换方法
公开(公告)号：US20100185797A1
公开(公告)日：2010-07-22
申请号：US12424523
申请日：2009-04-15
申请人： Hsi-Jung Tsai , Hao-Yang Chang , Shih-Hsuan Yen
发明人： Hsi-Jung Tsai , Hao-Yang Chang , Shih-Hsuan Yen
IPC分类号： G06F13/00 , G06F13/12
CPC分类号： G06F3/038 , G06F3/023
摘要： A keyboard-mouse switch is disclosed. The keyboard-mouse switch mentioned above is embedded in a computer apparatus and includes an information monitoring unit, a hot-key look up table and a hot-key identification controller. The information monitoring unit receives input information generated by at least one of a keyboard and a mouse. The hot-key look up table stores at least start up hot-key information. The hot-key identification controller receives the start up hot-key information and the input information. The hot-key identification identifies whether the input information is hot-key information or not and dis/enables the input information to be transmitted to the computer apparatus according to the start up hot-key information and the hot-key information.
摘要翻译：公开了一种键盘鼠标开关。上述键盘鼠标开关嵌入在计算机装置中，包括信息监视单元，热键查询表和热键识别控制器。信息监视单元接收由键盘和鼠标中的至少一个生成的输入信息。热键查询表至少存储启动热键信息。热键识别控制器接收启动热键信息和输入信息。热键识别识别输入信息是否为热键信息，并且根据启动热键信息和热键信息，将输入信息发送到计算机设备。

10. 发明授权

US5978306A Memory device having a redundant memory block 失效
标题翻译：具有冗余存储器块的存储器件
公开(公告)号：US5978306A
公开(公告)日：1999-11-02
申请号：US191805
申请日：1998-11-13
申请人： Hsi-Jung Tsai
发明人： Hsi-Jung Tsai
IPC分类号： G11C29/00 , G11C13/00
CPC分类号： G11C29/808
摘要： A memory device having a redundant memory block according to the invention is disclosed. The memory device includes a main memory block, a redundant memory block, a first decoder, a second decoder and an address control circuit. The address control circuit is used to set an address corresponding to another address where a certain defective byte of memory bytes is located. When an external address signal is identical to the address set by the address control circuit, the address is transferred to a redundant memory block, so that the defective byte of memory cells can be replaced with a spare byte of memory cells, thereby increasing manufacturing yield.
摘要翻译：公开了一种具有根据本发明的冗余存储块的存储器件。存储装置包括主存储块，冗余存储块，第一解码器，第二解码器和地址控制电路。地址控制电路用于设置与存储器字节的某个缺陷字节所在的另一地址相对应的地址。当外部地址信号与由地址控制电路设置的地址相同时，地址被传送到冗余存储器块，从而可以用存储器单元的备用字节替换存储单元的有缺陷字节，从而提高制造成品率。

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